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Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
1
Chapter 03: Computer ArithmeticComputer Arithmetic
Lesson 05:
Arithmetic Multiplication Circuits
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
2
Objective
• Learn Booth encoding
• Learn fast multiplication by bit pairing
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
3
Multiplication Process By Booth’s
Encoding Algorithm
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
4
Multiplication
• Multiplication of two's-complement
numbers more complicated
• Because performing a straightforward
unsigned multiplication of the two's-
complement representations of the inputs
does not give the correct result
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
5
Multiplication
• Multipliers could be designed to convert both
of their inputs to positive quantities and use the
sign bits of the original inputs to determine the
sign of the result
• Increases the time required to perform a
multiplication
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
6
Booth’s Algorithm
• A technique called Booth encoding
• To quickly convert two's-complement numbers
into a format that is easily multiplied
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
7
Booth encoding
• Apply encoding to the multiplier bits before
the bits are used for getting partial products
1. If ith bit bi is 0 and (i –1)th bit bi-1 is 1, then
take bi as +1
2. If ith bit bi is 1 and (i –1)th bit bi-1 is 0, then
take bi as –1
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
8
3. If ith bit bi is 0 and (i –1)th bit bi-1 is 0,
then take bi as 0
4. If ith bit bi is 1 and (i –1)th bit bi-1 is 1,
then take bi as 0
• When lsb b0 = 1, assume that it had b-1 as 0,
thus take b0 = –1
Booth encoding
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
9
Example
Multiplier After Booth’s conversion
0 1 1 1 0 0 0 0 +1 0 0 –1 0 0 0 0
0 1 1 1 0 1 1 0 +1 0 0 –1 +1 0 –1 0
0 0 0 0 0 1 1 1 0 0 0 0 +1 0 0 –1
0 1 0 1 0 1 0 1 +1–1+1–1+1–1+1–1
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
10
Multiplication by Booth’s Encoding
• Booth’s algorithm permits skipping over 1s and
when there are blocks of 1s
• It improves performance significantly
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
11
Multiplication using Booth’s algorithm
11101100b Two’s complement 0000000000010100
×00000l01b Two’s complement ×1111111111111 0 11
00000000 0000 – 1+1 0 – 1
× – 1 11111111 11101100
000000000 0000000
× + 1 00000000 00010100
× – 1 11111111 11101100
000000000 0000000
= – 100 11111111 10011100
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
12
Present CasePresent Case
• Observe─ the addition of 00000000 00010100
or its two’s complement is done only thrice, in
contrast to the addition of 00000000 00010100
done 15 times in earlier described procedures
without using Booth’s algorithm
• The adder circuit takes longer period to
implement than finding –1 and +1 and 0’s for
multiplier
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
13
Worst Case
• The worst case of an implementation using
Booth’s algorithm is when pairs of 01s or 10s
occur very frequently in the multiplier
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
14
Fast Multiplication Process
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
15
Fast Multiplication
• Fast multiplication by a combination of
methods
1. Bit Pair Recording of Multipliers and
2. Carry Save Addition of the Sums
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
16
Carry Save Addition in the Sums of partial
products
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
17
Two-dimensional arrays of full adders to get
partial products
• The carry of each FA connects the neighboring
left side cell in each row
• Each FA in a cell gives the carry out as input to
the next row left column FA
• The carry addition method, which reduces the
time taken for additions
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
18
Carry Save method for faster multiplication
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
19
Two-dimensional arrays of full adders to get
partial products
• Downward diagonal full arrows as an example
• An FA, instead of getting the ripple carry input
from the previous input column of a row is given
carry-input from previous column’s previous
row output
• Refer upward dashed arrows as an example
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
20
Two-dimensional arrays of full adders to get
partial products
• For example, carry out from first row’s right-
most column full adder FA is given as input to
the second row’s right-most FA, carry out from
the second row’s right- most FA is given as
input to the third row’s right-most FA, and so on
• Each FA in a cell gives the carry out as input to
next row’s left column FA
• Delay through carry save adder is less than carry
ripple through adder
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
21
Bit Pair Recording of Multipliers
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
22
Bit Pair Recording of Multipliers
• When Booth’s algorithm is applied to the
multiplier bits before the bits are used for
getting partial products─ Get fast
multiplication by pairing
1. If pair ith bit and (i –1)th Booth multiplier bit
(Bi , Bi–1) is (+1, −1), then take Bi–1 = +1 and
Bi = 0 and pair (0, +1)
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
23
Bit Pair Recording of Multipliers
2. If pair ith bit and (i –1)th Booth multiplier bit (Bi
, Bi–1) is (−1, +1), then take Bi–1 = −1 and Bi = 0
and make pair (0, −1)
3. If pair ith bit and (i –1)th Booth multiplier bit (Bi
, Bi–1) is (+1, 0), then take Bi–1 = 2 and Bi = 0
and make pair (0, +2)
4. If pair ith bit and (i –1)th Booth multiplier bit (Bi
, Bi–1) is (−1, 0), then take Bi–1 = −2 and Bi = 0
and make pair (0, −2)
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
24
Example
Multiplier
0 1 1 1 0 0 0 0
After Booth’s conversion
+10 0 –1 0 0 0 0
After pairing
0+2 0 –1 0 0 0 0
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
25
Example
Multiplier
0 1 1 1 0 1 1 0
After Booth’s conversion
+1 0 0 –1 +1 0 –1 0
After pairing
0 + 2 0 0 –1 0 –1 0
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
26
Example
Multiplier
0 0 0 0 0 1 1 1
After Booth’s conversion
0 0 0 0 +1 0 0 –1
After pairing
0 0 0 0 0 +2 0 –1
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
27
Example
Multiplier
0 1 0 1 0 1 0 1
After Booth’s conversion
+1–1+1–1+1–1+1–1
After pairing
0 +1 0 +1 0 +1 0 +1
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
28
Worst case─ 0 1 0 1 0 1 0 1
• In the worst case also, the number of additions in
an 8-bit multiplier has reduced to 4
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
29
Use of triplets
• bi+1 1
• bi 1 Bi = 0
• bi–1 1
• bi+1 1
• bi 1 Bi = – 1
• bi–1 0
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
30
Use of triplets
• bi+1 1
• bi 0 Bi = –2
• bi–1 0
• bi+1 1
• bi 0 Bi = – 1
• bi–1 1
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
31
Use of triplets
• bi+1 0
• bi 0 Bi = 0
• bi–1 0
• bi+1 0
• bi 0 Bi = + 1
• bi–1 1
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
32
Use of triplets
• bi+1 0
• bi 1 Bi = +1
• bi–1 0
• bi+1 0
• bi 1 Bi = + 2
• bi–1 1
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
33
Summary
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
34
• Multiplication circuit becomes fast by
Booth’s algorithm
• Faster by Bit pair encoding
• Faster by triplets
We learnt
Schaum’s Outline of Theory and Problems of Computer Architecture
Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
35
End of Lesson 5 on
Arithmetic Multiplication Circuits

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Booth and bit pair encoding

  • 1. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 1 Chapter 03: Computer ArithmeticComputer Arithmetic Lesson 05: Arithmetic Multiplication Circuits
  • 2. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 2 Objective • Learn Booth encoding • Learn fast multiplication by bit pairing
  • 3. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 3 Multiplication Process By Booth’s Encoding Algorithm
  • 4. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 4 Multiplication • Multiplication of two's-complement numbers more complicated • Because performing a straightforward unsigned multiplication of the two's- complement representations of the inputs does not give the correct result
  • 5. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 5 Multiplication • Multipliers could be designed to convert both of their inputs to positive quantities and use the sign bits of the original inputs to determine the sign of the result • Increases the time required to perform a multiplication
  • 6. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 6 Booth’s Algorithm • A technique called Booth encoding • To quickly convert two's-complement numbers into a format that is easily multiplied
  • 7. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 7 Booth encoding • Apply encoding to the multiplier bits before the bits are used for getting partial products 1. If ith bit bi is 0 and (i –1)th bit bi-1 is 1, then take bi as +1 2. If ith bit bi is 1 and (i –1)th bit bi-1 is 0, then take bi as –1
  • 8. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 8 3. If ith bit bi is 0 and (i –1)th bit bi-1 is 0, then take bi as 0 4. If ith bit bi is 1 and (i –1)th bit bi-1 is 1, then take bi as 0 • When lsb b0 = 1, assume that it had b-1 as 0, thus take b0 = –1 Booth encoding
  • 9. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 9 Example Multiplier After Booth’s conversion 0 1 1 1 0 0 0 0 +1 0 0 –1 0 0 0 0 0 1 1 1 0 1 1 0 +1 0 0 –1 +1 0 –1 0 0 0 0 0 0 1 1 1 0 0 0 0 +1 0 0 –1 0 1 0 1 0 1 0 1 +1–1+1–1+1–1+1–1
  • 10. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 10 Multiplication by Booth’s Encoding • Booth’s algorithm permits skipping over 1s and when there are blocks of 1s • It improves performance significantly
  • 11. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 11 Multiplication using Booth’s algorithm 11101100b Two’s complement 0000000000010100 ×00000l01b Two’s complement ×1111111111111 0 11 00000000 0000 – 1+1 0 – 1 × – 1 11111111 11101100 000000000 0000000 × + 1 00000000 00010100 × – 1 11111111 11101100 000000000 0000000 = – 100 11111111 10011100
  • 12. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 12 Present CasePresent Case • Observe─ the addition of 00000000 00010100 or its two’s complement is done only thrice, in contrast to the addition of 00000000 00010100 done 15 times in earlier described procedures without using Booth’s algorithm • The adder circuit takes longer period to implement than finding –1 and +1 and 0’s for multiplier
  • 13. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 13 Worst Case • The worst case of an implementation using Booth’s algorithm is when pairs of 01s or 10s occur very frequently in the multiplier
  • 14. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 14 Fast Multiplication Process
  • 15. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 15 Fast Multiplication • Fast multiplication by a combination of methods 1. Bit Pair Recording of Multipliers and 2. Carry Save Addition of the Sums
  • 16. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 16 Carry Save Addition in the Sums of partial products
  • 17. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 17 Two-dimensional arrays of full adders to get partial products • The carry of each FA connects the neighboring left side cell in each row • Each FA in a cell gives the carry out as input to the next row left column FA • The carry addition method, which reduces the time taken for additions
  • 18. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 18 Carry Save method for faster multiplication
  • 19. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 19 Two-dimensional arrays of full adders to get partial products • Downward diagonal full arrows as an example • An FA, instead of getting the ripple carry input from the previous input column of a row is given carry-input from previous column’s previous row output • Refer upward dashed arrows as an example
  • 20. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 20 Two-dimensional arrays of full adders to get partial products • For example, carry out from first row’s right- most column full adder FA is given as input to the second row’s right-most FA, carry out from the second row’s right- most FA is given as input to the third row’s right-most FA, and so on • Each FA in a cell gives the carry out as input to next row’s left column FA • Delay through carry save adder is less than carry ripple through adder
  • 21. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 21 Bit Pair Recording of Multipliers
  • 22. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 22 Bit Pair Recording of Multipliers • When Booth’s algorithm is applied to the multiplier bits before the bits are used for getting partial products─ Get fast multiplication by pairing 1. If pair ith bit and (i –1)th Booth multiplier bit (Bi , Bi–1) is (+1, −1), then take Bi–1 = +1 and Bi = 0 and pair (0, +1)
  • 23. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 23 Bit Pair Recording of Multipliers 2. If pair ith bit and (i –1)th Booth multiplier bit (Bi , Bi–1) is (−1, +1), then take Bi–1 = −1 and Bi = 0 and make pair (0, −1) 3. If pair ith bit and (i –1)th Booth multiplier bit (Bi , Bi–1) is (+1, 0), then take Bi–1 = 2 and Bi = 0 and make pair (0, +2) 4. If pair ith bit and (i –1)th Booth multiplier bit (Bi , Bi–1) is (−1, 0), then take Bi–1 = −2 and Bi = 0 and make pair (0, −2)
  • 24. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 24 Example Multiplier 0 1 1 1 0 0 0 0 After Booth’s conversion +10 0 –1 0 0 0 0 After pairing 0+2 0 –1 0 0 0 0
  • 25. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 25 Example Multiplier 0 1 1 1 0 1 1 0 After Booth’s conversion +1 0 0 –1 +1 0 –1 0 After pairing 0 + 2 0 0 –1 0 –1 0
  • 26. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 26 Example Multiplier 0 0 0 0 0 1 1 1 After Booth’s conversion 0 0 0 0 +1 0 0 –1 After pairing 0 0 0 0 0 +2 0 –1
  • 27. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 27 Example Multiplier 0 1 0 1 0 1 0 1 After Booth’s conversion +1–1+1–1+1–1+1–1 After pairing 0 +1 0 +1 0 +1 0 +1
  • 28. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 28 Worst case─ 0 1 0 1 0 1 0 1 • In the worst case also, the number of additions in an 8-bit multiplier has reduced to 4
  • 29. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 29 Use of triplets • bi+1 1 • bi 1 Bi = 0 • bi–1 1 • bi+1 1 • bi 1 Bi = – 1 • bi–1 0
  • 30. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 30 Use of triplets • bi+1 1 • bi 0 Bi = –2 • bi–1 0 • bi+1 1 • bi 0 Bi = – 1 • bi–1 1
  • 31. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 31 Use of triplets • bi+1 0 • bi 0 Bi = 0 • bi–1 0 • bi+1 0 • bi 0 Bi = + 1 • bi–1 1
  • 32. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 32 Use of triplets • bi+1 0 • bi 1 Bi = +1 • bi–1 0 • bi+1 0 • bi 1 Bi = + 2 • bi–1 1
  • 33. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 33 Summary
  • 34. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 34 • Multiplication circuit becomes fast by Booth’s algorithm • Faster by Bit pair encoding • Faster by triplets We learnt
  • 35. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 35 End of Lesson 5 on Arithmetic Multiplication Circuits