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Automatic Loop Parallelization
using Software Transactional Memory

Amr Abed
Outline
O
O
O
O

O
O
O

Motivation
Software Transactional Memory
RingSTM
STMlite
Speculative Parallelization
Fastpath
SMTX (Spec-PS-DSWP)
Outline
O
O
O
O

O
O
O

Motivation
Software Transactional Memory
RingSTM
STMlite
Speculative Parallelization
Fastpath
SMTX (Spec-PS-DSWP)
Why Parallelization?
O

Multi-cores
O

Only multi-treaded applications
Why automatic?
Parallel programs

O

O

Hard to implement

Legacy code

O

O

Low knowledge
Why loops ?
Most of execution time of a program takes
place inside loops
Why STM ?
O

Lock-based
O
O
O

O

Lock-free
O
O

O

Deadlock
Priority Inversion
Convoying
Not easy to implement
CAS multiple locations

STM
O
O

Easy to implement, as in lock-based
Higher performance than lock-free
Outline
O
O
O
O

O
O
O

Motivation
Software Transactional Memory
RingSTM
STMlite
Speculative Parallelization
Fastpath
SMTX (Spec-PS-DSWP)
STM
O
O
O

Each transaction performs an atomic task
Transactions run concurrently
To access shared memory
O
O

O

Write buffer
Undo log

At end, validate reads
O
O

No conflict  Commit
Conflict  Abort and restart
Outline
O
O
O
O

O
O
O

Motivation
Software Transactional Memory
RingSTM
STMlite
Speculative Parallelization
Fastpath
SMTX (Spec-PS-DSWP)
Motivation
Orec-based STM

Ring STM

Location-based metadata
TX writing to W locations

TX-based metadata
TX writing to W locations

O(W) CAS operations

Committing R/W TX
O(R+W) overhead

All validation done in CS

No CAS operations

Committing R/W TX
Single CAS operation

Bloom filters used for
validation
Transaction

Start
Timestamp

Write Filter
Read Filter

Write
Buffer
The Ring
39

40

46

41

42

Writing
45

44

43

Complete
Ring Entry

Commit
Timestamp

Write Filter

Status
Bloom Filter
Initially

0
15
1

0
14
0

0

0
13

0
12

0
11

0

0

0

10

9

8

0

0
7

0
6

0
5

0
4

0
3

0
2
Bloom Filter
Inserting A
A
Hash Functions
13

0
15
1

0
14
0

1
0

0
13

0
12

10

1
0
11

7

1

0

0

1
0

10

9

8

0

0
7

0
6

0
5

0
4

1
0
3

0
2
Bloom Filter
Inserting B
B
Hash Functions
12

0
15
1

0
14
0

1

0
1
13

0
12

9

1
11

7

0
1

0

10

9

2

1
8

0

0
7

0
6

0
5

0
1
4

1
3

0
2
Bloom Filter
Searching for A
A
Hash Functions
13

0
15
1

0
14
0

1

1
13

0
12

10

1
11

7

1

0

10

9

1

1
8

0

0
7

0
6

0
5

1
4

1
3

0
2
Bloom Filter
Searching for C
C
Hash Functions
12

0
15
1

0
14
0

1

1
13

0
12

10

1
11

3

7

1

0

10

9

1
8

0

0
7

0
6

0
5

1
4

1
3

0
2
Bloom Filter
Searching for D
D
Hash Functions
12

0
15
1

0
14
0

1

1
13

0
12

10

1
11

2

7

1

0

10

9

1
8

0

0
7

0
6

0
5

1
4

1
3

0
2
New Transaction
39

40

41

Start
Time
43 42

46

Write
Buffer

Write Filter
Read Filter
45

44

43

Writing
Complete
On Write
Add address to Write set
Address

Hash Functions
12

10

1

7

Write filter
0
15
1

0
14
0

1

0
1
13

0
12

1
11

0

0

10

9

1
8

0

0
7

0
6

0
1
5

0
4

1
3

0
2
On Write
Add <address, value> to Write buffer
Address

Value
Address

Hash Functions
12

10

Write
Buffer

1

7

Write filter
0
15
1

0
14
0

1

0
1
13

0
12

1
11

0

0

10

9

1
8

0

0
7

0
6

0
1
5

0
4

1
3

0
2
On Read
Address is in Write set

Address

Hash Functions
13

10

7

1

Write filter
0
15
1

0
14
0

1

1
13

0
12

1
11

1

0

10

9

1
8

0

0
7

0
6

0
5

1
4

1
3

0
2
On Read
Get value from write buffer

Address
Address

Hash Functions
13

10

7

Write
Buffer

1

Value

Write filter
0
15
1

0
14
0

1

1
13

0
12

1
11

1

0

10

9

1
8

0

0
7

0
6

0
5

1
4

1
3

0
2
On Read
Address is not in Write Set

Address

Hash Functions
12

10

3

7

Write filter
0
15
1

0
14
0

1

1
13

0
12

1
11

1

0

10

9

1
8

0

0
7

0
6

0
5

1
4

1
3

0
2
On Read
Get value from memory

Address
Address
Hash Functions

12

10

Memory

3

7

Value

Write filter
0
15
1

0
14
0

1

1
13

0
12

1
11

1

0

10

9

1
8

0

0
7

0
6

0
5

1
4

1
3

0
2
On Read
Add address to read set
Address

Hash Functions
12

10

3

7

Read filter
0
15
1

0
14
0

1

0
1
13

0
12

1
11

1

0

10

9

1
8

0

0
7

0
6

0
1
5

1
4

1
3

0
2
On Read
Check for conflicts
39

40

46

41

42

Start
Time
44
43

Write
Buffer

Write Filter
Read Filter

45

44

43
On Commit
Add new entry, and update index
47
39

40

46

41

42

Start
Time
43

Write
Buffer

Write Filter
Read Filter

45

44

43
On Commit
Check for conflicting writers
47

40

46

41

42

Start
Time
43

Write
Buffer

Write Filter
Read Filter

45

44

43
On Commit
If no conflicts, write to memory

Address

Address
Write
Buffer

Memory
On Commit
Set status to complete

47

40

46

45

41

42

44

43
Results
Results
Results
Outline
O
O
O
O

O
O
O

Motivation
Software Transactional Memory
RingSTM
STMlite
Speculative Parallelization
Fastpath
SMTX (Spec-PS-DSWP)
Motivation
Transaction

Start
version

Abort?

Commit
version

Commit?
Write Signature
Read Signature

Write
Buffer
TCM

minSV
log

PreCommit
log

Commit
log
Commit Log Entry

Commit
version

Transaction
pointer

Write Signature
Pre-commit Log Entry

Commit
Version

Transaction
Pointer

Ready?
Write Signature
Read Signature
New Transaction
Global Clock
Start
version

Abort?

Commit
version

Commit?
Write Signature
Read Signature

Write
Buffer
New Transaction

Start
version

Abort?

Commit
version

Commit?
Write Signature
Read Signature
minSV
log

Write
Buffer

PreCommit
log

Commit
log
Memory Access (R/W)
Same as RingSTM
Except, no eager validation on read
Pre-Commit
Global
Clock

Commit
Version

Transaction
Pointer

Ready?
Ready = 1
Write Filter
Read Filter
Pre-Commit

Commit
Version

Transaction
Pointer

Ready = 1
Write Signature
Read Signature

Commit
log
Commit

Address

Address
Write
Buffer

Memory
Results
Results
Outline
O
O
O
O

O
O
O

Motivation
Software Transactional Memory
RingSTM
STMlite
Speculative Parallelization
Fastpath
SMTX (Spec-PS-DSWP)
Loop parallelization
O

Non-Speculative Parallelization
DOALL
DOACROSS
DSWP

O

Speculative Parallelization
TLS
Spec-PS-DSWP
Outline
O
O
O
O

O
O
O

Motivation
Software Transactional Memory
RingSTM
STMlite
Speculative Parallelization
Fastpath
SMTX (Spec-PS-DSWP)
Speculative Pipelining

Thread 1
Thread 2
Thread 3

Slow Mode

Transition

Fast Mode
The Value Algorithm
Slow-mode
per-access instrumentation
Consistency Check

Fast-mode
un-instrumented speed

No false conflicts
Data forwarding
The Signature Algorithm
Array of write signatures
Update entry on each write
Maintain read signature
On Transition, intersect sets
Even before!
Results
Speedup using Value algorithm
Results
Speedup using Signature algorithm
Outline
O
O
O
O

O
O
O

Motivation
Software Transactional Memory
RingSTM
STMlite
Speculative Parallelization
Fastpath
SMTX (Spec-PS-DSWP)
Example code
A: while(node) {
B: node = node−>next;
C: res = work(node);
D: write(res); }

A

B

C
Control Dependency
Data Dependency

D
Speculation
while(TRUE) {
B: node = node−>next;
C: res = work(node);
D: write(res); }

A

B

C
Control Dependency
Data Dependency

D

B
Parallel Stage
Pipelining
Stage 1 (Sequential)

node = node−>next;
B

Stage 2 (Parallel)

Stage 3
(Sequential)

C

res = work(node);
C

write(res);
D
Execution
Core 0
0
1
2
3

4
5

Core1

Core 2

Core 3

Core 4

Core 5

B0
B1

C0
B2

C1

B3

D0
C2
D1

B4
B5

C3

C4

Try
0

D2

try1

Commit 0
initialization

Copy
on
Write

Main/Commit

Copy
on
Write

Virtual Address Space

Page table
MTX creation
Page table
Page table
Page table

Copy
on
Write
Page table

Worker 2
Virtual Address Space

Main/Commit

Page table
Page table
Page table

Copy
on
Write

Communication Channel

Virtual Address Space

Virtual Address Space

Worker 1
Memory access

Main/Commit

Private

Page table
Page table
Page table

Copy
on
Write

Communication Channel

Virtual Address Space

Virtual Address Space

Copy
on
Write
Page table

Worker 2
Virtual Address Space

Commit

Page table
Page table
Page table

Private

Worker 1
Commit

Private

Page table
Page table
Page table

Copy
on
Write

Communication Channel

Virtual Address Space

Virtual Address Space

Main/Commit

Page table

Worker 2
Virtual Address Space

Commit

Page table
Page table
Page table

Private

Worker 1
or

Private

Page table
Page table
Page table

Copy
on
Write

Communication Channel

Virtual Address Space

Virtual Address Space

Main/Commit

Page table

Worker 2
Virtual Address Space

Commit

Page table
Page table
Page table

Private

Worker 1
Rollback

Main/Commit

Private

Page table
Page table
Page table

Copy
on
Write

Communication Channel

Virtual Address Space

Virtual Address Space

Copy
on
Write
Page table

Worker 2
Virtual Address Space

Commit

Page table
Page table
Page table

Private

Worker 1
Results
5
SMTX
TX

4.5
4
3.5

Speedup

3
2.5
2
1.5
1
0.5
0

1

2

3

4
5
Number of threads

6

7

8
Thank You
Automatic Loop Parallelization using STM

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Automatic Loop Parallelization using STM

Editor's Notes

  1. I’m givin’ a “brief” introduction, then I’ll give an overview of the concept of transactional memory in general, followed by a specification on the STM. We’ll then have a look on three different types of STM’s. After that, we’ll move to the application of the STM in parallelization, Speculative Parallelization, and finally the Fastpathspecualtive parallelization system. (and yes, I know/realize I only have 25 minutes to present all)
  2. I’m givin’ a “brief” introduction, then I’ll give an overview of the concept of transactional memory in general, followed by a specification on the STM. We’ll then have a look on three different types of STM’s. After that, we’ll move to the application of the STM in parallelization, Speculative Parallelization, and finally the Fastpathspecualtive parallelization system. (and yes, I know/realize I only have 25 minutes to present all)
  3. I’m givin’ a “brief” introduction, then I’ll give an overview of the concept of transactional memory in general, followed by a specification on the STM. We’ll then have a look on three different types of STM’s. After that, we’ll move to the application of the STM in parallelization, Speculative Parallelization, and finally the Fastpathspecualtive parallelization system. (and yes, I know/realize I only have 25 minutes to present all)
  4. I’m givin’ a “brief” introduction, then I’ll give an overview of the concept of transactional memory in general, followed by a specification on the STM. We’ll then have a look on three different types of STM’s. After that, we’ll move to the application of the STM in parallelization, Speculative Parallelization, and finally the Fastpathspecualtive parallelization system. (and yes, I know/realize I only have 25 minutes to present all)
  5. Holds successful writers, means no conflict with other TXs. Light blue for still writing back, dark blue for complete write back. Many TXs may be writing in the same time as long as there is no conflict. No TX can set status to complete until all previous set to completeIndex points to the newest writer in the ring
  6. I’m givin’ a “brief” introduction, then I’ll give an overview of the concept of transactional memory in general, followed by a specification on the STM. We’ll then have a look on three different types of STM’s. After that, we’ll move to the application of the STM in parallelization, Speculative Parallelization, and finally the Fastpathspecualtive parallelization system. (and yes, I know/realize I only have 25 minutes to present all)
  7. Large signature size  Large overhead, but low false positivesSmall Size  many false positives, but low overhead
  8. I’m givin’ a “brief” introduction, then I’ll give an overview of the concept of transactional memory in general, followed by a specification on the STM. We’ll then have a look on three different types of STM’s. After that, we’ll move to the application of the STM in parallelization, Speculative Parallelization, and finally the Fastpathspecualtive parallelization system. (and yes, I know/realize I only have 25 minutes to present all)
  9. Decoupled Software Pipelining, Thread-level speculation
  10. Decoupled Software Pipelining, Thread-level speculation
  11. Decoupled Software Pipelining, Thread-level speculation
  12. I’m givin’ a “brief” introduction, then I’ll give an overview of the concept of transactional memory in general, followed by a specification on the STM. We’ll then have a look on three different types of STM’s. After that, we’ll move to the application of the STM in parallelization, Speculative Parallelization, and finally the Fastpathspecualtive parallelization system. (and yes, I know/realize I only have 25 minutes to present all)
  13. Slow-mode threads must log an &lt;address, value&gt; pair for each read and each write. At the end of a slow-path execution, a thread first transitions to fast mode (by checking all reads, replaying all writes, handling any de-allocations, and fast-clearing all logs), and then increments the shadow LCV
  14. I’m givin’ a “brief” introduction, then I’ll give an overview of the concept of transactional memory in general, followed by a specification on the STM. We’ll then have a look on three different types of STM’s. After that, we’ll move to the application of the STM in parallelization, Speculative Parallelization, and finally the Fastpathspecualtive parallelization system. (and yes, I know/realize I only have 25 minutes to present all)
  15. Animations needed here