1. Abhijit Saurabh
Phone: +1 240-478-3420 | Email: abhijit.saurabh@gmail.com | https://www.linkedin.com/pub/abhijit-saurabh/4b/703/28a
Address: 8125, 48th
Ave, Unit 421. College Park, MD 20740
OBJECTIVE
An enthusiastic professional looking for full time position, having over 3.5 years of industry experience and pursuing master’s in
Computer Engineering.
EDUCATION
UNIVERSITY OF MARYLAND, COLLEGE PARK College Park, MD
Master’s in Computer Engineering Sep 2014 – May 2016
PESIT, BANGALORE Bangalore, India
Bachelor’s in Electronics & Communication Sep 2007 – Apr 2011
COURSE WORK
Networks & Protocol, Microprocessor Based Design, Compiler’s & Optimizations, Digital System Design & Synthesis, Embedded Systems,
Computer Architecture, Data structures & Algorithms, Software Engineering, Software Design & Implementation.
EXPERIENCE
GRADUATE ASSISTANT | ENTERPISE AND STORAGE GROUP | UNIVERISTY OF MARYLAND Jan 2015-Present
● Designed and implemented applications in Perl on UNIX platform used for chargeback & administration of storage &
backup services like Tivoli & EMC Isilon. Added features to group website in Drupal for ease of creating requests.
● Developed scripts to interact with Oracle databases using DBI module of Perl for various back up activities.
MEMORY DEVELOPMENT ENGINEER (INTERN) | IBM AUSTIN, TX June, 2015 – August, 2015
● Worked on developing firmware code in C++ for memory configuration as part of boot code for open power servers.
● Developed a Perl tool to parallelize and automate the functionality testing which in turns accelerated the testing process.
● Characterized DIMMs under various corner cases along with its integration with the system. Probed DIMMS and raiser
cards for Signal Integrity and also validated using DDR3 compliance package.
HARDWARE DEVELOPMENT ENGINEER | IBM BANGALORE, INDIA June 2011 - July 2014
Storage Subsystem: SSD Characterization and Tool Development
● Devised an infrastructure for characterization, data collection and automation using Perl’s DBI and CGI modules.
● Worked on Low level SCSI commands and SAS protocol, developed the tools for interacting with SSDs through native
commands. Experienced in debugging performance issues using protocol analyzers like Finisar-Xgig.
● Analyzed various driver issues and in the process explored the SSD architecture and NAND flash in detail.
● Characterized drive under various RAID configurations and also got insight into NAS and SAN architecture.
● Analyzed performance using various IOPS benchmarking tools like VDBENCH that in turn ensured quality of product.
Memory Subsystem Development
● Developed code and tools in C/C++ for Memory Controller bring up and characterization for memory subsystem.
● Worked on firmware code in C/C++ as a part of Boot driver for the IBM Power 8 systems and systems under open
power initiatives. Experienced with Linux shell scripting in developing small tools for automation.
SYSTEM ENGINEER INTERN| BROADCOM RESEARCH INDIA Jan 2011 - June 2011
 Worked on the post silicon validation of a wireless MIMO chip that went into a wireless gaming device.
 Developed shell scripts to automate the data collection and report generation.
COURSE PROJECT
 Reliable Client Server Communication using UDP in Java: Implemented reliable communication between a client and a server using
unreliable User Datagram Protocol, Ensured reliability of data by using integrity check, time-outs and re-transmission, Achieved UDP Socket
implementation and developed a distributed network application using Java
 Course Management System: Developed a course management Java application GUI for managing various aspects of student – Instructor
Interaction. The application has various features of course management like assignment, quizzes, gradebook etc.
SKILLS
Programming: C/C++, Perl, R, Embedded C, Core JAVA Databases: MySQL; Working platform: AIX, Linux, Windows;
Networking/Storage protocols: TCP/IP, SCSI, UDP, SAS, SATA, FC, PCIe, HTTP, SMTP; Additional Software: MATLAB
ACHIEVEMENTS
MAJOR PATENTS FILED/GRANTED:
DYNAMICALLY VARYING TRANSFER SIZE IN A STORAGE DEVICE FOR IMPROVED PERFORMANCE:
The patent talks about how the variation in transfer size results in performance variation and about having the dynamic lookup table to set the
appropriate transfer size to boost the performance.
http://www.google.com/patents/US9092146
DATA RETRIEVAL FROM STACKED COMPUTER MEMORY (App No- 14/276046): The innovation provides a methodology to retrieve
data from a failed memory chip by activating a secondary driver module by sending appropriate signals through memory controller.
MAJOR PAPERS PUBLISHED:
‘VREF OPTIMIZATION IN DDR4 RDIMMS FOR IMPROVED TIMING MARGINS’ in IEEE Electrical Design of Advanced Packaging and
Systems (EDAPS) Symposium 2014 held at Bangalore, India.
‘HYBRID PRE-CONDITIONING AND TIME REDUCTION TECHNIQUE DURING SSD CHARACTERIZATION’ presented at IDAC
(India Design and Automation Conference) focusing on methodology to reduce drive qualification in storage subsystem.