OpenPOWER Foundation Overview

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Steve Fields from IBM presented these slides at the recent Stanford HPC Conference.

Learn more: http://www.open-power.org/
and
http://www.hpcadvisorycouncil.com/events/2014/stanford-workshop/agenda.php
Watch the video presentation: http://insidehpc.com/2014/02/14/openpower-foundation-overview/

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OpenPOWER Foundation Overview

  1. 1. POWER OpenPOWER Foundation Overview February 2014 Steve Fields IBM Distinguished Engineer Director of Power Systems Design 1
  2. 2. Goal and Intent of OpenPOWER  Opening the architecture, providing ability to innovate across full Hardware and Software stack – Simplify system design with alternative architecture – Includes SOC design, Bus Specifications, Reference Designs – Open Source Firmware + Operating System + Hypervisor  Driving an expansion of enterprise class Hardware and Software stack for the data center  Building a complete ecosystem to provide customers with the flexibility to build servers best suited to the POWER architecture 2 POWER
  3. 3. Why form OpenPOWER? POWER  The number of companies designing & building servers is increasing – – – Traditionally there have been few companies designing systems (HP, IBM, SUN, Dell etc…) Today there are many more: Google, Microsoft, Facebook, Rackspace etc… A fairly mature ecosystem including the Taiwanese ODMs is a key enabler of this trend  Two disruptive forces are impacting these custom system designs and driving designers to seek alternative architectures – – Technology integration is migrating what is board customization today to chip customization A need for choice and options in processor sourcing  The POWER architecture is a proven server-class technology with a growing server software ecosystem  These trends creates an opportunity for a server targeted “chip-system-software” ecosystem – OpenPOWER expands the opportunity for members to grow this ecosystem  There is an opportunity for POWER to participate in Web2.0 and large-scale data centers 3
  4. 4. Giving ecosystem partners a license to innovate OpenPOWER will enable datacenters to rethink their approach to technology Member companies may use POWER for custom open servers and components for Linux based cloud data centers OpenPOWER ecosystem partners can optimize the interactions of server building blocks – microprocessors, networking, I/O & other components – to tune performance How will OpenPOWER Foundation benefit clients? – OpenPOWER technology creates greater choice for customers – Open and collaborative model on the Power platform will create more opportunity for innovation – New innovators will broaden the capability and value of the Power platform What does this mean to the industry? – Game changer on the competitive landscape of the server industry –Will enable and drive innovation in the industry –Provide more choice to the industry Platinum Members 4 POWER
  5. 5. OpenPOWER Foundation – Structure POWER OpenPOWER is an industry foundation based on the POWER architecture, enabling an Open community for development and opportunity for member differentiation and growth OPEN Ecosystem Community Channel Corp.Source Open Software Architecture & Specification Group Linkages to other groups Store Development workgroups System Design Group Specifications Reference Designs Chip Design Group Open IP Blocks Interface specifications Development groups Value Add Numerous Participants Development & Specification Complementary “FOR PROFIT” Ecosystem Store Fee based component examples • Chip IP • IBM SW stack • Member SW stack • POWER on a card or board To Ensure Compliance: All offerings must be validated Consistent with Architecture & Interface Specifications OpenPOWER Compliance 5
  6. 6. Proposed Ecosystem Enablement POWER Power Open Source Software Stack Components System Operating Environment Software Stack Software Cloud Software Standard Operating Environment (System Mgmt) XCAT Operating System / KVM Firmware OpenPOWER Firmware Hardware Existing Open Source Software Communitie s A modern development environment is emerging based on this type of tools and services New OSS Community OpenPOWER Technology Multiple Options to Design with POWER Technology Within OpenPOWER Hardware POWER8 Framework to Integrate System IP on Chip Industry IP License Model CAPP PCIe CAPI over PCIe “Standard POWER Products” – 2014 6 Customizable “Custom POWER SoC” – Future
  7. 7. Ecosystem Concept POWER WEB 2.0 SW SW FW SYS Technology Technology Open Source Linux Linux ISV ISV Open Source Open Source ODM OEM I/O I/O Networking Networking Chip Storage Chip Storage SoC Dev IP Dev FAB Welcoming members all levels Welcoming members atat all levels 7 Data Center MSP Cloud
  8. 8. POWER Membership Options  Organized as a distinct 501c6 Not-for-profit entity with a Board of Directors and a Technical Steering Committee. • Membership levels provide either a default Board of Director position (Platinum) or an opportunity to be elected to the Board (Gold, Silver, and Assoc/Academic members). The Bylaws detail additional governance by the Board including maximum seats, terms, etc. • Technical Steering Committee. Formed from the Project Leads from the core projects and one representative designated by each Platinum member  Includes tiered membership of Platinum, Gold, Silver, and individual memberships • Annual fee and dedicated full-time equivalent (FTEs) - verification of committed number of FTEs on honor system • Contributors, committers, and project leads influence Technical Steering Committee Membership Levels Membership Annual Fee Level Platinum $100k FTEs IP contribution Technical Steering Committee Board / Voting position 10 Desired significant, in addition to FTEs One seat per member not otherwise represented Includes board position Not required May be on TSC if Project Lead Gold members may elect up to one BOD member per three gold members Includes TSC position Gold $60k 3 Silver $20k 0 Not required May be on TSC if Project Lead One Board seat elected by all Silver members $0 0 Not required May be on TSC if Project Lead May be elected to one community observer board seat Associate & Academic Membership agreement, Bylaws, and IP Rights Policy available for review 8
  9. 9. OpenPOWER Foundation Progress POWER  Completed legal formation activities – Completed legal formation of entity as a standalone not-for-profit 501c6 entity, ratified Bylaws and IP Rights Policy – Formalized Board of Directors and elected officers • Chairman: Gordon MacKean, Engineering Director, Platforms, Google • President: Brad McCredie, Vice President and IBM Fellow, IBM • Vice President: Michael Diamond, Senior Director Marketing, Nvidia – Chartered Technical Steering Committee and initiated Work Groups: • System Software • Application Software • Open Server Development Platform • Hardware Architecture 9
  10. 10. POWER Work Groups and Projects Work Group Projects System Software  Linux - Little Endian Public (Open Source)  KVM Public  Firmware –OpenPower FW Interface Public  POWER LE ABI Public  System Operating Environment –OpenPOWER Software ecosystem enablement Public  Toolchain Public Application Software (Open Source) Participants Hardware Architecture  POWER8 Developer Board Restricted  POWER8 Reference Design Open Server Development Platform Restricted  Compliance Member  OpenPOWER profile of architecture –POWER8 ISA Book 1, 2, 3  Coherent Accelerator Interface Architecture (CAIA) 10 Restricted Restricted
  11. 11. OpenPOWER Foundation Next Steps POWER  Current initiatives to build industry momentum and strengthen organization – Make progress on work groups and projects, formalize process for initiating new work groups or projects – Welcome new members via individual conversations, initiate on-boarding process – Develop identity / web site  March 2014 Launch with software development environment and preliminary hardware design 11
  12. 12. POWER POWER8 Processor Technology •22nm SOI, eDRAM, 15 ML 650mm2 Caches •512 KB SRAM L2 / core •96 MB eDRAM shared L3 •Up to 128 MB eDRAM L4 (off-chip) Cores •Crypto & memory expansion •Transactional Memory •VMM assist •Data Move / VM Mobility 12 L3 Cache & Chip Interconnect Memory Mem. Ctrl. SMP Links PCIe Accelerators 8M L3 Region SMP Links Accelerators •12 cores (SMT8) •8 dispatch, 10 issue, 16 exec pipe •2X internal data flows/queues •Enhanced prefetching •64K data cache, Mem. Ctrl. 32K instruction cache Energy Management •On-chip Power Management Micro-controller •Integrated Per-core VRM •Critical Path Monitors •Up to 230 GB/s sustained bandwidth Bus Interfaces •Durable open memory attach interface •Integrated PCIe Gen3 •SMP Interconnect •CAPI (Coherent Accelerator Processor Interface)
  13. 13. POWER POWER8 Building Blocks • Flexible dynamic threading up to SMT8 Core • 64B L2 to L1 data bus • 64KB Data Cache • 32KB Instruction Cache L2 • 512KB 8-way L2 cache per core • 12-core chip provides 96MB L3 (12 x 8MB 8-way Banks) L3 • 12-core chip interconnect • 150 GB/sec x 12 segments/direction = 3.6 TB/sec System Infrastructure (SMP interconnect, memory, I/O, energy mgmt, etc) 13
  14. 14. POWER8 Memory Buffer DRAM Chips POWER …with 16MB of Cache… Memory Buffer DDR Interfaces Memory Buffer Functions •Memory Scheduling logic for 4 DIMM channels •L4 Cache for performance & energy efficiency •Energy Mgmt, RAS decision point Processor Interface •9.6 Gbit/s interface •Robust error detection & dynamic lane sparing •Extensible protocol for innovation build-out System Design Points •Support buffer on motherboard or on DIMM •Support 1, 2, 4 or 8 buffers per processor socket • Up to 230 GB/sec per processor socket • Up to 128 GB of L4 Cache per processor socket 14 Scheduler & Management 16MB POWER8 Memory Link Cache
  15. 15. POWER8 CAPI POWER Coherent Accelerator Processor Interface (CAPI) Virtual Addressing • Accelerator can work with same memory addresses that the processors use • Pointers de-referenced same as the host application • Removes OS & device driver overhead Hardware Managed Cache Coherence • Enables the accelerator to participate in “Locks” as a normal thread Lowers Latency over IO communication model Custom Hardware Application PSL FPGA or ASIC 15 POWER8 POWER8 Coherence Bus CAPP PCIe Gen 3 Transport for encapsulated messages Processor Service Layer (PSL) • Present robust, durable interfaces to applications • Offload complexity / content from CAPP
  16. 16. CAPI for Hardware Acceleration Custom Hardware Application PSL FPGA or ASIC  Custom Hardware Acceleration Unit (FPGA or ASIC) – Implement specific system, middleware or application function – Written to durable interface provided by PSL  Accelerator function operates as part of application – Behaves as another hardware thread running the application – Eliminates overhead associated with traditional PCIe attach 16 POWER
  17. 17. CAPI for Attachment of I/O Devices I/O Controller Network or Storage Interface PSL FPGA or ASIC  I/O Device can operate at user level – Behaves as another hardware thread running the application – Eliminates overhead associated with traditional I/O Device Driver model • No pinned pages or memory copies required • Ability to address all of system memory  Advantages of CAPI protocol being transported over PCIe Gen3 interfaces – Compatible with industry ASIC design capabilities – Same device able to operate in PCIe and CAPI modes – CAPI devices have access to system tailstock for external connectivity 17 POWER
  18. 18. OpenPOWER Foundation Benefits POWER System Design  Open the POWER Architecture to enable broader usage and collaboration  Enable and drive innovation in the industry Data Center  Enable innovation across the stack to optimize deployment  Enable choice in architecture and processor sourcing Customer  Greater choice  New levels of capability through innovation and broad collaboration in the POWER platform 18
  19. 19. POWER Membership Application and Inquiries Membership Levels Membership Annual Fee Level Platinum $100k FTEs IP contribution Technical Steering Committee Board / Voting position 10 Desired significant, in addition to FTEs One seat per member not otherwise represented Includes board position Not required May be on TSC if Project Lead Gold members may elect up to one BOD member per three gold members Includes TSC position Gold $60k 3 Silver $20k 0 Not required May be on TSC if Project Lead One Board seat elected by all Silver members $0 0 Not required May be on TSC if Project Lead May be elected to one community observer board seat Associate & Academic Membership agreement, Bylaws, and IP Rights Policy available for review Very simple 2-page application: •Contact information for Representative, Accounts Payable contact, Technical contact, Marketing/Communications contact •Desired Level of Membership •Signature For further information email 19 info@open-power.org
  20. 20. POWER POWER 20 20 IBM Confidential Confidential © 2013 OpenPOWER

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