Support for three different Ethernet physical interfaces:
— 100-Mbps IEEE 802.3 MII
— 10-Mbps IEEE 802.3 MII
— 10-Mbps 7-wire interface (industry standard)
Programmable max frame length supports IEEE 802.1 VLAN tags and priority.
IEEE 802.3 full duplex flow control.
Automatic internal flushing of the receive FIFO for runts (collision fragments) and address recognition rejects (no processor bus utilization).
FEC Block Diagram
Analog-to-Digital Converter (ADC12) • Linear successive approximation algorithm with 12-bit resolution. • Up to 28 analog inputs. • Output formatted in 12-, 10-, or 8-bit right-justified unsigned format. • Single or continuous conversion. • Configurable sample time and conversion speed/power. • Conversion complete flag and interrupt. • Input clock selectable from up to four sources. • Operation in wait or stop3 modes for lower noise operation. • Asynchronous clock source for lower noise operation.