MCF51CN128 ColdFire Microcontrollers <ul><li>Source: Freescale </li></ul>
Introduction <ul><li>Purpose </li></ul><ul><ul><li>An Overview Study on   The MCF51CN128 Series Microcontrollers </li></ul...
Features  <ul><li>32-bit ColdFire V1 Central Processing Unit (CPU)  </li></ul><ul><li>Up to 50.33 MHz ColdFire CPU from 3....
Target Applications  <ul><li>Building control  </li></ul><ul><li>Industrial operator interfaces  </li></ul><ul><li>Consume...
Block Diagram of MCF51CN128
Version 1 ColdFire CPU core <ul><li>Two-stage instruction fetch pipeline (IFP) </li></ul><ul><li>—  Instruction address ge...
MCF51CN128 Series Memory Map  <ul><li>MCF51CN128 includes 128K bytes of flash memory.  </li></ul><ul><li>Flash configurati...
Timer/PWM Module (TPM)
Modulo Timer (MTIM) <ul><li>8-bit up-counter:  </li></ul><ul><li>Free-running or 8-bit modulo limit, Software controllable...
Block Diagram of IIC  <ul><li>Multi-master operation  </li></ul><ul><li>Software programmable for one of 64 different seri...
Fast Ethernet Controller (FEC) <ul><li>Support for three different Ethernet physical interfaces:  </li></ul><ul><ul><li>— ...
Analog-to-Digital Converter (ADC12) •  Linear successive approximation algorithm with 12-bit resolution. •  Up to 28 analo...
Serial Peripheral Interface (SPI) <ul><li>Master or slave mode operation.  </li></ul><ul><li>Full-duplex or single-wire bi...
SCI Module Block Diagram  <ul><li>Full-duplex, standard non-return-to-zero (NRZ) format.  </li></ul><ul><li>Double-buffere...
Real-Time Counter (RTC) <ul><li>8-bit up-counter </li></ul><ul><ul><li>—  8-bit modulo match limit  </li></ul></ul><ul><ul...
RGPIO Block Diagram  <ul><li>16 bits of high-speed GPIO functionality connected to the processor’s local 32-bit bus.  </li...
Development Tools <ul><li>TWR-MCF51CN features the MCF51CN128 </li></ul><ul><ul><li>MCU in an 80-pin LQFP package with </l...
Additional Resource <ul><li>For ordering the MCF51CN128, please click the part list or </li></ul><ul><li>Call our sales ho...
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MCF51CN128 ColdFire Microcontrollers

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An Overview Study on The MCF51CN128 Series Microcontrollers

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MCF51CN128 ColdFire Microcontrollers

  1. 1. MCF51CN128 ColdFire Microcontrollers <ul><li>Source: Freescale </li></ul>
  2. 2. Introduction <ul><li>Purpose </li></ul><ul><ul><li>An Overview Study on The MCF51CN128 Series Microcontrollers </li></ul></ul><ul><li>Outline </li></ul><ul><ul><li>Features and applications </li></ul></ul><ul><ul><li>Block diagram, V1 cold-fire CPU core. </li></ul></ul><ul><ul><li>Memory map, timer, Modulo timer </li></ul></ul><ul><ul><li>IIC, FEC, ADC, SPI, SCI, RTC, RGPIO </li></ul></ul><ul><li>Content </li></ul><ul><ul><li>18 pages </li></ul></ul>
  3. 3. Features <ul><li>32-bit ColdFire V1 Central Processing Unit (CPU) </li></ul><ul><li>Up to 50.33 MHz ColdFire CPU from 3.6 V to 3.0 V, up to 40 MHz CPU from 3.0 V to 2.1 V, and up to 20 MHz CPU from 2.1 V to 1.8 V across temperature range of –40 °C to 85 °C </li></ul><ul><li>Support for up to 45 peripheral interrupt requests and 7 software interrupts </li></ul><ul><li>On-Chip Memory:128 KB Flash, 24 KB RAM </li></ul><ul><li>Flash read/program/erase over full operating voltage and temperature </li></ul><ul><li>Ethernet: 10/100 Base-T/TX capability, half-duplex or full-duplex transmission </li></ul><ul><li>Fast analog-to-digital converter (ADC) </li></ul><ul><ul><li>• 12 analog input channels </li></ul></ul><ul><ul><li>• 12-bit resolution </li></ul></ul><ul><ul><li>• 2.5 μs conversion time </li></ul></ul><ul><li>Up to 70 general purpose input/ output (GPIO) </li></ul><ul><li>Power-Saving Modes, Clock Source Options </li></ul>
  4. 4. Target Applications <ul><li>Building control </li></ul><ul><li>Industrial operator interfaces </li></ul><ul><li>Consumer and industrial appliances </li></ul><ul><li>Medical monitoring and instrumentation </li></ul><ul><li>Point-of-sale and courier systems </li></ul><ul><li>Security and building control systems </li></ul>
  5. 5. Block Diagram of MCF51CN128
  6. 6. Version 1 ColdFire CPU core <ul><li>Two-stage instruction fetch pipeline (IFP) </li></ul><ul><li>— Instruction address generation (IAG) </li></ul><ul><li>— Calculates the next prefetch address </li></ul><ul><li>— Instruction fetch cycle (IC) </li></ul><ul><li>— Initiates prefetch on the processor’s local bus </li></ul><ul><li>— Instruction buffer (IB) </li></ul><ul><li>— Optional buffer stage minimizes fetch latency effects using FIFO queue </li></ul><ul><li>Two-stage operand execution pipeline (OEP) </li></ul><ul><li>— Decode and select/operand fetch cycle (DSOC) </li></ul><ul><li>— Decodes instructions and fetches the required components for effective address calculation, or the operand fetch cycle </li></ul><ul><li>— Address generation/execute cycle (AGEX) </li></ul><ul><li>— Calculates operand address or executes the instruction </li></ul>
  7. 7. MCF51CN128 Series Memory Map <ul><li>MCF51CN128 includes 128K bytes of flash memory. </li></ul><ul><li>Flash configuration data is located at 0x(00)00_0400. </li></ul><ul><li>The region from 0x(00)40_0000 through 0x(00)7F_FFFF can be used by the Mini-FlexBus for off-chip expansion. </li></ul><ul><li>The 2 MB region at 0x(00)80_0000 is allocated for on-chip RAM. </li></ul>
  8. 8. Timer/PWM Module (TPM)
  9. 9. Modulo Timer (MTIM) <ul><li>8-bit up-counter: </li></ul><ul><li>Free-running or 8-bit modulo limit, Software controllable interrupt on overflow, Counter reset bit (TRST), Counter stop bit (TSTP). </li></ul><ul><li>Four software selectable clock sources for input to prescaler: </li></ul><ul><li>System bus clock, rising edge, Fixed frequency clock (XCLK), rising edge, External clock source on the TCLK pin, rising edge, External clock source on the TCLK pin, falling edge. </li></ul><ul><li>Nine selectable clock prescale values: </li></ul><ul><li>Clock source divide by 1, 2, 4, 8, 16, 32, 64, 128, or 256 </li></ul>
  10. 10. Block Diagram of IIC <ul><li>Multi-master operation </li></ul><ul><li>Software programmable for one of 64 different serial clock frequencies </li></ul><ul><li>Interrupt driven byte-by-byte data transfer </li></ul><ul><li>Calling address identification interrupt </li></ul><ul><li>Support System Management Bus Specification (SMBus), version2 </li></ul><ul><li>Bus busy detection </li></ul><ul><li>General call recognition </li></ul><ul><li>10-bit address extension </li></ul><ul><li>Programmable glitch input filter </li></ul><ul><li>Acknowledge bit generation/detection </li></ul><ul><li>START and STOP signal generation/detection. </li></ul>
  11. 11. Fast Ethernet Controller (FEC) <ul><li>Support for three different Ethernet physical interfaces: </li></ul><ul><ul><li>— 100-Mbps IEEE 802.3 MII </li></ul></ul><ul><ul><li>— 10-Mbps IEEE 802.3 MII </li></ul></ul><ul><ul><li>— 10-Mbps 7-wire interface (industry standard) </li></ul></ul><ul><li>Programmable max frame length supports IEEE 802.1 VLAN tags and priority. </li></ul><ul><li>IEEE 802.3 full duplex flow control. </li></ul><ul><li>Automatic internal flushing of the receive FIFO for runts (collision fragments) and address recognition rejects (no processor bus utilization). </li></ul>FEC Block Diagram
  12. 12. Analog-to-Digital Converter (ADC12) • Linear successive approximation algorithm with 12-bit resolution. • Up to 28 analog inputs. • Output formatted in 12-, 10-, or 8-bit right-justified unsigned format. • Single or continuous conversion. • Configurable sample time and conversion speed/power. • Conversion complete flag and interrupt. • Input clock selectable from up to four sources. • Operation in wait or stop3 modes for lower noise operation. • Asynchronous clock source for lower noise operation.
  13. 13. Serial Peripheral Interface (SPI) <ul><li>Master or slave mode operation. </li></ul><ul><li>Full-duplex or single-wire bidirectional option. </li></ul><ul><li>Programmable transmit bit rate. </li></ul><ul><li>Double-buffered transmit and receive. </li></ul><ul><li>Serial clock phase and polarity options. </li></ul><ul><li>Slave select output. </li></ul><ul><li>Selectable MSB-first or LSB-first shifting. </li></ul>
  14. 14. SCI Module Block Diagram <ul><li>Full-duplex, standard non-return-to-zero (NRZ) format. </li></ul><ul><li>Double-buffered transmitter and receiver with separate enables. </li></ul><ul><li>Programmable baud rates (13-bit modulo divider) </li></ul><ul><li>Interrupt-driven or polled operation. </li></ul><ul><li>Hardware parity generation and checking. </li></ul><ul><li>Programmable 8-bit or 9-bit character length. </li></ul><ul><li>Receiver wakeup by idle-line or address-mark. </li></ul><ul><li>Optional 13-bit break character generation / 11-bit break character detection. </li></ul><ul><li>Selectable transmitter output polarity. </li></ul>
  15. 15. Real-Time Counter (RTC) <ul><li>8-bit up-counter </li></ul><ul><ul><li>— 8-bit modulo match limit </li></ul></ul><ul><ul><li>— Software controllable periodic interrupt on match </li></ul></ul><ul><li>Three software selectable clock sources for input to prescaler with selectable binary-based and decimal-based divider values </li></ul><ul><ul><li>— 1-kHz internal low-power oscillator (LPO) </li></ul></ul><ul><ul><li>— External clock (ERCLK) </li></ul></ul><ul><ul><li>— 32-kHz internal clock (IRCLK) </li></ul></ul>
  16. 16. RGPIO Block Diagram <ul><li>16 bits of high-speed GPIO functionality connected to the processor’s local 32-bit bus. </li></ul><ul><li>Memory-mapped device connected to the ColdFire core’s local bus. </li></ul><ul><li>Data bits can be accessed directly or via alternate addresses to provide set, clear, and toggle functions. </li></ul><ul><li>Unique data direction and pin enable control registers. </li></ul><ul><li>All reads and writes complete in a single data phase cycle for zero wait-state response. </li></ul>
  17. 17. Development Tools <ul><li>TWR-MCF51CN features the MCF51CN128 </li></ul><ul><ul><li>MCU in an 80-pin LQFP package with </li></ul></ul><ul><ul><li>Ethernet connectivity </li></ul></ul><ul><li>TWR-MCF51CN-KIT, which includes: </li></ul><ul><ul><li>TWR-MCF51CN standalone development </li></ul></ul><ul><ul><li>board </li></ul></ul><ul><ul><li>TWR-SER serial board that supports </li></ul></ul><ul><ul><li>Ethernet, USB, RS232, RS485 and CAN </li></ul></ul><ul><ul><li>TWR-ELEV elevator boards that connect </li></ul></ul><ul><ul><li>the MCU and serial boards </li></ul></ul><ul><ul><li>USB and Ethernet cables </li></ul></ul><ul><ul><li>Interactive DVD complete with tools, software, lab supplements and other helpful resources </li></ul></ul><ul><li>CodeWarrior Development Studio for Microcontrollers is a single tool suite that supports software development for applications targeting either Freescale’s 8-bit or 32-bit microcontrollers. </li></ul>TWR-MCF51CN-KIT
  18. 18. Additional Resource <ul><li>For ordering the MCF51CN128, please click the part list or </li></ul><ul><li>Call our sales hotline </li></ul><ul><li>For more product information go to </li></ul><ul><ul><li>http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MCF51CN128&tid=m32TWR </li></ul></ul><ul><li>For additional inquires contact our technical service hotline or even use our “Live Technical Chat” online facility </li></ul>

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