More than Just Lines on a Map: Best Practices for U.S Bike Routes
Fedora Electronics Laboratory - FOSS.IN 2008
1. Design, Simulate and Program electronics,
don't waste your time compiling EDA tools.
electronic lab
Past, Present and Future
Aanjhan RANGANATHAN
tuxmaniac@fedoraproject.org
http://chitlesh.fedorapeople.org/FEL/
FUDConBrussels 2007 chitlesh@fedoraproject.org
2. Motivation
Immense variety of tools used
Growth of fabless business model
Increasing complexity in deployment of Design
platform
Need for more collaboration among the Free Software
EDA developers a.k.a Interoperability :)
FUDConBrussels 2007 chitlesh@fedoraproject.org
3. Result – Fedora Electronic Lab
Ready for Deployment ASIC Design Process tools
Standard 0.13µm cell libraries
Design tools for RTL/Logic Synthesis, Analog
Simulation, Micro controller Programming, H/W
Development and Debugging, Verification and
Documentation, Project Management
FUDConBrussels 2007 chitlesh@fedoraproject.org
4. History and Achievements
From a handful of tools to a complete simulation platform
Several Universities adopt, good feedbacks.
Compilation of LEON Sparc processor and DLX
processor
Attraction at LinuxTag2008, FOSDEM
FEL LiveCD shipped with YOU Magazine
FUDConBrussels 2007 chitlesh@fedoraproject.org
5. Current Status
A LiveDVD based on KDE4 now
Around 30 packages under FEL banner
Satisfactory level of Interoperability between tools
FUDConBrussels 2007 chitlesh@fedoraproject.org
6. Future Work
Addition of more packages (e.g. TkGate, Electric)
Possibility of rolling in XMOS Tools
Upstream <--> FEL <--> Upstream
Push more packages into “Extra Packages for
Enterprise Linux (EPEL)”
FUDConBrussels 2007 chitlesh@fedoraproject.org
7. Future Work.. (contd)
Collaboration with other related Special Interest Groups
Increase the availability of quick start tutorials
and examples as a package itself
Better test framework for FEL packages
FUDConBrussels 2007 chitlesh@fedoraproject.org