1. RESUME SUBASH RAO
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SUBASH RAO
Phone: 9840726851
Mailto: applesubash@gmail.com
_____________________________________________________________________________________________
Objective
To work in a well reputed organization that effectively utilizes my technical, analytical, interpersonal,
leadership and organizational skills to develop solutions, which helps the organization in not only meeting
its targets, but also allows it to grow, thereby, enhancing my own skills as an individual and as a key
player in the organization's development.
Education Summary
Qualification Category Year of
Passing
Board/University Percentage
of Marks
College/School
Master Of Technology
(VLSI DESIGN)
2016 Deemed
University
80 Sathyabama
University
Bachelor Of Engineering
(Electronics and Communication
Engineering)
2012 Anna University 80.06 Vel Tech
Engineering College
12th Standard 2008 State Board 91.25 Smt.Chandabai
Pagariya Jain
Mat.Hr.Sec School
10th Standard 2006 Matriculation 87 Smt.Chandabai
Pagariya Jain
Mat.Hr.Sec School
Technical Skills
Software Programming Languages: Core Java, C, C++
Operating System: Windows 10,Windows XP ,Linux.
Databases : SQL Server, Oracle 10g
Tools Eclipse IDE, SQL Server Management,QC,Jenkins,HP ALM
Achievements
1) I have obtained certification in ‘Oracle certified Java Programming’ (OCJP).
2) I have received intense Selenium training and created simple projects in Java,

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3) I have completed Diploma in Java Technologies (DJVT).
4) I have completed and acquired certificate in Basics in C, C++.
5) I have got certificate in Mainframe Application Programming.
6) I had secured school first in SSLC and school second in HSC.
Industrial Exposure
 Industrial visit to BSNL, Maraimali nagar, Chennai.
 Industrial visit to Bharat electronics ltd, Bangalore.
Academic Project Details (UG & PG)
Project: Train traffic signaling using automatic block signal over TT can.
Project area: Embedded.
Description: Automatic Block Signaling is an advanced train safety system used to control
railway traffic safely; essentially to prevent trains from colliding against each other. Trains cannot
collide with each other if they are not permitted to occupy the same section of track at the same
time, so railway lines are divided into sections known as blocks. In normal circumstances, only
one train is permitted in each block at a time. This principle forms the basis of railway safety
systems.
Project: Design Of VCO, Edge combiner and amplifier using VERILOG HDL.
Project area: VLSI.
Description: The concept of VCO, Edge combiner and amplifier is studied. The integrated
source code for the design is developed. The design is then synthesized and simulated using
VERILOG HDL to obtain the result.
PERSONAL PROFILE
DATE OF BIRTH : 12-08-1990
GENDER : Male
NATIONALITY : Indian
MARITAL STATUS : Single
FATHER’S NAME : G.Ravi Rao
MOTHER’S NAME : R.Manjula Bai
STRENGTH : Commitment and Innovative

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LANGUAGES KNOWN : English, Tamil, Marathi, and Hindi
DECLARATION
I hereby declare that all the above given details are true to the best of my knowledge
and I assure you that I will bring great pride to the organization if given me a chance.
SUBASH RAO