IBM CAPIの概要です。
この資料は、「IBM CAPIのシミュレーション環境」を説明した資料の最初の部分です。
「IBM CAPIのシミュレーション環境」では、Ubuntu 14.04 + ModelSim ASE 10.4dでソフトウェアとハードウェアとのコ・シミュレーションを実際に経験できるような構成になっています。
An overview of IBM CAPI.
This document is the first part of the document that describes "IBM CAPI simulation environment".
"IBM CAPI simulation environment" is configured so that you can actually experience co-simulation of software and hardware with Ubuntu 14.04 + ModelSim ASE 10.4 d.
5. The Coherent Accelerator Processor Interface (CAPI) is a general
term for the infrastructure of attaching a
coherent accelerator to an IBM POWER® system.
The main application is executed on the host processor
with computation-heavy functions executing on the accelerator.
The accelerator is a full peer to the host
processor, with direct communication with the application. The
accelerator uses an unmodified effective
address with full access to the real address
space.
It uses the processor’s page tables directly with page
faults handled by system software.
Coherent Accelerator Processor Interface
11. AFU
POWER8とFPGAの関係
CAPP
PCIe FPGA
PHB : PCIe Host Bridge
CAPP : Coherently Attached
Processor Proxy
PSL : Power Service Layer
AFU : Accelerator Function Unit
PHB
CPU
POWER8
PSL
12. AFU
PSL : POWER Service Layer
CAPP
PCIe FPGA
PSLは、IBMが開発
CAPI対応FPGAボードベンダから提
供される (IBMから供給)
PHB
CPU
POWER8
PSL
13. PSL : POWER Service Layer
The PSL provides the translation and interrupt
services that the AFU needs.
This is what the kernel interacts with.
For example, if the AFU needs to read a particular effective
address, it sends that address to the PSL, the PSL then
translates it, fetches the data from memory and returns it to the
AFU.
If the PSL has a translation miss, it interrupts the kernel and the
kernel services the fault. The context to which this fault is
serviced is based on who owns that acceleration function.
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/pl
ain/Documentation/powerpc/cxl.txt
14. AFU
AFU : Accelerator Function Unit
CAPP
PCIe FPGA
AFUは、ユーザが開発
HDL(Verilog HDL/VHDL)でなく、
HLSなどを使ってC/C++でも可能
PHB
CPU
POWER8
PSL