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WELCOME
Daffodil International University
Subject: Theory of Computing
Benzir Ahmed
Speaker
Daffodil International University
Department :Computer Science and Engineering
Faculty :Science and Information Technology
Topic: State Minimization
State Minimization
Why : 1. Reduce number of latches
assign minimum-length encoding
only as the logarithm of the number
of states
2. Increase the number of unassigned states
codes
heuristic to improve state-assignment
and logic-optimization
Goal: Identify and remove redundant states
(states which can not be observed)
Let’s Get Start
0
0 0
0
0
0
0
0
1
1 1
1
1
1
1
1
A B
E F
D
G H
C
Let’s Consider an Example-
The Process
Find out the accepting state.
Remove unreachable states.
Draw pairs
Combining unmarked state
0
0 0
0
0
0
0
0
1
1 1
1
1
1
1
1
A B
E F
D
G H
C
Drawing pairs
B
C
E
F
G
H
BA C E F G
0
0
0
0
0
0
0
1
1 1
1
1
1
1
A B
E F G H
C
A B C D E F G H
A B C D E F G H
ROW
COLUMN
Drawing pairs
B
C
E
F
G
H
BA C E F G
X₀ X₀
X₀
X₀
X₀
X₀
0
0
0
0
0
0
0
1
1 1
1
1
1
1
A B
E F G H
C
A B C D E F G H
A B C D E F G H
ROW
COLUMN
B
C
E
F
G
H
BA C E F G
X₀ X₀
X₀
X₀
X₀
X₀
0
0
0
0
0
0
0
1
1 1
1
1
1
1
A B
E F G H
C
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁ X ₁ B
B
0
1
G
C
A
A
0
1
B
F
B
C
E
F
G
H
BA C E F G
X₁
X₁
X₁
X₁
X₁
X₁
X₁
X₁
X₁ X₁
X₁
X₁
X₀ X₀
X₀
X₀
X₀
X₀
0
0
0
0
0
0
0
1
1 1
1
1
1
1
A B
E F G H
C
X₂
G
G
0
1
G
E
A
A
0
1
B
F
B
C
E
F
G
H
BA C E F G
X₀ X₀
X₀
X₀
X₀
X₀
0
0
0
0
0
0
1
1
1
1
1
B,H
F G
CA,E
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁
X ₁ X ₁
The Result
X₂
ANY
QUESTIONS?
THANKS FOR
WATCHING

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State minimization in theory of computing

  • 1. WELCOME Daffodil International University Subject: Theory of Computing Benzir Ahmed Speaker Daffodil International University Department :Computer Science and Engineering Faculty :Science and Information Technology Topic: State Minimization
  • 2. State Minimization Why : 1. Reduce number of latches assign minimum-length encoding only as the logarithm of the number of states 2. Increase the number of unassigned states codes heuristic to improve state-assignment and logic-optimization Goal: Identify and remove redundant states (states which can not be observed) Let’s Get Start
  • 3. 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A B E F D G H C Let’s Consider an Example-
  • 4. The Process Find out the accepting state. Remove unreachable states. Draw pairs Combining unmarked state 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A B E F D G H C
  • 5. Drawing pairs B C E F G H BA C E F G 0 0 0 0 0 0 0 1 1 1 1 1 1 1 A B E F G H C A B C D E F G H A B C D E F G H ROW COLUMN
  • 6. Drawing pairs B C E F G H BA C E F G X₀ X₀ X₀ X₀ X₀ X₀ 0 0 0 0 0 0 0 1 1 1 1 1 1 1 A B E F G H C A B C D E F G H A B C D E F G H ROW COLUMN
  • 7. B C E F G H BA C E F G X₀ X₀ X₀ X₀ X₀ X₀ 0 0 0 0 0 0 0 1 1 1 1 1 1 1 A B E F G H C X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ B B 0 1 G C A A 0 1 B F
  • 8. B C E F G H BA C E F G X₁ X₁ X₁ X₁ X₁ X₁ X₁ X₁ X₁ X₁ X₁ X₁ X₀ X₀ X₀ X₀ X₀ X₀ 0 0 0 0 0 0 0 1 1 1 1 1 1 1 A B E F G H C X₂ G G 0 1 G E A A 0 1 B F
  • 9. B C E F G H BA C E F G X₀ X₀ X₀ X₀ X₀ X₀ 0 0 0 0 0 0 1 1 1 1 1 B,H F G CA,E X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ X ₁ The Result X₂