This document discusses paging in computer memory management. It defines paging as dividing memory into fixed-size pages, and physical memory into fixed-size frames. The memory management unit (MMU) uses a page table to map logical page numbers to physical frame numbers, translating virtual addresses to physical addresses. Typical page and frame sizes are powers of 2, from 512 bytes to 16 MB. Paging allows flexible and efficient use of physical memory and faster data access.

2. Aiman Rana
14-126
Rafia Sardar
14-130
Maida Akram
14-111
Iqra Siddique
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Sidra Majeed
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BS IT 4th (Evening)

3. P A G I N G

5. PAGING
MMU
Page
Page
Table
Frame

6. IIt Is A Set Of Registers
And Mechanisms To
Translate Virtual
Addresses To Physical
Addresses .
CPU
MMU
Memory i/O Device
Logical Address
Physical
address

7. oDivision of logical memory into fixed
size of blocks
oContinuous range of addresses
oLogical concept
oEqual size
oPresent in any order

8. oDivision of Physical memory into
fixed size of blocks
oCounterpart of Pages
oReality
oEqual size
Page size = Frame size
oPresent in any Order

9. Paging is a memory management
technique in which the memory is
divided into fixed size of Pages .
Paging is used for faster access of
data

10. Paging requires
additional
hardware support
in the form of
page table .
0 1
1 4
2 3
3 7
Page Table
Page no Frame no

11. Every logical address generated by CPU consist of two
parts
o Page number(P)
o Page displacement(d)/ Offset
(P) (d)
Page number (p) – used as an index into a page
table which contains base address of each page in
physical memory
Page offset (d) – combined with base address to
define the physical memory address that is sent to
the memory unit
Page number Page Displacement

12. o Page size & frame size are hardware dependent
o Typical values will range from 512 Bytes to 16 MB
per page
o Logical address space 2m and page size 2n
o High order m-n bits of a logical address will
designate the page number
o Low order n bits will designate page
displacement
Page number Page Displacement
m-n bits n bits

13. Page size = 8 Bytes (23)
 logical address Space = 128 Bytes (27)
Total page = 128/8 = 16 pages
Frame size = 8 Bytes
Physical memory Address = 1024
Bytes(210)
Total frames = 1024/8 = 128 frames
Page no = m-n
 = 7-3 = 4
Page displacement = n= 3

14. Page Displacement
0 1 2 3 4 5 6 7
0 0 1 2 3 4 5 6 7
1 8 9 10 11 12 13 14 15
2 16 17 18 19 20 21 22 23
3 24 25 26 27 28 29 30 31
4 32 33 34 35 36 37 38 39
5 40 41 42 43 44 45 46 47
6 48 49 50 51 52 53 54 55
7 56 57 58 59 60 61 62 63
8 64 65 66 67 68 69 70 71
9 72 73 74 75 76 77 78 79
10 80 81 82 83 84 85 86 87
11 88 89 90 91 92 93 94 95
12 96 97 98 99 100 101 102 103
13 104 105 106 107 108 109 110 111
14 112 113 114 115 116 117 118 119
15 120 121 122 123 124 125 126 127

16. Page 0
Page 1
Page 2
Page 3
0 1
1 4
2 3
3 7
0
1 Page 0
2
3 Page 2
4 Page 1
5
6
7 Page 3
Logical Memory
Page table
Physical Memory

18. Logical Address
Page
Displacement
0 1 2 3
0 0 1 2 3
1 4 5 6 7
2 8 9 10 11
3 12 13 14 15
Page Table
0 1
1 4
2 3
3 7
Frame Address
0 0 1 2 3
1 4 5 6 7
2 8 9 10 11
3 12 13 14 15
4 16 17 18 19
5 20 21 22 23
6 24 25 26 27
7 28 29 30 31Logical Memory
Physical memory

19. Translation of the logical address to the physical
address follows the form
Physical address=(frame#*number bytes)+displacement
e.g.
Logical address of 7 in the physical
memory????
physical Address = (4*4)+3 = 19

20. Easy to allocate physical memory
pick any free frame
No external fragmentation
All frames are equal
Minimal internal fragmentation
Bounded by page/frame size
Easy to swap out pages (called page out)
Size is usually a multiple of disk blocks
PTEs may contain info that help reduce disk traffic
Processes can run with not all pages
swapped in