SPICE MODEL of NJU7052D in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.

1. Device Modeling Report
COMPONENTS: OPERATIONAL AMPLIFIER
PART NUMBER: NJU7052D
MANUFACTURER: NEW JAPAN RADIO
REMARK TYPE: (CMOS OPAMP)
Bee Technologies Inc.
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

2. SPICE MODEL
OUT1 1 8 VDD
IN-1 2 7 OUT2
IN+1 3 6 IN-2
- + + -
VSS 4 5 IN+2
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

3. MOSFET MODEL
Pspice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Modility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

4. Output Voltage Swing
Simulation result
Simulation
Evaluation Circuit
U3
OUT1 1 8 VDD
IN-1 2 7 OUT2
IN+1 3 6 IN-2
OUT - + + -
VSS 4 5 IN+2 V3
R3 3
V2
1MEG V1 NJU7052
1.45
1.55
0
Compasion Table
Measurement Simulation %Error
VOM (V) 2.94 2.939 -0.034
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

5. Input Current
Simulation result
Simulation
Evaluation Circuit
U3
OUT1 1 8 VDD
OUT
IN-1 2 7 OUT2
IN+1 3 6 IN-2
- + + -
VSS 4 5 IN+2 V3
3
V2
V1 nju7052
0
0
0
Compasion Table
Measurement Simulation % Error
Ib (pA) 1 1.002 0.2
IOS (pA) 1 0.995 -0.5
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

6. Input Offset Voltage
Simulation result
Simulation
Evaluation Circuit
U2
OUT1 1 8 VDD
OUT
IN-1 2 7 OUT2
IN+1 3 6 IN-2
- + + -
VSS 4 5 IN+2 V2
3
NJU7052
V1
3
0
Compasion Table
Measurement Simulation %Error
VOS (mV) 2 1.973 -1.35
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

7. Open loop Voltage Gain
Simulation result
Simulation
Evaluation Circuit
U4
OUT1 1 8 VDD
OUT
IN-1 2 7 OUT2
IN+1 3 6 IN-2
- + + -
VSS 4 5 IN+2 V2
IN
3
nju7052
V1
VOFF = 0
VAMPL = 0
FREQ = 0
AC = 1m
DC = -1.9730m
0
Compasion Table
Measurement Simulation %Error
Av (dB) 90 90.309 0.343
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

8. Unity Gain Frequency
Simulation result
Simulation
Evaluation Circuit
U4
R1 out
OUT1 1 8 VDD
100k IN-1 2 7 OUT2
IN+1 3 6 IN-2
IN - + + -
VSS 4 5 IN+2 V2
R2 10
1k C1
nju7052
VOFF = 0
10p V11 VAMPL = 0
FREQ = 0
DC = 47.033m
AC = 1m
0
0
Compasion Table
AV=40dB,CL=10pF Measurement Simulation %Error
Ft(MHz) 0.1 0.104 4
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

9. Common-Mode Rejection Ratio
Simulation result
Simulation
ACM=1.8269/202.062m
Evaluation Circuit
U1
OUT1 1 8 VDD
IN-1 2 7 OUT2
IN+1 3 6 IN-2
V2 - + + -
-1.9730m VSS 4 5 IN+2
V3
nju7052
3
V1
VOFF = 0
VAMPL = 0.5
FREQ = 1
AC = 1m
DC = 0
0
CMRR = AV/ACM
Compasion Table
Measurement Simulation %Error
CMRR (dB) 70 71.1844 1.691
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005

10. Slew Rate
Simulation result
Simulation
Evaluation Circuit
U2
OUT
OUT1 1 8 VDD
IN-1 2 7 OUT2
IN+1 3 6 IN-2
V1 = 0 - + + -
VSS 4 5 IN+2
V2 = 3 V1
TD = 50u V2
V3 nju7052
TR = 10n
TF = 10n 0
PW = 1m 3
PER = 10m
0
Measurement Simulation % Error
SR (V/us) 0.05 0.048 -4
All Rights Reserved Copyright (C) Bee Technologies Inc. 2005