This document summarizes a 21-day project to port FreeRTOS to the Raspberry Pi 2. A team of 4 students led by Huang Min ported FreeRTOS to the quad-core ARM Cortex-A7 processor and 1GB RAM of the Raspberry Pi 2 over 21 days under the guidance of instructor Joseph. The document outlines the features of FreeRTOS, development tools used, basic ARM boot process, interrupt handling, and steps taken to port FreeRTOS by implementing timer interrupts and context switching. Basic GPIO and UART drivers were developed along with task communication and CLI application demos.
The document discusses the construction of the Linux kernel image. It describes how the kernel code is organized and hardware-independent. It then explains the process of building the composite kernel image (vmlinux) by linking object files together. This involves using the linker to combine files like head.o, piggy.o and misc.o into a binary image. It also discusses the roles of the bootstrap loader and how it loads and decompresses the kernel image.
This document provides an introduction to Verilog HDL including:
- An overview of Verilog keywords, data types, abstraction levels, and design methodology.
- Details on the history of Verilog including its development over time and transitions to newer standards.
- Explanations of key Verilog concepts like modules, ports, instantiation, stimuli, and lexical conventions.
Modules are the basic building blocks, ports define module interfaces, and instantiation replicates modules. Stimuli provide test inputs and lexical conventions cover syntax rules.
This document summarizes a 21-day project to port FreeRTOS to the Raspberry Pi 2. A team of 4 students led by Huang Min ported FreeRTOS to the quad-core ARM Cortex-A7 processor and 1GB RAM of the Raspberry Pi 2 over 21 days under the guidance of instructor Joseph. The document outlines the features of FreeRTOS, development tools used, basic ARM boot process, interrupt handling, and steps taken to port FreeRTOS by implementing timer interrupts and context switching. Basic GPIO and UART drivers were developed along with task communication and CLI application demos.
The document discusses the construction of the Linux kernel image. It describes how the kernel code is organized and hardware-independent. It then explains the process of building the composite kernel image (vmlinux) by linking object files together. This involves using the linker to combine files like head.o, piggy.o and misc.o into a binary image. It also discusses the roles of the bootstrap loader and how it loads and decompresses the kernel image.
This document provides an introduction to Verilog HDL including:
- An overview of Verilog keywords, data types, abstraction levels, and design methodology.
- Details on the history of Verilog including its development over time and transitions to newer standards.
- Explanations of key Verilog concepts like modules, ports, instantiation, stimuli, and lexical conventions.
Modules are the basic building blocks, ports define module interfaces, and instantiation replicates modules. Stimuli provide test inputs and lexical conventions cover syntax rules.