1. HARSH KAUSHIK
Flat No. 602, HEWO Apartments harshkaushik775@gmail.com
Sector - 47, Gurgaon
Haryana - 122001
Mobile: +918447937456
1. SUMMARY
Committed, resourceful, energizing and innovative individual well versed in electronic circuits,
semiconductors, VLSI, OLEDs, intellectual property (IP) law and practice. Strong analytical, and
communication skills. Works well independently and in team environment.
2. OBJECTIVE
To obtain research associate/analyst, technical consultant position leveraging my technical,
analytical, and legal skills.
3. EDUCATIONAL QUALIFICATION
Course Institution Board/University
Year of
completion
Percentage/CGPA
M. Tech
(Microelectronics
and VLSI Design)
Indian Institute of
Technology, Kharagpur
IIT Kharagpur 2014 9.31/10
B.E.
(Electronics and
Telecommunication)
RSR Rungta College of
Engineering and
Technology, Bhilai (C.G.)
CSVTU Bhilai 2012
86.37%
Class XII
Delhi Public School Risali
Sector, Bhilai (C.G.)
CBSE 2008 81.8%
Class X Delhi Public School Risali
Sector, Bhilai (C.G.)
CBSE 2006 79.5%
4. PROFESSIONAL EXPERIENCE
Research Associate, IPRD (Intellectual Property), Evalueserve, Gurgaon July 2014 – Present
 Conducted prior art searches for patentability/enforcement issues of disclosures/patents
 Performed non-infringement and invalidation analyses, patent novelty assessment, provided
continued support to attorneys for rendering opinions during litigations
 Prepared competitive landscapes and company profiles to evaluate key players in terms of technology
edge, IP portfolio
 Prepared office action response, drafts for filing of new patents in different patent offices of US and
EP
 Performed portfolio evaluation of key competitors in specific technologies
 Identified critical joint ventures, collaborations, patent licensing activity of various companies
 Proactively identified IP gaps and opportunities, technologydifferentiators, constantly interacting with
project leaders, technologists and attorneys
 Building macros for automation in MS-Excel

2. 5. CORE COMPETENCIES
 Semiconductor processing, device physics, OLED’s, Electronic circuits (VLSI), Solar cell, and
processing equipment knowledge
 IP analysis, patent prosecution (Office Action Response), technical analysis
6. TECHNICAL SKILLS
 Patent Database : Questel Orbit, Thomson Innovation
 VLSI Synthesis and Simulation Tools : Cadence - Virtuoso, Xilinx – ISE, Synopsys – Design
Vision.
 Programming languages : C, C++, Verilog, VBA basics (Macros and Excel
Automation)
 Engineering Packages : Knowledge in MATLAB
 Operating Systems : Windows
 Microsoft Office : MS-Excel, MS-word and MS-Powerpoint
4. ACADEMIC PROJECTS
M. Tech Project: A VLSI Architecture for Block Based Motion Estimation using ARPS search
technique. (Under Dr. Indrajit Chakrabarti Dept. of E&ECE, IIT Kharagpur)
Description:
The main aim of this project is to develop an efficient architecture for block based motion estimation using
Adaptive rood pattern search technique for a video encoder which will enhance the speed of the video encoding.
The Architecture has been designed for both FPGA as well as ASIC implementation.
Publication:
 P P Shiju, Indrajit Chakrabarti, Rishi Virdi, Harsh Kaushik “VLSI Architecture for Block-Matching Motion
Estimation Using Adaptive Rood Pattern Search Algorithm”, IET Circuits, Devices & Systems, Accepted
B.E. Project: Voice Controlled Robot (Embedded System)
Description:
In this project, we have designed a robot which can be controlled with speech command (Five Basic
Commands). The main purpose of this project is to control the direction & moment of robot with the help of
our voice. Voice controlled robot is a mobile robot which can be used in military applications or in remote
areas.
6. EXTRA-CURRICULAR ACTIVITIES
 Participated in inter-college cricket competition organized by Chhattisgarh Swami Vivekanand
Technical University in 2010.
 Organized a college level event ‘COGNIZANCE’ in 2010.
 Class Representative in B.E. for 4 years.
7. ACHIEVEMENTS
 Secured overall 2nd
Rank in the University in Electronics and Telecomm. Branch.
 University Topper of the Electronics and Telecommunication branch in 1st
semester of B.E.
 Declared as runner up in college level paper presentation contest in 2010.
 Employee performance award for the year 2015

3. 8. PERSONAL PROFILE
Date of Birth : 03-02-1991
Sex : Male
Father’s Name : M.L. Kaushik
Mother’s Name : Saraswati Kaushik
Marital Status : Single
Nationality : Indian
Hobbies : Playing cricket, badminton, listening music.
Languages known : English, Hindi
Permanent Address : House No. 135/B, Risali Sector, Bhilai, Dist. – Durg (C.G.)
9. DECLARATION
I hereby declare that the information furnished above is true to the best of my knowledge.
Place: Gurgaon HARSH KAUSHIK
Date: