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![222 Cmo RvgV π−=
22
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2 Cm
o
Rg
v
V
A −==
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![Currents in darlington pair
Q 1
Q 2
β 1Ι Β 1
Ι Β 1
Ι E 1 = (1+β 1)Ι Β 1 = Ι Β 2
Ι E 2 = (1+β 2)Ι Β 2 =(1+β 1)(1+β 2)Ι Β 1
Ι C 2 = β 2Ι Β 2 =β 2(1+β 1)Ι Β 1
Ι C 1 + ΙC 2 = [β 1 + β 2(1+β 1)]Ι Β 1
27](https://image.slidesharecdn.com/ecaunit2-190223145747/85/Eca-unit-2-27-320.jpg)
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( )2100225.203
2.2100100100 2
×++
++
−=vA V/V4.55−=vA
Substituting values;
44
Simplifying;
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211
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Uploaded byPavan Mukku
Eca unit 2
The document provides an in-depth overview of multistage amplifiers in electronic circuit analysis, detailing configurations like cascade, cascode, and Darlington arrangements with examples. It discusses the calculation of overall gain from interconnected amplifiers and includes references for further study. Key aspects covered are design principles, output resistance, input resistance, and small-signal voltage gain calculations for these amplifier configurations.
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Eca unit 2
- 1. 1 RAGHU INSTITUTE OFTECHNOLOGY AUTONOMOUS DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING II BTECH II SEMESTER ELECTRONIC CIRCUIT ANALYSIS UNIT II Prepared By: Mrs. SUSHMI NAIDU, Mr. M. PAVAN KUMAR, Assistant Professors SUSHMINAIDU, M.PAVAN ECA Dept of ECE RIT‖ ‖ ‖
- 2. 2 Contents: • Multistage Amplifier •Multistage Amplifier Configuration • Cascade Amplifier Connection Example • Cascode Amplifier Connection Example • Darlington Connection Example • Bootstrap Bias Amplifier • Two Stage FET Amplifier • Differential Amplifier SUSHMINAIDU, M.PAVAN ECA Dept of ECE RIT‖ ‖ ‖
- 3. 3 References • “IntegratedElectronics”, J. Milliman and C.C. Halkias, Tata McGraw Hill, 1972 • “Electronic Circuit Analysis- B.V. Rao, K.R.Rjeswari, P.C.R.Pantulu- Pearson publication • “Electronic Devices and Circuits” – Salivahanan, Suresh Kumar, A.Vallavaraj, TATA McGraw Hill • www.nptel.ac.in • www.nesoacademy.org • www.tutorialspoint.com SUSHMINAIDU, M.PAVAN ECA Dept of ECE RIT‖ ‖ ‖
- 4. MULTISTAGE AMPLIFIERS Two ormore amplifiers can be connected to increase the gain of an ac signal. The overall gain can be calculated by simply multiplying each gain together. A’v = Av1Av2Av3 …… 4
- 5. Example Find Vout Av1 =5 Av2 = 10 Av3 = 6 Avn = 8 Vin = 5 mV 5 Sol:- Av=Vout/Vin Av=Av1*Av2*Av3............*Avn
- 6.
- 7. • Many applicationscannot be handled with single- transistor amplifiers in order to meet the specification of a given amplification factor, input resistance and output resistance • As a solution – transistor amplifier circuits can be connected in series or cascaded amplifiers • This can be done either to increase the overall small- signal voltage gain or provide an overall voltage gain greater than 1 with a very low output resistance Multistage Amplifiers 7
- 8. Multistage Amplifier Configuration RC1 R C2R B Q 1 Q 2 v i v o Cascade /RC coupling 8
- 9. Cascode Multistage Amplifier Configuration R1 R 2 R 3 R L Q 2 Q 1 v i v o 9
- 10. Multistage Amplifier Configuration Darlington/Directcoupling v i v o R 1 R 2 Q 1 Q 2 10
- 11. Multistage Amplifier Configuration Transformercoupling R 1 T Q 1 Q 2 v i v o 11
- 12. The mostwidely used method Coupling a signal from one stage to the another stage and block dc voltage from one stage to the another stage The signal developed across the collector resistor of each stage is coupled into the base of the next stage The overall gain = product of the individual gain Cascade connection 12
- 13. R 1 R 2 R3 R 4 R C 1 R E 1 R C 2 R E 2 VCC +20 V 15 kΩ 15 kΩ 4.7 kΩ 4.7 kΩ 2.2 kΩ2.2 kΩ 1 kΩ1 kΩ β 1 = β 2 = 200 ro 1 = ro 2 = ∞ R i R o Example 1 Draw the AC equivalent circuit and calculate Av, Ri and Ro. 13
- 14. DC analysis The circuitunder DC condition (stage 1 and stage 2 are identical) Solution 14
- 15. Applying Thevenin’s theorem,the circuit becomes; A/V153.0 k307.1 mA979.3 μA89.19 21 21 21 21 == Ω== == == mm CQCQ BQBQ gg rr II II ππ 15
- 16. R B1 rπ 1 r π 2 gm 1v π 1 gm 2v π 2 R B2R C 1 + v π 1 - + v π 2 - R C 2 V i V oB1 E1 C1 B2 E2 C2 AC analysis 211 // RRRB = 432 // RRRB = The small-signal equivalent circuit (mid-band); 16
- 17. 222 Cmo RvgVπ−= 22 2 2 Cm o Rg v V A −== π ( )221112 //// πππ rRRvgv BCm−= [ ]iVv =1π ( )2212 2 1 //// π π rRRg V v A BCm i −== ( )2211 //// πrRRVg BCim−= 17
- 18. ( )22122121 ////πrRRRggAAA BCCmm== Ω==== k579.37.4//15// 4321 RRRR BB Ω== 667307.1//579.3//2.2//// 221 πrRR BC V/V343506672200153.0153.0 =×××=A Substituting values; The small-signal voltage gain; 18 Ω=== k957.0307.1//579.3// 11 πrRR Bin The input resistance; The output resistance; Ω== k2.22Co RR
- 19. A cascodeconnection has one transistor on top of (in series with) another The i/p applied to a C-E amp. (Q1) whose output is used to drive a C-B amp. (Q2) The o/p signal current of Q1 is the i/p signal of Q2 The advantage: provides a high i/p impedance with low voltage gain to ensure the i/p Miller capacitance is at a min. with the C-B stage providing good high freq. operation Cascode connection 19
- 20.
- 21. May be performed usingthe following figure; DC analysis Q 1 Q 2 R 1 R C V CC R 2 R 3 R E 21
- 22. CCB BB VI I IR I IRIR = − + −+ + −+ 1 2 11 13 2 11 1211 11β β β β The equations are (assuming VBE = 0.7 V for both BJT’s); ( ) 111 2 11 13 17.0 1 BEB B IRI I IR ++= − + − β β β The above equations may solved for the two unknown currents namely I1 and IB1. 22
- 23. AC analysis The equivalentcircuit under AC condition R BB R L ' Q 1 Q 2 vs vo 32 // RRRBB = LCL RRR //'= 23
- 24. The ac equivalentcircuit using hybrid-π model for BJT rπ 1 rπ 2 + v π 1 - + vπ 2 - g mvπ 2 g mv π 1 R BB R L ' v s v o B1 E1 C1 E2 B2 C2 LCL RRR //'= 32 // RRRBB = 24
- 25. '22 Lmo Rvgvπ−= At node E2; 22 2 2 11 π π π π vg r v vg mm += Or; 22 121 2 1 π ππ π rg vrg v m m + = Substituting in (1); sLmL m mm o vRgvR rg rgg v ' 1 ' 1 2 2 11 22 221 + −= + −= β β π π π 25 When β2 >> 1 ' 21 2 1 LRmg sv ov vA + −== β β The small-signal voltage gain; '1 LRmgvA −≅
- 26. Darlington connection Darlington pair Internalconnection; • Collectors of Q1 and Q2; • Emitter of Q1 and base of Q2. Q 1 Q 2 b1 b2e1 e2 c1 c2 B C E I B I C Provides high current gain : IC ≅ β2 IB 26
- 27. Currents in darlingtonpair Q 1 Q 2 β 1Ι Β 1 Ι Β 1 Ι E 1 = (1+β 1)Ι Β 1 = Ι Β 2 Ι E 2 = (1+β 2)Ι Β 2 =(1+β 1)(1+β 2)Ι Β 1 Ι C 2 = β 2Ι Β 2 =β 2(1+β 1)Ι Β 1 Ι C 1 + ΙC 2 = [β 1 + β 2(1+β 1)]Ι Β 1 27
- 28. If β1 =β2 = β and assuming β is large; Q 1 Q 2 β Ι Β 1 Ι Β 1 Ι E 1 = (1+β )Ι Β 1 = Ι Β 2 Ι E 2 = (1+β )Ι Β 2 =(1+β )2 Ι Β 1 Ι C 2 = β Ι Β 2 =β (1+β )Ι Β 1 Ι C 1 + ΙC 2 ≅ β 2 Ι Β 1 28
- 29. Q 1 Q 2 b1 b2e1 e2 c1 c2 B C E Hybrid-πmodel (assuming ro1 = ro2 = ∞); rπ 1 rπ 2 + Vπ 1 - + Vπ 2 - g m 2Vπ 2 g m 1Vπ 1 b1 b2 c2 e1 e2 c1 ≡ 29
- 30. Darlington pair configuration Darlington configurationprovides; • Increased current; • High input resistance. 30
- 31.
- 32. Input voltage source istransformed into current source 11 ππ rIV i= iimm IIrgVg 11111 βππ == ( ) 212 1 ππ β rIV i+= ( ) iiib IIII 112 1 ββ +=+= ( ) ii mmo II VgVgI 121 2211 1 βββ ππ ++= += ( ) ( ) i im m I rIg Vg 12 212 22 1 1 ββ β π π += += 21 ππ VVVi += 32
- 33. 11 ππ rIVi= iimm IIrgVg 11111 βππ == ( ) iiib IIII 112 1 ββ +=+= ( ) 21222 1 πππ β rIrIV ib +== ( ) ( ) iimm IrIgVg 1221222 11 βββ ππ +=+= ( ) iimmo IIVgVgI 1212211 1 βββππ ++=+= ( ) 21121 1 βββββ ≅++== i o i I I A The current gain is; 33 ( ) 21121 1 ππππ β rIrIVVV iii ++=+= The input resistance is; ( ) 211 1 ππ β rr I V R i i i ++==
- 34. Example 3 Determine the; (a)Q-point for Q1 and Q2; (b) voltage gain vo/vs; (c) input resistance Ris; (d) output resistance Ro 10021 == ββ ∞== 21 AA VV V7.021 == BEBE VV 34
- 35. DC equivalent circuit UsingThevenin’s theorem; V72.2 21 2 = + = RR R VV CCBB Ω= + = k91 21 21 RR RR RBB R 1 R 2 R C R E 2 335 kΩ 125 kΩ 2.2 kΩ 1 kΩ V CC +10 V Q1 Q2 (a) Determination of Q-points 35
- 36. The circuit becomes; () 112 1 BEB III +== β ( ) ( ) 1 2 22 11 BBE III +=+= ββ RC 2.2 kΩ R E 2 1 kΩ R BB VBB +10 VV CC +2.72 V 91 kΩ Q1 Q2 IB 1 IB 2 IC 1 IC 2 IE 2 10021 == ββ ∞== 21 AA VV V7.021 == BEBE VV 36
- 37. ( ) BBBEBEBBBVIRVIR =+++ 1 2 21 12 β Substituting values; μA8.121 =CI mA3.12 =EI μA93.1221 == BE II mA293.12 =CI ( ) 72.21100k17.02k91 1 2 1 =++×+ BB II μA128.010 10292 32.1 3 1 =×= − BI V3.113.12 =×=EV ( ) V127.70.01281.2932.21021 =+−== CC VV V27.03.11 =+=EV 37
- 38. V127.52127.7111 =−=−= ECCEVVV V827.53.1127.7222 =−=−= ECCE VVV (a) The Q-points are; V827.5mA;293.1: V127.5μA;8.12: 222 111 == == CEQCQ CEQCQ VIQ VIQ 38
- 39. The equivalent circuitunder AC condition R BB R C Q1 Q2 vs R is vo R o (b) The small-signal voltage gain (mid-band); 39
- 40. Using the hybrid-πmodel of transistor, the equivalent circuit becomes; 40
- 41. Ω= × == − k25.203 10492.0 100 3 1 1 1 mg r β π Ω= × == − k2 1073.49 100 3 2 2 2 mg r β π mA/V492.0 mV26 A8.121 1=== µ T CQ m V I g mA/V73.49 mV26 mA293.12 2 === T CQ m V I g 41
- 42. ( ) CmmoRVgVgv 2211 ππ +−= 121 1 2 211 1 1 2 ππ π π ππ π π π Vrg r r rVg r V V mm += += ( ) 1 1 2 12 1 π π π π β V r r V += ( ) 1 1 211 1 π π βββ VR r v Co ++ −= Substituting for Vπ2 in the expression for vo and simplifying; 42
- 43. 21 ππ VVvs+= ( ) 1 1 2 12 1 π π π π β V r r V += Substituting for Vπ2; ( ) 1 1 2 11 1 π π π π β V r r Vvs ++= ( ) 1 1 211 1 π π βββ VR r v Co ++ −= ( ) ( ) 1 1 2 11 1 1 211 1 1 π π π π π π β βββ V r r V VR r v v A C s o v ++ ++ − == 43
- 44. [ ] ( )2100225.203 2.21001001002 ×++ ++ −=vA V/V4.55−=vA Substituting values; 44 Simplifying; ( )[ ] ( ) 211 211 1 1 ππ β βββ rr R v v A C s o v ++ ++ −==
- 45. R BB RC rπ 1 rπ 2 g m 1v π 1 g m 2vπ 2 + vπ 1 − + v π 2 − + vs - vo R is R oi i i oi b R ib b s ib i v R =ibBBis RRR //= 45
- 46. 21 ππ VVvs+= 11 ππ riV b= ( ) ( ) ( ) b bmbmb ir rirgirVgiV 21 2112112 1 π πππππ β+= +=+= ( ) bbs irirv 211 1 ππ β++= ( ) 211 1 ππ β rr i v R b s ib ++== Substituting values; ( ) Ω=++= k40521001203ibR 46 40591 40591 // + × == ibBBis RRR Ω= k6.73isR Ω== k2.2Co RR
- 47. 47 Bootstrap Bias circuit Thiscircuit is a variation of the "voltage divider bias", with the addition of the "bootstrapping components" R3 and C. The author explains that R3 and C are used in order to achieve higher input resistance
- 48. 48 •With the additionof bootstrapping components (R3 and C) and assuming that C is of negligible reactance at signal frequencies, the AC value of the emitter resistance is given by: R E=RE||R1||R2′ •In practice this represents a small reduction in RE. •Now, the voltage gain of an emitter follower with emitter resistance R E is A=R E/(re+R E), which is very close to unity. Hence, with an input′ ′ ′ signal vin applied to the base, the signal with appears at the emitter (Avin) is applied to the lower end of R3. •Therefore, the signal voltage appearing across R3 is (1−A)vin, very much less than the full input signal, and R3 now appears to have an effective value (for AC signals) of: R 3=R3/(1−A) R3′ ≫
- 49. 49 Characteristics of differentcombination of configuration of transistor to form a multistage amplifier
- 50. 50 • The analogywe observed between single stage BJT and FET amplifiers applies, to two stage amplifiers. The correspondence is, as before, E➡S, B ➡ G, C ➡ D. • The behaviour of BJT and FET configurations is very similar, except for the difference on the input side of the small signal equivalent circuit. • A very useful possibility opens up: Use a FET for one stage and a BJT for the other. Mixed bipolar-FET two-stage combinations try to exploit the smaller input admittance of FETs and the better frequency response and power handling capability of bipolars at the same time. • This approach gives rise to the “BiCMOS” manufacturing technologies which use FETs for input stages and BJTs for output stages, especially line drivers. Two stage FET amplifiers
- 51. 51 FET COMMENTS NAME 1ST Stg2nd Stg Voltage Amp. CS CS High voltage gain Cascode CS CG High bandwidth Op-Amp CS CD High Zin low Zout Current Buffer CG CS Higher Zout than CB/CG Current Buffer CG CG Second stage to improve on CB/CG Not common CG CD Not Commo Not common CD CS Instead of Ce offers higher Zin Differential Amp CD CG High voltage gain and bandwidth Darlington CD CD High Current Gain
- 52. 52 Differential amplifier • Halfcircuit (i.e. driven from one side) is CC followed by CB • Very wide frequency response • Extremely high voltage gain
- 53. 53 Gate Questions 1. Acascade connection of two voltage amplifiers A1 and A2 is shown in the figure. The open loop gain Avo , input resistance Rin , and output resistance Ro for A1 and A2 are as follows: A1 : Avo = 10, Rin = 10 KΩ, Ro = 1 KΩ A2 : Avo = 5, Rin = 5 KΩ, Ro = 200 Ω The approximate overall voltage gain Vout / Vin is ……………. Answer: 35 (2014) 2. In the silicon BJT circuit shown below, assume that the emitter area of transistor Q1 is half that of transistor Q2 . The value of current Io is approximately a. 0.5 mA b. 2 mA c. 9.3 mA d. 15 mA Answer: b (2010)
- 54. 54 3. The cascodeamplifier is a multistage configuration of 1.CC – CB 2.CE – CB 3.CB – CC 4.CE – CC Answer: 2 (2005) 4.Three identical amplifiers with each one having a voltage gain of 50, input resistance of 1 KΩ and output resistance of 250 Ω are cascaded. The open circuit voltage gain of the combined amplifier is a. 49 dB b. 51 dB c. 98 dB d. 102 dB Answer: c (2003)