The document outlines the basics of computer organization and design, focusing primarily on instruction codes, computer registers, and the instruction cycle. It describes the structure and function of various types of instructions, including memory reference, register reference, and central processing unit instruction formats, as well as different addressing modes and architectures such as CISC and RISC. Key components include the operation code, data and address registers, and the stages of executing instructions within a CPU.

1. Module 2
By Dr lalita purohit

2. Basic computer organization
and design

3. Instruction codes
•Instruction codes are bits that instruct the computer to execute a
specific operation. An instruction comprises groups called fields.
•These fields include:
• The Operation code (Opcode) field determines the process that needs to
perform.Itdefineoperationssuchasaddition,subtraction,shift,complement,etc.
• The Address field contains the operand's location, i.e., register or memory
location.
• The Mode field specifies how the operand locates.

4. Computer registers
•Computer registers are high-speed memory storing units.
• It is an element of the computer processor.
•It can carry any type of information including a bit sequence or single
data.

5. •The data register holds the operand read from the memory.
•The accumulator is a general-purpose register need for processing.
•The instruction register holds the read memory.
•The temporary data used while processing is stored in the
temporary register.
•The address register holds the address of the instruction that is to be
implemented next from the memory.
•The Program Counter (PC) controls the sequence of instructions tobe
read.In case a branch instruction is detected,the sequential executiondoes
not arise. A branch execution calls for a transfer toan instruction that is
notin sequence with the instructions inthe PC.
•Theinput register (INPR) and output register (OUTPR) are the registers
used for the I/O operations. The INPR receives an 8-bit character from
the input device. It is similar to the OUTPR.

6. Computer instruction and instruction cycle

7. •The instruction cycle is a basic computer system that deals with
the central processor unit's core operations.
•The instruction cycle is divided into five stages
•Initiating Cycle :->During this phase, the computer system bootsup and
the operating system loads intothe central processing unit's main
memory. It begins when the computer system starts.
•Fetching of Instruction :->The first phase is instruction retrieval. Each
instruction executed in a central processing unit uses the fetch
instruction.During this phase,the central processing unit sends the PCto
MAR and then the READ instruction to a control bus. After sending a read
instruction on the data bus, the memoryreturns the instruction that
was stored at that exact address inthe memory.TheCPUthen copiesdata
from the data bus intoMBR, which it then copiestoregisters. Thepointer
is incrementedtothe next memorylocation,allowing the next instruction
to be fetched from memory.

8. •Decoding of Instruction :-> The second phase is instruction
decoding. During this step, the CPU determines which instruction
should be fetched from the instruction and what action should
be taken on the instruction. The instruction's opcode is also
retrieved from memory, and it decodes the related operationthat
must be performed for the instruction.
•Read of an Effective Address :-> The third phase is the reading
of an effective address. The operation's decision is made during
this phase. Any memory type operation or non-memory type
operation can be used. Direct memory instruction and indirect
memory instruction are the two types of memory instruction
available.
•Execution of Instruction :-> The last step is to carry out the
instructions. The instruction is finally carried out at this stage.
The instruction is carried out, and the result is saved in the
register. The CPU gets prepared for the execution of the next
instruction after the completion of each instruction. The
execution time of each instruction is calculated, and this
information is used to determine the processor's processing
speed.

9. Memory Reference Instructions
1
.
•Memory reference instructions are machine language
instructions that allow the program to access data stored in
memory.
• These instructions provide the address of the memory locationwhere
the data is stored or where the data should be stored
•There are seven memory reference instructions :
2.
3.
AND:-> The AND instruction implements the AND logic
operationonthe bit collectionfromthe register and the memory
word that is determined by the effective address.
ADD :-> The ADD instruction adds the content of the memory
word that is denoted by the effective address to the value ofthe
register.
LDA(load accumulator) :-> TheLDAinstruction shares the memory
word denoted by the effective address to the register.

10. 4. STA (store accumulator):-> STA saves the content of the register
into the memory word that is defined by the effective address. The
output is next used to the common bus and the data input is linked to
the bus. It needed only one micro-operation.
5. BUN :-> The Branch Unconditionally (BUN) instruction can send the
instruction that is determined by the effective address. They
understand that the address of the next instruction to be performed is
held by the PC and it should be incremented by one to receive the
address of the next instruction in the sequence. If the control needs to
implement multiple instructions that are not next in the sequence, it
can execute the BUN instruction.
6. BSA :-> BSA stands for Branch and Save return Address. These
instructions can branch a part of the program (known as subroutine
or procedure). When this instruction is performed, BSA will store the
address of the next instruction from the PC into a memory location
that is determined by the effective address.
7. ISZ :-> The Increment and skip if Zero (ISZ) instruction increments
the word determined by effective address. If the incremented cost is
zero, thus PC is incremented by 1.A negative value is saved in the
memory word through the programmer. It can influence the zero value
after getting incremented repeatedly. Thus, the PC is incremented and
the next instruction is skipped.

11. •A register reference instruction is a type of computer instruction where one of the
operands (input values) is located in a register rather than in memory.
•Registers are high-speed storage locations within the CPU (central processing unit) that
hold data temporarily during processing.
•Using registers can speed up computation because they are much faster to access than
memory.
•Register reference instructions can be classified into several types based on the
operations they perform and the number of operands they use
•Arithmetic Instructions: These instructions perform arithmetic operations like addition, subtraction,
multiplication, and division using registers as operands. Examples include:
•ADD (Addition)
•SUB (Subtraction)
•MUL (Multiplication)
•DIV (Division)
•For example ADD R1.R2
Register Reference Instruction

12. •Logical Instructions: These instructions perform logical operations like AND, OR, XOR,
and NOT using registers as operands. Examples include:
•AND (Bitwise AND)
•OR (Bitwise OR)
•XOR (Bitwise XOR)
•NOT (Bitwise NOT)
•For example
•AND R1, R2 ; Perform bitwise AND of R1 and R2
•OR R3, R4 ; Perform bitwise OR of R3 and R4
•Data Transfer Instructions: These instructions move data between registers or between
registers and memory. Examples include:
•MOV (Move data between registers or memory locations)
•LOAD (Load data from memory into a register)
•STORE (Store data from a register into memory)
•For example:
•MOV R1, R2 ; Move data from R2 to R1
•LOAD R3, [R4] ; Load data from memory address stored in R4 into R3

13. • Comparison Instructions: These instructions compare the contents of registers and set flags
based on the result. Examples include:
•CMP (Compare)
•TEST (Test bits for AND)
•For example : CMP R1, R2
•Control Transfer Instructions: These instructions control the flow of program execution.
Examples include:
•JMP (Unconditional Jump)
•JZ/JNZ (Jump if Zero / Jump if Not Zero)
•JC/JNC (Jump if Carry / Jump if No Carry)
•For example :
• JMP label ; Unconditionally jump to a label
•JZ label ; Jump to a label if the zero flag is set

14. Central processing unit

15. Instruction formats
1
.
2.
3.
4.
• instruction formats refer to the way instructions are encodedand
represented in machine language.
•Types of instruction formats:
Three Address Instruction format
Two Address Instruction format
One Address Instruction format
Zero Address Instruction format

16. •Three address instruction:-> The instruction format in which the
instruction uses the three address fields is called the three address
instruction format
• For example :-> ADD R1,R2,R3
•Two Address Instruction:-> The instruction format in which the
instruction uses only twoaddress fields is called the two address
instruction format
• For example :-> MOV R1, R2
• One Address Instruction :-> The instruction format in which the
instruction uses only one address field is called the one address
instruction format
•In this type of instruction format, one operand is in the
accumulator and the other is in the memory location
• For example :-> LOAD C,ADD B, STORE T etc.

17. •Zero Address Instruction :-> The instruction format in which
there is no address field is called zero address instruction
•In zero address instruction format, stacks are used
•In zero order instruction format, there is no operand
•For example:-> PUSH A,PUSH B etc.

18. Addressing modes
•Addressing Modes specify the location of an operand
•Types of addressing modes
•Implied Addressing Mode :-> It is mainly used for Zero-address
instructions. Forsuch instruction, the operand is given in the
instruction. We have no need to find the operand.
•For Examples:->
• ADD (it takes previous two values from the stack and ADD’s them).
•CLC(used to reset Carry flag to 0)

19. •Immediate Addressing Mode :-> The operand is directly provided
as a constant value. No extra computations are required tocalculate
effective address (EA).Wehave noneedtostore the value ofthe constant in
memoryor register. Wecan directly use it from instruction.
•For example:->
•ADD 10 (AC = AC+10)
•MOV AL, 30H (move the data (30H) into AL register)
•Direct Addressing Mode:-> Theoperand ofinstruction contains the
address ofthe memorylocation.It also called an absolute addressing
mode.
•For example:->
•ADD AL,[0302] //add the contents of address 0302 to AL

20. 1
.
•Indirect Addressing Mode :-> The address field of the
instruction contains the address of memory location. That
memory location contains the effective address of the require
d .Two references of memory are required to fetch the required
•For example :->
ADD X in indirect addressing mode will perform in the
following way
AC← AC + [[X]]
2. LOAD R1,@100 ( Load the content of memory address stored at
memory address 100 to the register R1.)
•Register Direct Addressing Mode:-> The address field of the
instruction specifies to a CPU register which contains the
operand. There is no need for memory access to fetch the
operand.

21. •ADD R in register direct addressing mode will perform in the
following way
•For example :-> AC← AC + [R]
•Register Indirect Addressing Mode :-> The address field of the
instruction specifies toa CPUregister which provides the effective
address ofthe operand.Thereis Only onememory reference is required
to fetch the operand.
•For Example :->
•ADD R in register indirect addressing mode will perform in the
following way
•AC← AC + [[R]]

22. •Auto-Increment and decrement Addressing Mode:-> This
addressing modeis a special case ofRegister Indirect Addressing
Mode. Auto-increment and decrement is used toaccess the data
in sequence from memory.
•For example :->
•Add R1, (R2)+ or Add R1,(R2)-
•Indexed Addressing Mode:-> Operand-field contains the starting base
address ofthe array-memory block and the general register (index-
register) field will contain the index value.
•For example :->
•MOV AX, [SI +05]

23. Data transfer and manipulation
•Data transfer instructions cause transfer ofdata fromone location to
another without changing the binary information.

24. •Data manipulation instructions perform operations on data and
provide the computational capabilities for the computer.
•These instructions perform arithmetic, logic and shift operations

26. CISC (Complex Instruction Set Architecture )
1.
2.
3.
•Themainidea is that a single instruction will doall loading, evaluating,
and storing operations just like a multiplication command will do stuff
like loading data, evaluating, and storing it, hence it’s complex.
•Characteristic of CISC –
4.
5.
•Example – Suppose we have to add two 8-bit numbers:
• CISCapproach: Therewill be a single commandor instruction for this like ADD
which will perform the task.
Instructions are larger than one-word size.
Instruction may take more than a single clock cycle to get executed.Less
number ofgeneral-purpose registers as operations get performed in memory
itself.
Complex Addressing Modes.
More Data types.

27. RISC (Reduced Instruction Set Architecture )
•The main idea behind this is to make hardware simpler by
using an instruction set composed of a few basic steps for
loading,evaluating, and storing operations just like a load command
will load data, a store command will store the data.
•Characteristic of RISC –
1. Instruction comes undersize of one word.
2. Instruction takes a single clock cycle to get executed.
3. More general-purpose registers.
4. Simple Addressing Modes.
5. Fewer Data types.
6. A pipeline can be achieved.
•For example :Suppose we have to add two 8-bit numbers:
•RISC approach: Here programmer will write the first load
commandtoloaddata in registers then it will use a suitable operator and
then it will store the result in the desired location.