The document discusses the architecture and key concepts of reduced instruction set computers (RISC), including advanced RISC machines and hardwired configurations. It highlights the load/store mechanism and its throughput alongside mentions of program status registers. Examples pertaining to smartphones are also referenced.

1. Arquitetura,
Principais
conceitos e
Exemplos

2. •
•
●
●
●
•
●
•
●
•
●
•
•

3. •
• Reduced
Instruction Set Computer
●
●
•
●
•
●
●
●

5. •
•
•
●
•
● Advanced RISC Machines
•
●

7. •
●
●
●
●
●

8. •
● hardwired
●
●

9. •
●
● load store
●
●

10. •
●
●
● Load/Store
troughput
●

11. •
•
•
●
●
●
•
● Current Program Status Register
● Saved Program Status Register
• flag
●

12. •
•
●
●
•
●
●

13. •
●
●
●
●
●
●
●
●

14. •
●
•
●
•
●
•

17. •
•
•

18. •
•
●
●
●
•

19. •
•
●
●

20. •
•
●
●
●
●
●
•
•

21. •
smartphones.
•
●
●
●
●

22. •
•
• Load/Store
•
•
•

23. •
•
•
•
•
•
●

24. •
•
•
•
•
•

25. •
•
•
•
•
•
●
●
●

26. •
•
•
•
•
•
•
•

27. •
•
•
•
●
●
●
●

28. •
•
•
•
•
•

29. •
●
●
●
●
•
•
●

30. •
●
●
●
●
•
•
●

31. •
•
•
•
•
•
•