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Abhijeet H. Deshmukh 
Email: ah.deshmukh@yahoo.in 
Mobile: +91-9028690153 
CAREER OBJECTIVE 
Seeking a challenging position where I get an opportunity to learn and grow, 
both personally and professionally, while actively contributing to the growth and 
development of the company. 
TECHNICAL SKILLS 
Languages C,C++,VHDL 
Operating System Windows XP 
Software Tools XILINX , MICROWIND 
Course Board/University Institute Year Of 
ME 
(VLSI & Embedded 
System) 
ACADEMIC PROJECT 
EDUCATIONAL QUALIFICATIONS 
Passing Percentage 
Pune 
University 
Sinhgad College of 
Engineering,Vadgaon 
BK.,Pune 
Pursuing 
Project Name: “Electronics Ticket Distribution System for State Transport” 
7.15 
(aggregate 
Upto 3rd 
sem) 
Note:- 
Projecte 
submitted 
B.E 
(Electronics & 
Telecommunication.). 
Amravati 
University PRMIT&R,Badnera 2011 57.95% 
Diploma MSBTE 
Dr. Panjabrao 
Deshmukh 
Polytechnique 
2008 65.68% 
S.S.C Maharashtra 
Board 
J.D. Chavre 
Vidyamandir 2005 56.13%
Team Size : 3 members 
This project is invented as a embedded project. It can be used in any state transport. 
It count the no. of passenger enter in to the bus and according to the ticket 
distribution counter decrement its value. If counter decremented to 0 then it can be 
consider as all passenger travel with ticket, otherwise buzzer has sound. In this way 
we can prevent corruption from passengers and in future we can avoid corruption 
from conductor by making system online. 
. 
ACADEMIC SEMINAR 
Seminar 1: “Built In Self Test to check Read Only Memory (ROM)” 
Built In Self Test is a technique that having facility to check the system within 
the circuit. Additional cost required to check the system is minimize because of 
circuit present in the system and system check at run time. 
Seminar 2: “FPGA IMPLEMENTATION OF E1 TIME SPACE TIME SWITCH” 
Time switch is basically interchange the time slot of the 8 samples at the delay of 
125μsec, it minimize complexity of the links by using two Random Access Memories. 
For improving flexibility among the subscribers, another space stage is added. The 
second space stage interchanges the time slot between the two links. 
Extra Curricular Activities 
· Participated in the national level event in the ROBOTICS at “PRAJWALAN-09” 
GCOEA Amravati 
· Participated in the national level event in the Blind-Racing at “Techno-Expert- 
10”PRMIT&R,Badnera, Amravati 
PERSONAL DETAILS 
Name : Abhijeet H. Deshmukh 
Date of Birth : 11th July 1989 
Nationality : Indian 
Marital Status : Single 
Hobbies : Listening Songs and Trekking. 
Permanent Address: Tejas Colony Bypass Road Karanja (LAD), 
Karanja (LAD)- 444105
Declaration: 
I hereby declare that the information furnished above is true to the best of my 
knowledge. 
Place: 
Date: ABHIJEET H. DESHMUKH

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abhijeet deshmukh

  • 1. Abhijeet H. Deshmukh Email: ah.deshmukh@yahoo.in Mobile: +91-9028690153 CAREER OBJECTIVE Seeking a challenging position where I get an opportunity to learn and grow, both personally and professionally, while actively contributing to the growth and development of the company. TECHNICAL SKILLS Languages C,C++,VHDL Operating System Windows XP Software Tools XILINX , MICROWIND Course Board/University Institute Year Of ME (VLSI & Embedded System) ACADEMIC PROJECT EDUCATIONAL QUALIFICATIONS Passing Percentage Pune University Sinhgad College of Engineering,Vadgaon BK.,Pune Pursuing Project Name: “Electronics Ticket Distribution System for State Transport” 7.15 (aggregate Upto 3rd sem) Note:- Projecte submitted B.E (Electronics & Telecommunication.). Amravati University PRMIT&R,Badnera 2011 57.95% Diploma MSBTE Dr. Panjabrao Deshmukh Polytechnique 2008 65.68% S.S.C Maharashtra Board J.D. Chavre Vidyamandir 2005 56.13%
  • 2. Team Size : 3 members This project is invented as a embedded project. It can be used in any state transport. It count the no. of passenger enter in to the bus and according to the ticket distribution counter decrement its value. If counter decremented to 0 then it can be consider as all passenger travel with ticket, otherwise buzzer has sound. In this way we can prevent corruption from passengers and in future we can avoid corruption from conductor by making system online. . ACADEMIC SEMINAR Seminar 1: “Built In Self Test to check Read Only Memory (ROM)” Built In Self Test is a technique that having facility to check the system within the circuit. Additional cost required to check the system is minimize because of circuit present in the system and system check at run time. Seminar 2: “FPGA IMPLEMENTATION OF E1 TIME SPACE TIME SWITCH” Time switch is basically interchange the time slot of the 8 samples at the delay of 125μsec, it minimize complexity of the links by using two Random Access Memories. For improving flexibility among the subscribers, another space stage is added. The second space stage interchanges the time slot between the two links. Extra Curricular Activities · Participated in the national level event in the ROBOTICS at “PRAJWALAN-09” GCOEA Amravati · Participated in the national level event in the Blind-Racing at “Techno-Expert- 10”PRMIT&R,Badnera, Amravati PERSONAL DETAILS Name : Abhijeet H. Deshmukh Date of Birth : 11th July 1989 Nationality : Indian Marital Status : Single Hobbies : Listening Songs and Trekking. Permanent Address: Tejas Colony Bypass Road Karanja (LAD), Karanja (LAD)- 444105
  • 3. Declaration: I hereby declare that the information furnished above is true to the best of my knowledge. Place: Date: ABHIJEET H. DESHMUKH