1. SKANDARAMA K
Skanda Nilaya,
Padavu, Shirva
Udupi Dist-574116. Karnataka, INDIA.
Email-id :skandaramak@gmail.com
Mobile No.:7259789811
Alt Mob No.: 9448848410
OBJECTIVE
Seeking a career in an organization that encourages continuous learning and provides exposure to new technologies
so as to achieve professional and personal growth while meeting the goals of the organization.
ACADEMIC DETAILS
Year Degree School/College Board/University %/CGPA
2015 MTech in Power Electronic Manipal Institute of Technology, Manipal University 9.67
Systems and Control Manipal
2013 B.E in Electronics and NMAMIT, Nitte VTU, Belgaum 9.27
Communication Engineering Karnataka,
2009 Class XII St. Mary’s Pre-University Karnataka Pre-University 87.5%
College,Shirva Board
2007 Class X Hindu Junior College, Secondary Education 92.16%
Shirva,Udupi Board Karnataka
AREAS OF INTEREST
• FACTS Devices, Power Electronic Converters, Cryptography, Digital Electronics, FPGA.
TECHNICAL SKILLS
• Platforms- Windows
• Languages - C, C++, VHDL.
• Tools - MATLAB, FPGA, Microcontroller, orcad capture-PSpice, LATEX
PROJECTS
• Modeling and Control of STATCOM.
STATCOM is modeled using MATLAB/SIMULIK. It is modeled in both D-Q method and three phase switching
function method.Reactive current controllers are designed in D-Q frame.This model is linearized about an op-
erating point and Eigen value analysis is carried to understand the behavior of the system. D-Q model is also
implemented in dSPACE. Bifurcation analysis is used to study the impact of susceptance on the dc side of VSC
on the stability of STATCOM. Harmonic analysis is also performed.
• FPGA Implementation of SHA-3 algorithm Oriented Digital Signature.
Hardware implementation of generation and verification of digital signature is obtained by using SHA3(Keccak)
algorithm on Xilinx Spartan 3 FPGA. Data or message is given as input through hyper terminal using serial
communication port of FPGA. This message is Hashed using SHA 3(Keccak) algorithm and encrypted using
RSA algorithm. It is transmitted and verified if the transmission is secure and received from trustable user.
• Graphical User Interface for Power Electronic Converters.
The simulator is developed using GUIDE tool of MATLAB, the circuits are simulated using SIMULINK power
system toolbox of MATLAB. The user can select a class of converter circuit from the available list. Once the
topology is selected, the software prompts the user to give the specifications. The corresponding Simulink model
for the circuit is selected and simulated.

2. • Integrated Boost-Sepic Converter for High Step-Up Applications.
The converter obtained by combining boost and an isolated sepic converter which has a high stepup ratio and
efficiency. The steady state analysis of the converter is done and it is simulated using SIMULINK power system
toolbox of MATLAB.
• Speed control of Conveyor Belt using microcontroller.
Speed control of the conveyor belt is done by using microcontroller 8051. Controller will give warning if the
speed falls below or rises above prescribed speed. If this variation persist for more than 10 seconds, then it will
stop rotation of the conveyor belt.
• PSpice simulations .
Small simulations on filters, integrator, differentiation, clipper, clampers, converters etc.
POSITIONS OF RESPONSIBILITY
• Member The Institution of Engineers(INDIA) Student Chapter for the period 2010-13.
• Work as peer helper in Academics, 2011-12.
Achievements
• Finished M.Tech in Power Electronic Systems and Control with 2nd rank to the university.
• My paper on "Modeling and bifurcation control of VSC based STATCOM" has been accepted to "International
Conference on Smart Grid Technologies" 2015 at Amrita Vishwa Vidyapeetham, Coimbatore sponsored by ELSE-
VIER’S INTERNATIONAL JOURNAL, "PROCEDIA TECHNOLOGY".
• Passed NCC certificate ’A’ examination held in 2006 with ’A’ grade.
• Participated and won in district level Quiz competitions.
ADDITIONAL ACTIVITIES
• Attended Workshop on ’MATLAB and Xilinx tools and its application’, ICACET 2014, Manipal.
• Attended Entrepreneurship Awareness Camp organized by Dept. od Science and Technology, Govt. of India
through EDC, NMAMIT, Nitte.
• Feel Employable training conducted by CLHRD.
REFERENCES
• Gururaj Rao H. V., Assistant Professor Selection Grade, Department of Electrical and Electronic Engineering, MIT
Manipal.
e-mail:gururaj.rao@manipal.edu
• R C Mala, Assistant Professor Selection Grade, Department of Electrical and Electronic Engineering, MIT Mani-
pal.
e-mail:mala.rc@manipal.edu
• N Durga Prasad, Assistant Professor Grade III, Department of Electronics and Communication Engineering, N-
MAMIT Nitte.
e-mail:ndurgap@gmail.com
PERSONAL PROFILE
• Date of Birth: 29-08-1991
• Father’s name: SHAMA BHAT K
• Sex: Male

3. • Marital Status: Single
• Languages Known: English, Hindi, Kannada, Havyaka and Tulu
• Permanent Address: ‘Skanda Nilaya’, Padavu, Shirva,Udupi Dist.
• PIN Code: 574116
• Phone No: mobile: 7259789811, Land: 0820-2576619
• E-mail: skandaramak@gmail.com
The above information provided by me is true and have all the relevant documents to authenticate the same.
Skandarama K