KTN ran a collaborators' workshop on 26 September 2019 in London to explain more about the Digital Security by Design Challenge announced by the government. The Digital Security by Design challenge has been recently announced by the Department for Business, Energy & Industrial Strategy (BEIS). This challenge, amounting to £70 million of government funding over 5 years, was delivered by UK Research and Innovation (UKRI) through the Industrial Strategy Challenge Fund (ISCF). This Collaborators' Workshop provides an opportunity to hear more details of the challenge and forthcoming competitions. A Scoping Workshop for this challenge was held on 30th May: http://ow.ly/oz6230pHlGl Find out more about the Defence and Security Interest Group at https://ktn-uk.co.uk/interests/defence-security Join the Defence and Security Interest Group at https://www.linkedin.com/groups/8584397 or Follow KTN_UK Defence group on Twitter https://twitter.com/KTNUK_Defence

1. Collaboration opportunities with
open-source CHERI foundations
Prof. Simon Moore
University of Cambridge
cheri-cpu.org

2. Collaboration opportunities
• Software above CHERI hardware
• Hypervisors, operating systems, compilers/toolchain/debuggers, software
compartmentalization, managed languages, applications, and evaluation
• Lead: Robert Watson
• CHERI semantics and verification
• Analysis, proof, model-checking, and testing for CHERI security and
correctness, for CHERI assembly and CHERI C; verified compilation and linking
• CHERI hardware verification; CHERI SoC semantics
• Lead: Peter Sewell
• Maturing CHERI-RISC-V ISA and providing a range of implementations
• Currently focused on small microcontrollers (complements ARM’s work)
• Exploring wider use-cases, e.g. CHERI for industrial controllers and “IoT”
• Lead: Simon Moore
cheri-cpu.org

3. Open-source CHERI artefacts available
• CHERI ISA v7 architecture spec. includes
• CHERI-MIPS (mature), CHERI-RISC-V (experimental), CHERI-x86 (sketch)
• Formal ISA models in Sail (to C emulator, Coq, HOL4, Isabelle, SMT )
• ARMv8-A, RISC-V, CHERI-ARM, CHERI-MIPS and CHERI-RISC-V
• Tools: Clang/LLVM compiler, LLD linker, GDB debugger support
• CHERI-ARM, CHERI-MIPS, CHERI-RISC-V (experimental)
• OS support
• CheriBSD (FreeBSD derived) on CHERI-ARM, CHERI-MIPS, CHERI-RISC-V (soon)
• CheriFreeRTOS on CHERI-RISC-V
• Many C/C++ applications ported (generally with little effort)
cheri-cpu.org