20. FSD-
COM-
FSD+
VDD
IN EN
GND
HSD-
HSD+
COM+
FSD-
COM-
FSD+
VDD
INEN
GND
HSD-
HSD+
COM+
BT_PCM_IN
BB_I2S2_RX
BB_I2S2_CLK
BB_I2S1_CLK
BB_USART0_RTS_N
BB_USART0_CTS_N
GPS_SYNC
GPS_INTR_N
GPS_UART_CTS_N
GPS_UART_RTS_N
GPS_STANDBY_N_AP
GPS_RESET_N_AP
BT_PCM_SYNC
BT_PCM_OUT
BT_PCM_CLK
SIMCRD_RST
SIMCRD_CLK
SIM_DETECT
VSIM_VAR
BB_I2S2_TX
BB_I2S2_WA0
BB_I2S1_WA0
UMTS_RXD
UMTS_TXD
BB_USART0_RXD
BB_USART0_TXD
BB_USB_DATA_P
BB_USB_VBUS
AP_PMU_EXTON
IPC_GPIO
IPC_MISO
IPC_MOSI
IPC_MRDY
RESET_DET_N
BB_RST_REQ_N
RESET_PMU_N
GSM_TXBURST_IND
RADIO_ON
RF_RESET_N
GAS_GAUGE
NTC
BATSNS
BATT_VCC
IPC_SCLK
IPC_SRDY
SIMCRD_IO
WL_BT_VDDIO
WL_BT_REG_ON
CLK32K_AP
WLAN_RESET_N
WLAN_SDIO_CLK
WLAN_SDIO_CMD
WLAN_SDIO_DATA<3..0>
BT_UART_CTS_N
BT_UART_RTS_N
BT_UART_RXD
BT_UART_TXD
BT_WAKE
BT_RESET_N
HOST_WAKE_BT
HOST_WAKE_WLAN
BB_USB_DATA_N
BB_I2S1_TX
BB_I2S1_RX
GPS_UART_TXD
GPS_UART_RXD
RADIO_MLB
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
STANDOFFS
1.4V < V(EN) < 0.5V WHEN VDD=2.7 TO 3.6V
1.4V < V(IN) < 0.5V WHEN VDD=2.7 TO 3.6V
AP/RADIO INTERFACE
* PLACE BY DOCK CONN
TODO: CONN TO TP’S
** NOT CHARACTERIZED AT VDD > 3.6 V BUT
VDD RANGE IS 2.7V < VDD < 5.5V
** IN, EN THRESHOLDS:
* PLACE BY CAN
SHIELDS
FIDUCIALS
SHLD-N90-EMI-CAN-SAT-1PC
SHLD-N90-EMI-CAN-BOT-1PC
SM
SHLD-N90-EMI-FRAME-NAND
SM
SM
SM
SM
TH-NSP
SL-1.1X0.4-1.4X0.7
TH-NSP
SL-1.1X0.4-1.4X0.7
TH-NSP
SL-1.1X0.4-1.4X0.7
TH-NSP
SL-1.1X0.4-1.4X0.7
SM-NSP
2.1MMX3.2MM-1P8D-U
SM-NSP
2.1MMX3.2MM-1P8D-U
2.1MMX3.2MM-1P8D-U
SM-NSP
SM-NSP
2.1MMX3.2MM-1P8D-U
10%
X5R
201
6.3V
0.1UF
UTQFN
ISL54200IRUZ
ISL54200IRUZ
UTQFN
5%
NP0-C0G
56PF
6.3V
01005
240-OHM-0.2A-0.8-OHM
0201-1
0201-1
240-OHM-0.2A-0.8-OHM
NP0-C0G
5%
01005
6.3V
56PF
0.1UF
201
6.3V
10%
X5R
TH-NSP
SL-1.1X0.4-1.4X0.7
SM
TH-NSP
SL-1.1X0.4-1.4X0.7
I373
RF
01005
6.3V
NP0-C0G
56PF
5%
01005
NP0-C0G
56PF
5%
6.3V
FID
0P5SM1P0SQ-NSP
0P5SM1P0SQ-NSP
FID
0P5SM1P0SQ-NSP
FID
FID
0P5SM1P0SQ-NSP
FID
0P5SM1P0SQ-NSP
0P5SM1P0SQ-NSP
FID
RADIO,USB MUX,EM PARTS
SYNC_DATE=N/ASYNC_MASTER=N/A
VCC_MAIN
POD_TO_ACC_DOCK_CONN
ACC_TO_POD_DOCK_CONN
BB_USB_N
BB_USB_P
PP1V8_SDRAM
HP_PCM1_I2S_DOUT
I2S2_DOUT
I2S2_BCLK
I2S1_BCLK
UART1_CTS_L
UART1_RTS_L
GPS_SYNC
GPS_INTR_L
UART4_RTS_L
UART4_TXD
UART4_CTS_L
UART4_RXD
GPS_STANDBY_AP_L
GPS_RESET_AP_L
HP_PCM1_I2S_LRCLK
HP_PCM1_I2S_DIN
HP_PCM1_I2S_BCLK
SIMCRD_RST
SIMCRD_CLK
SIM_DETECT
SIM_VCC
I2S2_DIN
I2S2_LRCLK
I2S1_DIN
I2S1_LRCLK
I2S1_DOUT
UART1_TXD
UART1_RXD
BB_USB_P
BB_USB_N
VLCM1
AP_PMU_EXTON
IPC_GPIO
SPI2_MISO
SPI2_MOSI
BB_RESET_DET_L
RESET_PMU_L
RESET_L
BATTERY_SWI
NTC
BATTSNS
SPI2_SCLK
SIMCRD_IO
WL_BT_REG_ON
CLK_32K_WIFI
WLAN_RESET_L
WLAN_SDIO_CLK
WLAN_SDIO_CMD
WLAN_SDIO_DATA<3..0>
UART3_RTS_L
UART3_CTS_L
UART3_TXD
UART3_RXD
BT_WAKE
BT_RESET_L
BT_HOST_WAKE
WLAN_HOST_WAKE
IPC_SRDY
SPI2_MRDY
BB_RESET_L
LED_DRIVE_GSMB
RADIO_ON
ACC_TO_POD_DOCK
DOCK_BB_EN
POD_TO_ACC_DOCK
USB USBFS
USBFS_N
USBFS
PP1V8_SDRAMMAKE_BASE=TRUE
PWR2500
BATT_VCC
UART2_RXD
UART_ST
UART2_TXD
UART_ST
USB
USB_MUX_P
USB_MUX USB_MUX
USBFS
USBFS_P
USB USBFS
USB_MUX
USB_MUX_N
USB_MUXUSB
UART0_TXD
VCC_MAIN
UART0_RXD
STDOFF-2.4OD1.27-SM
STDOFF-1.8OD0.75-SM
STDOFF-2.1OD1P18H-0.72-1P6-TH
STDOFF-2.3OD1.18H-TH
SHLD-N90-EMI-FRAME-RF-BOT
SHLD-N90-EMI-FRAME-RF-TOP
SHLD-N90-EMI-FRAME-AP-TOP
SH1
1
SH2
1
SH3
1
SH4
1
SL6
1
SL5
1
SL3
1
SL4
1
SL8
1
SL10
1
SL9
1
SL11
1
C311
2
S2
4
3
10
6
7
5
8
9
2
1
S1
4
3
10
6
7
5
8
9
2
1
C192 1
2
FL20
1 2
FL18
1 2
C194
1
2
C2091
2
BS1
1
BS4
1
BS3
1
SL1
1
BS2
1
SH5
1
SL16
1
C140 1
2
C1641
2
FD1
1
FD2
1
FD5
1
FD4
1
FD3
1
FD6
1
SH6
1
17 OF 18
A.0.0
051-7921
CR-17 : @SINGLE_BRD_LIB.MLB(SCH_1):PAGE17
17 OF 29
91117
14
14
1727
1727
5911131728
81329
31322
31322
31327
327
327
328
328
327
327
327
327
327
327
81329
81329
81329
1327
1327
1327
1327
31322
31322
31327
31327
31327
327
327
1727
1727
1127
31122
322
322
322
322
1127
21827
31124
1124
1124
322
1327
1127
1129
327
327
327
327
327
327
327
327
329
327
1129
1129
322
322
327
1622
327
11
2
5911131728
811141627
327
327
2
318
91117
318
21. IN
IN
IN
IN
IN A
A
A
A
A
A
A
A
IN
IN
AIN
AIN
IN A
AIN
AIN
AIN
IN
IN
AIN
IN
A
AIN
IN
PP
PP
AIN
IN
IN
A
A
IN
A
A
A
A
A
A
A
A
A
IN
A
A
IN
IN
A
A
IN
IN
IN
IN
IN
A
A
A
A
IN A
IN
A
A
IN
IN
IN
A
A
IN
IN
IN
IN
IN
29
SIZE
D
D
A
B
C
DATE=N/A
18
.0
21
2 1345678
@SINGLE_BRD_LIB.MLB(SCH_1):PAGE18CR-18 :
C
A
D
B
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
36
IV ALL RIGHTS RESERVED
SHEET
8 7 5 4 2 1
18 OF
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
BRANCH
REVISION
DRAWING NUMBER
R
PAGE TITLE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
GPIO
RESET
SIGNAL GND(SENSE)
ACCESSORY DETECT
TEST POINTS
POWER GND
POWER
USB
UART
LCM
GRAPE
TEST
AUDIO
MIC
RECEIVER
LINE OUT
SPEAKER
HEADPHONE
TODO: CONN TO TP’S
14
51 11
14
317
317
TP-P6
NOSTUFF
NOSTUFF
TP-P6
TP-P6
NOSTUFF
NOSTUFF
TP-P6
TP-P6
NOSTUFF
NOSTUFF
TP-P6
NOSTUFF
TP-P6
NOSTUFF
TP-P6331 01
331 01
NOSTUFF
TP-P6
217
NOSTUFF
TP-P6
14
14 NOSTUFF
TP-P6
NOSTUFF
TP-P6
211
TP-P6
NOSTUFF10
TP-P6
NOSTUFF814
315
315
NOSTUFF
TP-P6
910
910
NOSTUFF
TP-P6
TP-P6
NOSTUFF816
816
P4MM
SM
SM
P4MM
TP-P6
NOSTUFF2
910
910
NOSTUFF
TP-P6
TP-P6
NOSTUFF
910
TP-P6
NOSTUFF
TP-P6
NOSTUFF
TP-P6
NOSTUFF
TP-P6
NOSTUFF
NOSTUFF
TP-P6
NOSTUFF
TP-P6
TP-P6
NOSTUFF
NOSTUFF
TP-P6
NOSTUFF
TP-P6
41 11
TP-P6
NOSTUFF
NOSTUFF
TP-P6
41 11
814
TP-P6
NOSTUFF
NOSTUFF
TP-P6
331 11 01
41 31
361 31 11
3
814
TP-P6
NOSTUFF
NOSTUFF
TP-P6
NOSTUFF
TP-P6
TP-P6
NOSTUFF
51 11
TP-P6
NOSTUFF
8
NOSTUFF
TP-1P0-TOP
TP-1P0-TOP
NOSTUFF
14
14
14
TP-P6
NOSTUFF
TP-P6
NOSTUFF
51 11
51 11
15
15
8
SYNC_
TEST POINTS
SYNC_MASTER=N/A
UART0_RXD
VOL_DWN_L
HOLD_KEY_L
FORCE_DFU
USB_DP_DOCK
UART0_TXD
TST_CLKOUT
VOL_UP_L
ADC_IN7
EXT_MIC_P_CONN
HPHONE_R_CONN
HPHONE_DET_CONN
HPHONE_L_CONN
SPKR_CONN_P
SPKR_CONN_N
RCVR_CONN_P
RCVR_CONN_N
INT_MIC1_P
INT_MIC1_N
INT_MIC2_P
INT_MIC2_N
LINE_OUT_L_CONN
LINE_OUT_R_CONN
AUDIO
LINE_REF
PWR50
NIMBUS_INT_L
SPI_ST
SPI1_SCLK
CLK_32K_PMU
LCD_BL_CC_F
LCD_BL_CA_F
LCD_5V7_AVDDH
USB_POWR_NO_PROTECT_CONN
USB_BRICKID
PP2V0_VIBE_F
ACC_DETECT_L
ACC_IDENTIFY
LCD_BOOST_CTRL
USB_DM_DOCK
RINGER_A
MENU_KEY_L
RESET_L
HPHONE_RET_SNS_CONN
TP433
1
TP432
1
TP442
1
TP443
1
TP441
1
TP440
1
TP438
1
TP431
1
TP413
1
TP430
1
TP429
1
TP425
1
TP4151
TP475
1
TP474
1
TP423
1
TP424
1
TP412
1
TP4211
TP477
1
TP447
1
TP444
1
TP451
1
TP452
1
TP449
1
TP450
1
TP469
1
TP468
1
TP466
1
TP465
1
TP457
1
TP455
1
TP6
1
TP1
1
TP2
1
TP5
1
TP71
TP3
1
TP12
1
TP11
1
TP10
1
PP8
1
PP9
1
TP8
1
18 OF
A.0
051-79
22. VDD_LDO_10
ADIO
ON_BUF
VLDO9_DSW
VLDO9
WLED2
WLED1
WIFIDIG
VSS
VLDO_12
VLDO_11
VLDO_10
VLDO_8
VLDO_7
VLDO_6
VLDO_5
VLDO_4
VLDO_3
VLDO_2
VLDO_1
VLCM2
VLCM1
VIB_PWM_EN
VIB
VDD_VIB
VDD_OUT
VDD_OUT_S
VDD_LDO_12
VDD_LDO_11
VDD_LDO_3_5_8
VDD_LDO_2
VDD_LDO_1_6
VDD_LDO4_7
VDD_LCM_SW
VDD_LCM
VDD_BUCK_1_2
VBUS_PROT_S
VBUS_PROT
VBUCK2_FB
VBUCK2
VBUCK1_FB
VBOOST_LCM
LX_LCM
LX_CHG
LX2
LX1
LCM_ISENSE
LCM2_EN
CPU_1V8
BOOST_SENSEP
IBAT_S
IBAT
VBUS_OV
VBUS
VBAT
BST_PROT
LX_LED
VCENTER
VCC_MAINUSB/BAT
1V8
VCORE
LDOLED_BOOSTLCM/GRAPEVIB
(2 OF 2)
G
S
D
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
OUT
IN
IN
NC
G
D
S
D
K
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
8
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
3
B
7
ECNREV
BRANCH
DRAWING NUMBER
REVISION
SIZE
D
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
DRAWING TITLE
THE POSESSOR AGREES TO THE FOLLOWING:
Apple Inc.
SHEET
R
DATE
D
A
C
THE INFORMATION CONTAINED HEREIN IS THE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
C
3456
D
B
8 7 6 5 4 2 1
12
APPD
CK
DESCRIPTION OF REVISION
CRITICAL BOM OPTION
TABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
SCH # : 051-8351
N90 ASHLEY_PMU SUB-DESIGN
LAYOUT: PLACE XW1 AND XW2 REMOTELY BY AP
19 OF 29
Thu Mar 18 14:15:23 2010
0000880153A
051-7921
A.0.0
1 OF 2
PRODUCTION RELEASED 2010-03-23
L1_PMU,L3_PMU,L16_PMU,L18_PMU
NOSTUFF
NOSTUFF
PWRSW_ST
PWRSW_ST
2.2UH-1.5A-98MOHM
PWR250
PWR50
BOOST_PROT
BOOST_SENSE_P
PWR250
CERM
VLS252012-SM
NOSTUFF
5.6UH-1.15A-462MOHM
PWR1000
PWR100
MAKE_BASE=TRUE
10%
D1815A4-C23-VAN2
UFBGA
10UF
6.3V
603
X5R
20%
6.3V
6.3V
10UF
X5R
603
20%
5.6UH-1.15A-462MOHM
VLS252012-SM
VDD_BUCK_1_2
PWR250
PWRSW_ST
LED_PWR_IN
VLS252012-SM
PWR2000SW_BUCK1
10UF
VBUS_OCP_SNS
VCC_MAIN
PWR250
PP1V2_HIPARK
PWR250 PP3V0_CAM
WLED2
SW_BOOST
VBUCK2_FB
PWR250 LCM_ISENSE
LCD_BOOST_GATE
VIB_PWM_EN
PWR250 PP2V0_VIBE
PWR250
LCM_LX
PWRSW_ST
PWR250
BST_SRC
BOOST_PROT
SW_BOOST
PWR100 PP1V2_PLL
PP1V1_CPU
PWR250 PP3V0_LCD
PP1V8_ALWAYSPWR250
BOOST_SENSE_P
SW_BUCK2
PWR1000
PWR250 PP2V8_CAM
PWR250
VSW_CHG PWR250
PWRSW_ST
VBOOST_LCM
PP1V7_VA_VCP
PWR250 PP1V8_GRAPE
PP3V3_ACC
BATTSNS
VCC_MAIN
PWRSW_ST
PWR2000
VBUS_PROT
USB_PWR_RPROT
VBUS_OV
PWR2000VCENTER
BATT_VCC_CURSNS PWR2500
PP1V8_VBUCK2
LCD_BST_SW
LCD_BOOST_GATE
LCD_BOOST_CTRL
PWR250 VLCM1
WLED1PWR250
PP3V0_NAND
PP3V0_VIDEO
PP1V8PWR250
VBUCK1_FB
PWR250 LCD_BL_CA
PWR100 MIC_HP_BIAS
PWR100 PP3V0_OPTICAL
PWR100 PP3V0_IO
MAKE_BASE=TRUE
GND_ST
201
1%
MF
1/20W
25.5K
6.3V
1UF
10%
402
CERM
10%
25V
805
X5R-CERM
2.2UF
VLS252012-SM
20%
6.3V
X5R-CERM1
402
4.7UF
X5R-CERM1
6.3V
402
20%
4.7UF
UMLP
2.2UH-1.8A-155MOHM
6.3V
603
10%
603
4.7UF
10%
6.3V
X5R-CERM
VLS252012-SM
3.3UH-1.4A-272MOHM
10%
402
6.3V
CERM
NOSTUFF
SM
SM
NOSTUFF
VDD_LDO_10
VDD_VIB
VDD_LCM
VDD_LDO_11
VDD_LDO4_7
VDD_LDO_3_5_8
VDD_LDO_1_6
TANT-POLY
CASE-A4
6.3V
20%
47UF
402
6.3V
10%
1UF
CERM
201
MF
1/20W
1%
0.1
402
10%
6.3V
CERM
1UF
82PF
5%
CERM
25V
0201
18PF
CERM
01005
16V
5%
X5R
20%
10UF
6.3V
603
1UF
6.3V
CERM
402
20%
603
6.3V
X5R
5%
6.3V
01005
56PF
10V
603
X5R
20%
10UF
PMEG2005AEL
SOD882
402
1UF
10%
6.3V
CERM
6.3V
1UF
402
CERMCERM
10%
402
6.3V
1UF
SOT723
NTK3134NTXXH
25V
5%
201
CERM
100PF39PF
25V
5%
NP0-C0G
201
402
MF-LF
1/16W
1%
470K
6.3V
X5R
NOSTUFF
10%
0.01UF
01005
CERM
1UF
402
6.3V 6.3V
CERM
402
10%
1UF
10%
6.3V
CERM
402
1UF
VLS3012-SM
CERM
10%
6.3V
402
1UF 10%
6.3V
402
CERM
1UF
CERM
402
1UF
6.3V
10%
1UF
402
10%
CERM
6.3V
1UF
402
10%
6.3V
402
10%
CERM
6.3V
1UF
NOSTUFF
SM
201
0.1
1/20W
MF
1%
402
20%
6.3V
X5R-CERM1
10%
1UF
6.3V
402
CERM
603
X5R
6.3V
20%
10UF10UF
20%
X5R
603
6.3V
CERM
10%
6.3V
1UF
402 402
6.3V
10%
CERM
1UF
20%10%
PWR1000
PWR250
LCD_BST_SW
LCM_ISENSE
4.7UF
PWR250
X5R-CERM1
1UF
10%
6.3V
CERM
402402
4.7UF
PWR100
SYNC_MASTER=N/A SYNC_DATE=N/A
?
10%
4.7UF
X5R-CERM
1UF
LCD_BOOST_OUT
PWRSW_ST
PP1V8_VBUCK2
603
20%
10UF
6.3V
X5R 6.3V
20%
10UF
X5R
603
PP1V35
PWR2000 PWRSW_ST
NP0-C0G
VBOOST_LCM
PWR1500
5.6UH-1.15A-462MOHM
VLS252012-SM
NOSTUFF
5.6UH-1.15A-462MOHM
FDFME3N311ZT
LED_LX
1 ?TDK POWER INDUCTORS607-6809 Y
2
1
C291_PMU
2
1
C298_PMU
2
1C243_PMU
2
1C453_PMU
2
1
C462_PMU
2
1
C47_PMU
2
1
C49_PMU
1
2
R519_PMU
1 2
XW147_PMU
2
1
C459_PMU
2
1
C460_PMU
2
1
C299_PMU
2
1
C301_PMU
2
1 C300_PMU
2
1
C474_PMU
L17_PMU
2
1
C267_PMU
2
1
C68_PMU
2
1
C70_PMU
2
1C42_PMU
2
1
C69_PMU
R522_PMU
2
1
C177_PMU
2
1 C179_PMU
K11
K7NC
J1
A3
A2
F2
E2
B2
J6
H6
H5
G8
G7
G6
G5
G4
F8
F7
F6
F5
F4
E8
E7
E6
E5
D8
D7
D6
D5
C6
A8
G11
L11
B11
J11
A11
C11
H11
E10
E11
B9
L2
L1
C5
L3
K3
L8
K8
J2
B8
G10
D11
F11
A10
H10
L4
K5
A5
J5
L5
B5
A1
D9
K2
K4
L7
A4
A6
J4
B6
B1
E3
H7
L9
L10
A7
J3
K6
J9
G3
E1
L6
U48_PMU
PMIC
3
2
1
Q3_PMU
2
1
C161_PMU
2
1
C191_PMU
2
1
C274_PMU
2
1
C76_PMU
1 2
D1_PMU
2
1 C190_PMU
2
1 C272_PMU
2
1
C153_PMU
2
1 C176_PMU
2
1 C160_PMU
2
1 C266_PMU
2
1 C265_PMU
2
1C58_PMU
2
1 C269_PMU
2
1 C168_PMU
1
2
R6_PMU
2
1
C203_PMU
1
2
C63_PMU
1 2
1 2
XW1_PMU
2
1C1_PMU
21
L2_PMU
2
1C178_PMU
2
1 C209_PMU
2
1 C32_PMU
1
2
L7_PMU
7
2
61
3
4
5
8
Q1_PMU
BACKLIGHT IC
2
1 C3_PMU
2
1 C2_PMU
1 2
L1_PMU
12
L3_PMU
1 2
L16_PMU
1 2
L18_PMU
2
1
C67_PMU
2
1
C164_PMU
1
2
1
2
R225_PMU
12
1
1
1
1
1
1
1
1
2
1
1
1
12
1
1
1
1
1
XW2_PMU
23. OUT
OUT
OUT
OUT
IO
IO
IO
OUT
IN
IN
IN
IN
INPUTI2CRESETWDOG
GPIO
TEMPERATURE
REFERENCES
INPUT
DIGITALANALOG
(1 OF 2)
T3
ACC_DET
ACC_ID
ADC_IN7
BRICK_ID
FW_DET
GPIO1
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
IREF
IRQ*
KEEPACT
RESET*
RESET_IN
SCL
SDA
SHDN
SWI
T1
T2
T4
TBAT
TCAL
VDD_REF
XTAL1
GPIO10
GPIO9
GPIO2
GPIO3
ADC_REF
VDD_RTC
VREF
XTAL2
BUTTON3
BUTTON2
BUTTON1
IN
IN
IN
OUT
OUT
IN
IN
ININ
IN
IN
IN
IN
IN
IN
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
FOREHEAD
BASEBAND
GPS
INTERNAL PULL-DOWN
H3P
RESISTOR FOR TEMP CALIBRATION
I2C ADDRESS: 1110100X (0X74)
CLK_32K_PMU
DOCK_BB_USB_SEL
1%
10K
MF
1/20W
201
01005
MF
NOSTUFF
100K
5%
1/32W
MF
402
3.92K
1/16W
0.1%
01005
CERM
16V
5%
22PF22PF
CERM
5%
01005
16V
32.768K-20PPM-12.5PF
2012
201
MF
1/20W
1%
10K
0.01UF
6.3V
10%
X5R
01005
GDZ-0201
GDZT2R5.1B
5%
01005
CERM
6.3V
100PF
CERM
6.3V
100PF
01005
5%
100PF
5%
01005
CERM
6.3V 10KOHM-1%
0201
01005
5%
100PF
6.3V
CERM
100PF
01005
CERM
5%
6.3V
SM
NOSTUFF
SM
NOSTUFF
SM
NOSTUFF
NOSTUFF
SM
SM
NOSTUFF
01005
1/32W
220K
MF
5%
5%
01005
MF
1/32W
10K
6.3V
10%
0.1UF
201
X5R
01005
X5R
10%
1000PF
6.3V
402
CERM
10%
0.22UF
10V
X5R
6.3V
10%
0.1UF
201 201
MF
1/20W
1%
200K
0.01UF
10%
X5R
6.3V
01005
0.01UF
X5R
6.3V
10%
01005
10KOHM-1%
0201
100K
1/20W
1%
MF
201
10K
MF
1%
1/20W
201
SYNC_MASTER=N/A SYNC_DATE=N/A
ASHLEY PMU
RESET_L
PMU_IRQ_L
I2C0_SCL_1V8
I2C0_SDA_1V8
ADC_REF
TCAL_XW
TCAL
SWI_BLCTRL
RESET_IN
SHDN
BOARD_TEMP4
BOARD_TEMP3
NTC
KEEPACT
MENU_KEY_L
ADC_IN7
PWR_KEY_L
FW_DET
RINGER_A
ACC_DETECT_R_N
ACCID
USB_BRICKID
BOARD_TEMP1
BOARD_TEMP2
OSC32O
CRYSTAL
OSC32I
CRYSTAL
MIKEY_INT_L
CLK_32K_WIFI
BATTERY_SWI
WLAN_HOST_WAKE
BT_HOST_WAKE
TEMP4_XW
VDD_REF
TEMP3_XW
TEMP2_XW
TEMP1_XW
IREF
AP_PMU_EXTON
VDD_RTC
VREF
ACC_DETECT_L
WL_BT_REG_ON
BB_PMU_ON_L
VCC_MAIN
PP1V8_ALWAYS
ACC_IDENTIFY
BB_PMU_ON_R_L
WL_BT_REG_ON_R
UFBGA
D1815A4-C23-VAN2
2 OF 2
A.0.0
051-7921
20 OF 29
1 2
R28_PMU
1 2
R517_PMU
1
2
R18_PMU
B4
K9
F3
F10
C8
J10
C2
D4
H4
K1
H3
E4
F9
C4
H9
C7
B7
B3
C3
C10
J7
B10
D10
A9
E9
C9
H2
G1
D1
D2
C1
D3
G2
F1
G9
H1
K10
J8
H8
U48_PMU
PMIC
2
1 C83_PMU
2
1C82_PMU
21
Y1_PMU
1 2
R1_PMU
2
1 C163_PMU
1
2 DZ1_PMU
2
1C7_PMU
2
1
2
1C6_PMU
2
1C5_PMU
2
1
R45_PMU
2
1
2
1C4_PMU
2
1C8_PMU
2
1
XW3_PMU
2
1
XW4_PMU
2
1
XW5_PMU
2
1
XW6_PMU
2
1
XW7_PMU
1
2
R165_PMU
1 2
R741_PMU
2
1 C454_PMUC455_PMU
2
1 C456_PMU
2
1 C457_PMU
1
2
R515_PMU
2
1 C154_PMU
2
1 C151_PMU
2
1
R38_PMU
1
2
R83_PMU
R190_PMU
1
1
0201
10KOHM-1%
R49_PMU
10KOHM-1%
0201
R48_PMU
24. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
8
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
3
B
7
ECNREV
BRANCH
DRAWING NUMBER
REVISION
SIZE
D
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
DRAWING TITLE
THE POSESSOR AGREES TO THE FOLLOWING:
Apple Inc.
SHEET
R
DATE
D
A
C
THE INFORMATION CONTAINED HEREIN IS THE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
C
3456
D
B
8 7 6 5 4 2 1
12
APPD
CK
DESCRIPTION OF REVISION
BASEBAND + MEMORY
THIS PAGE
BOARD - 920-XXXX
SCHEMATIC - 951-XXXX
02
03
09
BOM - 630-XXXX
05
06
08
07
BASEBAND I/O
CONTENTS
04
A-GPS
WLAN/BLUETOOTH RADIO
SYSTEM CONNECTORS
POWER AMPS AND RF FRONT END
GSM & UMTS TRANSCEIVER
BASEBAND POWER SUPPLY
iPhone 4 N90 (ICE3) HSPA RADIO
PVT - 04/15/10:BRD REV9
21 OF 29
0000880153A
051-7921
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PRODUCTION RELEASED 2010-03-23
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