SPICE MODEL of TC74AC541FW in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.

1. Device Modeling Report
COMPONENTS : CMOS DIGITAL INTEGRATED CIRCUIT
PART NUMBER : TC74AC541FW
MANUFACTURER : TOSHIBA
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

2. Truth Table
Circuit simulation result
1:OE1BAR 1
1:OE2BAR 0
U1:A1 0
U1:A2 0
U1:A3 0
U1:A4 0
U1:A5 0
U1:A6 0
U1:A7 0
U1:A8 0
Y1 Z
Y2 Z
Y3 Z
Y4 Z
Y5 Z
Y6 Z
Y7 Z
Y8 Z
0s 0.5us 1.0us
Time
Evaluation circuit
__ U1
HI G1 VCC
__
CLK A1 G2 CLK DSTM2
DSTM1 A2 Y1 OFFTIME = .2uS
Y1
ONTIME = .2uS ONTIME = .2uS
OFFTIME = .2uS A3 Y2
Y2
A4 Y3
Y3
A5 Y4
Y4 V1
A6 Y5 R4
Y5
A7 Y6 1MEG 5
Y6
A8 Y7
Y7
GND Y8
Y8
74AC541
0
Comparison table
Input Output
%Error
G1 G2 An Yn (Measurement) Yn (Simulation)
H X X Z Z 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

3. Truth Table
Circuit simulation result
1:OE1BAR 0
1:OE2BAR 1
U1:A1 0
U1:A2 0
U1:A3 0
U1:A4 0
U1:A5 0
U1:A6 0
U1:A7 0
U1:A8 0
Y1 Z
Y2 Z
Y3 Z
Y4 Z
Y5 Z
Y6 Z
Y7 Z
Y8 Z
0s 0.5us 1.0us
Time
Evaluation circuit
__ U1
CLK G1 VCC
__
DSTM1 A1 G2 HI
ONTIME = .2uS
OFFTIME = .2uS A2 Y1
Y1
A3 Y2
Y2
A4 Y3
Y3
A5 Y4
Y4 V1
A6 Y5 R4
Y5
A7 Y6 1MEG
Y6
5
A8 Y7
Y7
GND Y8
Y8
74AC541
0
Comparison table
Input Output
%Error
G1 G2 An Yn (Measurement) Yn (Simulation)
X H X Z Z 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

4. Truth Table
Circuit simulation result
1:OE1BAR 0
1:OE2BAR 0
U1:A1 1
U1:A2 1
U1:A3 1
U1:A4 1
U1:A5 1
U1:A6 1
U1:A7 1
U1:A8 1
Y1 1
Y2 1
Y3 1
Y4 1
Y5 1
Y6 1
Y7 1
Y8 1
0s 0.5us 1.0us
Time
Evaluation circuit
__ U1
LO
G1 VCC
__
HI
A1 G2 LO
HI A2 Y1
HI A3 Y2
HI A4 Y3
HI A5 Y4
V2
HI A6 Y5 R4 5
A7 Y6 1MEG
HI
HI A8 Y7
GND Y8
74AC541
0
Comparison table
Input Output
%Error
G1 G2 An Yn (Measurement) Yn (Simulation)
L L H H H 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

5. Truth Table
Circuit simulation result
1:OE1BAR 0
1:OE2BAR 0
U1:A1 0
U1:A2 0
U1:A3 0
U1:A4 0
U1:A5 0
U1:A6 0
U1:A7 0
U1:A8 0
U1:Y1 0
U1:Y2 0
U1:Y3 0
U1:Y4 0
U1:Y5 0
U1:Y6 0
U1:Y7 0
U1:Y8 0
0s 0.5us 1.0us
Time
Evaluation circuit
__ U1
LO
G1 VCC
__
A1 G2
LO LO
LO
A2 Y1
LO
A3 Y2
LO
A4 Y3
LO
A5 Y4
V2
LO
A6 Y5 R4 5
A7 Y6 1MEG
LO
LO
A8 Y7
GND Y8
74AC541
0
Comparison table
Input Output
%Error
G1 G2 An Yn (Measurement) Yn (Simulation)
L L L L L 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

6. High Level and Low Level Input Voltage
Circuit simulation result
6.0V
4.0V (571.504u,3.9327)
Output
Input
2.0V (529.903u,1.6447)
0V
0s 0.5ms 1.0ms 1.5ms 2.0ms
V(Y1) V(V1:+)
Time
Evaluation circuit
__ U1
LO
G1 VCC
__
A1 G2 LO
A2 Y1
Y1
A3 Y2
A4 Y3 V2
V1 = 0
V2 = 5.5 V1 A5 Y4
TD = 0.5m R2
TR = 0.1m A6 Y5 5.5
TF = 0.1m 1MEG
PW = 1m A7 Y6
PER = 2m
A8 Y7
GND Y8
74AC541
0
Comparison table
VCC = 5.5V Measurement Simulation %Error
VIH (V) 3.85 3.9327 2.148
VIL (V) 1.65 1.6447 -0.321
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

7. High Level and Low Level Output Voltage
Circuit simulation result
5.0V
2.5V
Output
SEL>>
0V Input
V(Y1)
5.0V
2.5V
0V
0s 5ms 10ms
V(V1:+)
Time
Evaluation circuit
__ U1
LO
G1 VCC
__
A1 G2 LO
A2 Y1
Y1
A3 Y2
A4 Y3 V2
V1 = 0
V2 = 4.5 V1 A5 Y4
TD = 0.5m R2
TR = 3n A6 Y5 4.5
TF = 3n 0.09MEG
PW = 1m A7 Y6
PER = 2m
A8 Y7
GND Y8
74AC541
0
Comparison table
VCC = 4.5V Measurement Simulation %Error
VOH (V) 4.5 4.4988 -0.027
VOL (V) 0 0 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

8. Propagation Delay Time
Circuit simulation result
5.0V 5.0V
1 2
Output
Input
2.5V 2.5V
>>
0V 0V
0s 0.5us 1.0us
1 V(TPLH) 2 V(U1:A1)
Time
Evaluation circuit
__ U1
LO
G1 VCC
__
A1 G2 LO
tplh
A2 Y1
A3 Y2
A4 Y3
A5 Y4
V1 = 0 V2
V2 = 5 A6 Y5 R1
TD = 0.2u V1 C1
TR = 3.8n A7 Y6 50p 500 5
TF = 3.8n
PW = 0.5u A8 Y7
PER = 1u
GND Y8
74AC541
0
Comparison table CL = 50 pF, RL = 500 
VCC = 5 V, tr = tf = 3 ns Measurement Simulation %Error
tPLH (ns) 4.7 4.7202 0.430
tPHL (ns) 4.7 4.7990 2.106
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

9. Output enable time, high impedance (off) to high output (tPZH)
Output disable time, high to high impedance (off) output (tPHZ)
Circuit simulation result
5.0V 5.0V
1 2
Output
Input
2.5V 2.5V
>>
0V 0V
0s 0.5us 1.0us
1 V(TPZH_TPHZ) 2 V(U1:OE2BAR)
Time
Evaluation circuit
__ U1
G1 VCC
__
HI
A1 G2
tpzh_tphz
A2 Y1
A3 Y2
A4 Y3
A5 Y4
V2
V1 = 0 V1 A6 Y5 C1 R1 R2
V2 = 5 50p
TD = 0.2u A7 Y6 500 500
TR = 3.8n 5
TF = 3.8n A8 Y7
PW = 0.5u
PER = 1u GND Y8
74AC541
0
Comparison table CL = 50 pF, RL = 500 
VCC = 5 V, tr = tf = 3 ns Measurement Simulation %Error
tPZH (ns) 6.4 6.5171 1.830
tPHZ (ns) 6.4 6.4001 0.002
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

10. Output enable time, high impedance (off) to low output (tPZL)
Output disable time, low to high impedance (off) output (tPLZ)
Circuit simulation result
5.0V
1 2
4.50V
Output
Input
2.5V
2.25V
>>
0V 0V
0s 0.5us 1.0us
1 V(TPZL_TPLZ) 2 V(V1:+)
Time
Evaluation circuit
__ U1
G1 VCC
__
A1 G2
LO
tpzl_tplz R2
A2 Y1
500
A3 Y2
A4 Y3
A5 Y4 V3
V1 = 0 V1 V2
V2 = 5 A6 Y5 C1 R1
TD = 0.2u
TR = 3.8n A7 Y6 50p 500
TF = 3.8n 10 5
PW = 0.5u A8 Y7
PER = 1u
GND Y8
74AC541
0
Comparison table CL = 50 pF, RL = 500 
VCC = 5 V, tr = tf = 3 ns Measurement Simulation %Error
tPZL (ns) 6.4 6.4668 1.044
tPLZ (ns) 6.4 6.4933 1.458
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005