Vlsi Titles 2015-2016

1. VLSI IEEE PAPER TITLES 2015-2016
S.NO PROJECT TITLE
ASSM01 Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic
ASSM02 Fault Tolerant Parallel Filters Based on Error Correction Codes
ASSM03 Design and Analysis of Approximate Compressors for Multiplication
ASSM04
Novel Design Algorithm for Low Complexity Programmable FIR Filters
Based on Extended Double Base Number System
ASSM05
An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on
Multilevel Conditional Probability
ASSM07
Floating-Point Butterfly Architecture Based on Binary Signed-Digit
Representation
ASSM08
Implementation of Subthreshold Adiabatic Logic for Ultralow-Power
Application
ASSM09
Novel Block-Formulation and Area-Delay-Efficient Reconfigurable
Interpolation Filter Architecture for Multi-Standard SDR Applications
ASSM10
A High-Performance FIR Filter Architecture for Fixed and Reconfigurable
Applications
ASSM11
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a
Wide Range of Supply Voltage Levels
ASSM12 Low-Power and Area-Efficient Shift Register Using Pulsed Latches
ASSM13
Array-Based Approximate Arithmetic Computing: A General Model and
Applications to Multiplier and Squarer Design
ASSM14 Recursive Approach to the Design of a Parallel Self-Timed Adder
ASSM15
Fully Reused VLSI Architecture of FM0/Manchester Encoding Using SOLS
Technique for DSRC Applications
ASSM16 Further Desensitized FIR Half band Filters
ASSM17 Design and Analysis of Inexact Floating-Point Adders
ASSM18
Scalable Verification of a Generic End-Around-Carry Adder for Floating-
Point Units by Coq
ASSM19
Fine-Grained Critical Path Analysis and Optimization for Area-Time
Efficient Realization of Multiple Constant Multiplications
ASSM20
Exact and Approximate Algorithms for the Filter Design Optimization
Problem

2. ASSM21
A Generalized Algorithm and Reconfigurable Architecture for Efficient and
Scalable Orthogonal Approximation of DCT
ASSM22
An Analytical Framework for Evaluating the Error Characteristics of
Approximate Adders
ASSM23 ERSFQ 8-Bit Parallel Adders as a Process Benchmark