The document provides a detailed modeling report for the UPC7824A voltage regulator by NEC Electronics, including parameter descriptions and simulation results. It presents various performance metrics such as input-output voltage characteristics, ripple rejection ratios, and output characteristics with corresponding simulation errors. Additionally, it outlines the evaluation circuits used for testing and the associated data demonstrating the regulator's efficiency.

1. Device Modeling Report
COMPONENTS : VOLTAGE REGULATOR
PART NUMBER : uPC7824A
MANUFACTURER : NEC Electronics Corporation
Panasonic
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

2. MODEL PARAMETER
Pspice
model Model description
parameter
VREF Reference Voltage
N Emission Coefficient
BETA Tranconductance of JFET Transistor
VAF Early Voltage of Output Pass Transistor
CPZ Output Impedance Zero Capacitor
RB2 Base Resistance of Output Limit Voltage Source
ESC1 Coefficient of Current Limit Voltage Source
ESC2 Coefficient of Current Limit Voltage Source
EFB1 Coefficient of Foldback Current Voltage Source
EFB2 Coefficient of Foldback Current Voltage Source
EFB3 Coefficient of Foldback Current Voltage Source
EB Non-ideal Base-Collector Diode Saturation Current
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

3. Input-Output Voltage Differential Characteristic
Evaluation Circuit
U1
1 3
IN OUT
GND UPC7824A
2
V1 RL
33 Cout
48
0.1u
0
Simulation result
Input - Output
Input
Example
VIN - VOUT Measurement Simulation % Error
33 (V) – 24(V) 9 (V) 9.0021 (V) 0.023
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

4. Ripple Rejection (RR) Characteristic
Evaluation Circuit
U1
Vin Vout
1 3
IN OUT
GND UPC7824A
2
D1 D2
S1VBA S1VBA C1 Cout RL
0.1u 0.1u 48
V1
D3 D4
VOFF = 0
VAMPL = 1
FREQ = 120 S1VBA S1VBA
V2
33
0
Simulation result
Output
Input
Comparison Table
Measurement Simulation % Error
Ripple rejection ratio
(dB)
62 59.576 -3.910
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

5. Output Characteristic
Evaluation Circuit
U1 V(1,0)*(V(%IN+, %IN-)-1)
E1
1 3
IN OUT OUT+ IN+
GND UPC7824A OUT- IN-
D1 D2 EVALUE ABM
2
V(2,0)+V(3,0)
1
S1VBA S1VBA
C4
C1 R3
VOFF = 0 D3 D4 0.1u RL
2300u 10MEG
V1
VAMPL = 38 48
S1VBA S1VBA
FREQ = 50
0
2 3
V1 = 10 V2 V1 = 0 V3
V2 = 0.05 V2 = 100 R5
TD = 50m R4 TD = 0
TR = 500m TR = 50n 10MEG
TF = 50n 10MEG TF = 50n
PW = 50n PW = 50m
PER = 600m PER = 600m
0
Simulation result
Simulation
Comparison Table
Output Voltage Measurement Simulation % Error
(V) 24 23.882 -0.492
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004