This resume is for R. Mallikarjun Raju seeking a position where he can enhance his skills and contribute to company growth. He has a M.Tech in VLSI System Design from VNR Vignana Jyothi Institute of Technology and a B.Tech in ECE from S S Institute of Technology. His skills include Verilog RTL coding, digital design concepts, ASIC and FPGA design flow, and IC fabrication processes. He is proficient in C and Verilog programming languages and tools like Modelsim, Design Compiler, and Synopsys. His academic projects include schematic and layout design for a parallel adder with accumulator. His main project involved low-power circuit analysis and design of

1. RESUME
R.Mallikarjun Raju
Email Id: mallikarjunrupani@gmail.com +919014953304
CAREER OBJECTIVE
To be a part of an organization where I can enhance my skills and can put efforts for the
company’s growth.
CORE KNOWLEDGE
 Good knowledge of Verilog RTL coding, Digital Design Concepts.
 Good understanding of fundamentals of Transistors and circuit theory.
 Implemented VLSI projects during my postgrad.
 Good knowledge of ASIC and FPGA design flow.
 Excellent knowledge of IC Fabrication process.
EDUCATIONAL QUALIFICATIONS
KEY SKILLS
PROGRAMMING LANGUAGES: C,Verilog HDL.
TOOLS EXPLORED:
Front end: Modelsim,Design compiler,Formality,Design architect
Back end: Mentor tools,Custom design in Synopsys,IC process
ACTIVITIES & ACHIEVEMENTS
 Qualified in PGECET -2013 with 93.66 percentile.
 Organized and participated in the Technical Fest in our college in 2013.
 Active member of NSS and Blood donation camp.
 Stood as winner in Chess at our school level.
DEGREE/
EXAMINATION
SCHOOL/COLLEGE
BOARD/
UNIVERSITY
YEAR OF
PASSING
%
MARKS
M.Tech
(VLSI System
Design)
VNR Vignana Jyothi
Institute Of Technology
JNTU-Hyderabad 2015 79.8
B.Tech (ECE)
S S Institute of
Technology
JNTU - Hyderabad 2013
78
Intermediate
(MPC)
Gautami Academy Junior
College
Board Of
Intermediate, A.P.
2009 89
CLASS X (SSC) Patmos High School
Board Of
Secondary
Education, A.P.
2007 82.5

2. ACADEMIC PROJECTS:
 Title: “Parallel adder with accumulator”
 Role : Schematic and layout design
 Tools Used:Mentor Graphics Design Architect and IC For Layout.
 Description: To draw Schematic and Layout for parallel adder and performing
DRC and LVS.
MAIN PROJECT :
 Title: “Low-Power Circuit Analysis and Design Based on Heterojunction Tunneling
Transistors (HETTs)”
 Role Played: design.
 Tools Used : Mentor Graphics Design Architect and IC For Layout and Synopsys.
 Description: To design Hetero tunneling transistors and do the low power circuit
analysis
MINI PROJECT :
 Title: “Vedic Multiplier”
 Role Played: design.
 Tools Used : Modelsim and Xilinx ISE
 Description: To design RTL for vedic multiplier in verilog HDL and Functional
verification is done.
PERSONALDETAILS
Name : R. Mallikarjun Raju.
Date of Birth :29 𝑡ℎ
Oct 1991.
Nationality : Indian.
Languages known : Hindi, Telugu, English.
Father’s Name : R. Krishna.
Address : H.No:13-4-61, V Rama Rao Nagar,
Mothinagar, RR dist, Telangana-500018.
DECLARATION:
I hereby declare that the above mentioned information is correct up to my knowledge
and I bear all responsibility for the correctness of the above mentioned particulars.
Place: HYDERABAD. [R.Mallikarjun Raju]
Date: