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PROTOTYPING AND SIMULATION OF WEAR
LEVELING AND BAD BLOCK MANAGEMENT
ALGORITHMS USING C
Thesis submitted in partial fulfillment of the
Requirements for the degree of
MASTER OF SCIENCE (M. Sc.)
in
DIGITAL DESIGN AND EMBEDDED SYSTEMS
by
Walter Jesuslee Savio Rodrigues
Under the guidance of
Mr. Nagaraja Katil Prof. Harishchandra Hebbar
Director of Engineering Director
Manipal Dot Net Pvt. Ltd. MCIS
Manipal Manipal University, Manipal
MANIPAL CENTRE FOR INFORMATION SCIENCE
(A Constituent College of Manipal University, Manipal)
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ABSTRACT
Although NAND flash memory has become one of the most popular storage media for
portable devices, it has a serious problem with respect to lifetime. Each block of NAND
flash memory has a limited number of program/erase cycles, usually 10,000–100,000,
and data in a block become unreliable after the limit.
The need for wear leveling results from the finite Program/Erase cycling capability of
NAND Flash memory cells. The repeated use of a limited number of blocks can cause the
device to prematurely wear out or exceed its program/erase endurance. The wear-leveling
process spreads NAND Flash memory cell use over the available memory array, ideally
equalizing the use of all memory cells and helping to extend device life.
Many wear-leveling algorithms have been proposed from academia and industry. We
here examine the correctness and effectiveness of the Basic Hot-Cold Swapping
Algorithm and the Group-Based Algorithm using a C based implementation.
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1. NAND Flash Memory
1.1 Introduction
NAND Flash memory is a non-volatile computer memory that can be electrically erased
and reprogrammed. It is a technology that is primarily used in memory cards and USB
Flash drives for general storage and transfer of data between computers and other digital
products. It is a specific type of EEPROM (Electrically Erasable Programmable Read-
Only Memory) that is erased and programmed in large blocks. NAND Flash memory
costs far less than byte-programmable EEPROM and therefore has become the dominant
technology wherever a significant amount of non-volatile, solid state storage is needed.
Example applications include PDAs (personal digital assistants), laptop computers,
digital audio players, digital cameras and mobile phones.
Since NAND Flash memory is non-volatile, no power is needed to maintain the
information stored in the chip. In addition, NAND Flash memory offers fast read access
times (although not as fast as volatile DRAM memory used for main memory in PCs) and
better kinetic shock resistance than hard disks. These characteristics explain the popularity
of NAND Flash memory in portable devices. Another feature of NAND Flash memory is
that when packaged in a "memory card," it is enormously durable, being able to withstand
intense pressure, extremes of temperature, and even immersion in water.
While technically a type of EEPROM, the term "EEPROM" is generally used to refer
specifically to non-NAND Flash EEPROM which is erasable in small blocks, typically
bytes. Because erase cycles are slow, the large block sizes used in NAND Flash memory
erasing give it a significant speed advantage over old-style EEPROM when writing large
amounts of data.
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1.2 Flash Basics
The NAND Flash array is grouped into a series of blocks, which are the smallest erasable
entities in a NAND Flash device. A NAND Flash block is normally 128KB. Erasing a
block sets all bits to “1” (and all bytes to FFh). Programming is necessary to change
erased bits from “1” to “0.” The smallest entity that can be programmed is a byte. Some
NOR Flash memory can perform READ-While-WRITE operations. Although NAND
FLASH cannot perform READs and WRITEs simultaneously, it is possible to accomplish
READ/WRITE operations at the system level using a method called shadowing.
Shadowing has been used on personal computers for many years to load the BIOS from
the slower ROM into the higher-speed RAM.
There is a limit to the number of times NAND Flash blocks can reliably be programmed
and erased. Nominally, each NAND block will survive 100,000 PROGRAM/ERASE
cycles. A technique known as wear leveling ensures that all physical blocks are exercised
uniformly. To maximize the lifespan of a design, it is critical to implement both wear
leveling and bad-block management.
Figure 1: NAND flash memory structure
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NAND efficiencies are due in part to the small number of metal contacts in the NAND
Flash string. NAND Flash cell size is much smaller than NOR Flash cell size because
NOR Flash cells require a separate metal contact for each cell.
NAND Flash is very similar to a hard-disk drive. It is sector-based (page-based) and well
suited for storage of sequential data such as pictures, video, audio, or PC data. Although
random access can be accomplished at the system level by shadowing the data to RAM,
doing so requires additional RAM storage. Also, like a hard-disk drive, a NAND Flash
device may have bad blocks and requires error-correction code (ECC) to maintain data
integrity. NAND Flash cells are 60 percent smaller than NOR Flash cells, providing the
higher densities required for today’s low-cost consumer devices in a significantly reduced
die area.
1.3 NAND Flash Lifetime Metrics
Flash memory lifetimes are described in two primary metrics:
Data retention
Endurance cycles
Data retention is often listed at 20 years at a given operating temperature. Increased
temperature ranges reduce the data retention period which further decrease as the flash
memory is used at or near its specified operating temperatures. It is important to note that
data retention is measured from the time data is successfully programmed.
The second metric, endurance cycles, is a measure of the number of write and erase
cycles that the flash memory can endure before becoming unreliable. Flash memories are
organized into a number of erase blocks or sectors and each must be erased prior to
writing data. A typical erase block is 128KB in size, however may range from 512B to
2,048KB or even more. Any given address within an erase block cannot be rewritten
without an intervening erase. Erase cycles are cumulative and affect only those erase
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blocks being cycled. In other words, an error in any erase block is constrained to the data
of that block.
Erase cycles range around 10K for MLC and 100K for SLC. So, it is the application the
flash is placed into that will primarily define the product lifetime.
1.4 NAND Flash Memory Array Management
With use, memory cells that make up blocks of the NAND Flash memory array can wear
out. This is true of all Flash technology. Robust systems take block failure into account
and make appropriate adjustments.
1.4.1 Bad-Block Identification
Most NAND Flash devices, like all types of mass storage memory, contain some initial
bad blocks within the memory array. These blocks are typically marked as bad by the
manufacturer, indicating that they should not be used in any system. NAND Flash device
data sheets provide the location of bad-block markings. Factory testing is performed
under worst-case conditions, and those blocks that fail this testing are marked bad. If a
factory-marked bad block is used in a system it may appear to operate normally, but may
cause other, good blocks to fail, or create additional unforeseen system errors. If a
customer erases a factory-marked bad block, the marking is also erased. To avoid losing
this information, it is best to do an initial read for bad blocks and create a bad block table
before issuing any PROGRAM or ERASE commands. After the original bad-block table
is created, it must be maintained and updated as additional blocks go bad with use.
1.4.2 Block Degradation and Tracking
Because good blocks in a NAND Flash device can degrade and wear out, it is important
to track not only the initial, factory-marked bad blocks but also the blocks that go bad
during normal device operation. To detect whether a block has worn out and is now bad,
issue a READ STATUS command after any ERASE or PROGRAM operation. This
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command will report whether the previous operation passed or failed. READ STATUS
will only report a failure for a PROGRAM operation if at least one bit in the page
programmed did not change from a “1” to a “0” state. READ STATUS will only report a
failure for an ERASE operation if at least one bit in the block erased did not change from
a “0” to a “1” state.
1.4.3 Types of Failure
When failures occur during NAND Flash device operation, they are categorized as either
permanent or temporary failures. A permanent failure is one from which the NAND Flash
device cannot recover. Temporary failures can be corrected or avoided.
a. Permanent Failures
Permanent failures usually appear to the user as one or more bits in a NAND Flash page
that are stuck in the “0” or “1” state and cannot be altered by PROGRAM or ERASE
operations. When a permanent failure occurs, it is necessary to add the block to the bad
block table and avoid using it in the future.
b. Temporary Failures
Temporary failures can be minimized with proper NAND Flash design practices. If these
failures do occur, it is possible to recover the failing location of the memory array, the
block need not be added to the bad-block table. Temporary failures occur in multiple
forms:
1. Program Disturb: A program disturb error occurs when one or more bits not
intended to be programmed are changed from “1” to “0” during a PROGRAM
operation. An increased number of partial-page programs to a page can exacerbate
this error. Program disturb errors can show up on pages being programmed or on
other pages within the same block. To recover from this type of error, erase the
block where the error occurred and reprogram the data to that block.
2. Read Disturb: A read disturb error occurs when one or more bits are changed
from “1” to “0” during a READ operation. Read disturb errors occur within the
block being read, but on a page or pages other than the page being read.
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Performing a high number (hundreds of thousands or millions) of READ
operations on individual pages before an ERASE command for the block
containing those pages can exacerbate this error. To recover from this type of
error, erase the block where the error occurred and reprogram the data to that
block
3. Over-programming: Over-programming can occur when a memory-cell
threshold gate voltage on a bitline within a block goes too high. This prevents the
memory cells from being read, and a “0” is read at the targeted bit location for
every other page in the block. To recover from this type of error, erase the block
where the error occurred and reprogram the data to that block.
4. Data Loss: During extended storage periods, some memory cells can lose data by
changing from “1” to “0” via charge gain or from “0” to “1” via charge loss. High
ERASE/PROGRAM cycle counts can exacerbate data loss by inducing trapped
charge in the gate oxide of the memory cells, effectively wearing out the gate
oxide. To recover from this type of error, erase the block where the error occurred
and reprogram the lost data.
1.4.4 NAND Flash Controllers
Using the low-level commands (READ/PROGRAM/ERASE) to read and program data to
NAND Flash devices is only one aspect of NAND Flash operation within a system.
NAND Flash controllers can be implemented in a system to enhance NAND Flash
performance. Controllers typically provide wear leveling, error correction code (ECC),
and bad-block management. A controller can be implemented in software, hardware, or a
combination of the two. Generally, the controller resides between the host and the NAND
Flash device and controls access to the device.
1.4.5 Wear Leveling
Because NAND Flash memory cells can eventually wear out, a robust NAND Flash
implementation should include a wear-leveling strategy. Wear leveling is used to
translate a logical memory address to different physical memory addresses each time a
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file is programmed. This operation is monitored and implemented by the controller
connected to the NAND Flash device. Wear leveling spreads NAND Flash memory-cell
use over the entire range of the memory array, equalizing use of all the memory cells, and
helping extend the life of the device.
1.4.6 Error Correction Code (ECC) Requirement
Bit errors can occur during NAND Flash device operation or during long periods of
inactivity, making ECC use mandatory. ECC is generally characterized in terms of the
number of bits the code can correct per data sector checked. For example, if a controller
has 1-bit ECC, it is able to correct one 1-bit error in each data sector.
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2. Wear-Leveling in NAND Flash
2.1 Introduction
Although NAND flash memory has become one of the most popular storage media for
portable devices, it has a serious problem with respect to lifetime. Each block of NAND
flash memory has a limited number of program/erase cycles, usually 10,000 in case of
MLC and 100,000 in case of SLC, The data in a block become unreliable after the limit.
For this reason, distributing erase operations evenly across the whole flash memory
media is an important concern in designing flash memory storage systems.
Many wear-leveling algorithms have been proposed from academia and industry. The
design issues that need to be addressed by the designer include 1) how to evenly wear all
blocks and 2) how to reduce traffic introduced by wear leveling. Among many prior
works, one misconception is to prevent some particular blocks from being poorly worn.
However, as in realistic workloads a majority of data are cold, to start wearing such
blocks may require a lot of data movements, and in turn the data movements
unnecessarily wear NAND flash memory. On the other hand, as high-capacity NAND
flash memory is becoming affordable, many previously proposed algorithms start scaling
poorly. Either large RAM space or considerable CPU time is required.
2.2 The Importance of Wear Leveling
The need for wear leveling results from the finite Program/Erase cycling capability of
NAND Flash memory cells. The repeated use of a limited number of blocks can cause the
device to prematurely wear out or exceed its program/erase endurance. The wear-leveling
process spreads NAND Flash memory cell use over the available memory array, ideally
equalizing the use of all memory cells and helping to extend device life.
Consider a case without wear leveling. In a NAND Flash device with 4,096 total blocks
and 2.5% allowable bad blocks in a system that updates 3 files comprised of 50 blocks
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each at a rate of 1 file every 10 minutes (or 6 files per hour), where a NAND host reuses
the same 200 physical blocks for these updates, the NAND Flash device will wear out in
under 1 year, leaving over 95% of the memory array unused.
10,000 cycles x 200 blocks
Only 200 blocks are reused: ------------------------------------------------------------------
50 blocks per file x 6 files per hour x 24 hours per day
= ~278 days or <1 year
In contrast, in a situation where all blocks are used equally by programming and erasing
4,096 of them at a rate of 50 blocks every 10 minutes (or 6 files per hour), even
distribution of wear across all blocks dramatically increases the useful life of the device.
10,000 cycles x 4,096 blocks
4,096 blocks are evenly used: ----------------------------------------------------------------
50 blocks per file x 6 files per hour x 24 hours per day
= ~5,689 days or >15 years
Wear leveling not only extends the life of a Flash device, it also enables the memory
capacity to be used more efficiently. Reusing only 200 blocks results in programming and
erasing about 2 million effective blocks over the life of the device, while evenly using all
4,096 blocks results in programming and erasing more than 40 million effective blocks.
2.3 Wear-Leveling Methods
Wear leveling can be implemented using several methods, each of which adds
complexity, but increases the life of NAND Flash devices. A lack of wear leveling can
dramatically reduce the useful life of the NAND Flash device.
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Two types of data exist in NAND Flash devices: static and dynamic. Static data (Cold
data) is information that is rarely, if ever, updated. It may be read frequently, but it
seldom changes and can theoretically reside in the same physical location for the life of
the device. Dynamic data (Hot data), on the other hand, is constantly changing and
consequently requires frequent reprogramming.
2.3.1 Implementing Dynamic Wear Leveling
Dynamic wear leveling is a method of pooling the available blocks that are free of data
and selecting the block with the lowest erase count for the next write. This method is
most efficient for dynamic data because only the non-static portion of the NAND Flash
array is wear-leveled. A system that implements dynamic wear leveling enables longer
NAND Flash device life than a system that does not implement wear leveling.
For instance, in a device with a 25% / 75% split of dynamic data versus static data,
respectively, dynamic wear leveling targets the 25% of the blocks of dynamic memory
area, while the other 75% of the blocks remain idle with static data. In this case, 25% of
the available blocks are used to their maximum cycle count.
Figure 2: NAND Flash Data Distribution
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In a 4,096-block MLC device with a 10,000-cycle count, 75% static data, and a program
and erase rate of 50 blocks every 10 minutes (or 6 files per hour), dynamic wear leveling
results in device wear-out after approximately 4 years, with 75% of the blocks nearly
unused as seen in the above figure.
10,000 cycles x 1,024 blocks
Wear leveling only dynamic data: -----------------------------------------------------------------
50 blocks per file x 6 files per hour x 24 hours per day
= ~1,422 days or <4 years
2.3.2 Implementing Static Wear Leveling
Static wear leveling utilizes all good blocks to evenly distribute wear, providing effective
wear leveling and thereby extending the life of the device. This method tracks the erase
cycle count of all good blocks and attempts to evenly distribute block wear throughout
the entire device by selecting the available block with the least wear each time a program
operation is executed. Static data is managed by maintaining all blocks within a certain
erase count threshold. Blocks that contain static data with erase counts that begin to lag
behind other blocks will be included in the wear-leveling block pool, with the static data
being moved to blocks with higher erase counts.
Although the additional step of moving static data to free up space in low erase count
blocks can slow write performance (because it requires additional controller overhead)
and can consume some block life, overall, static wear leveling is the best method for
maximizing the life of a NAND device.
Using the same example of a 4,096-block MLC device with a 10,000-cycle count, 75%
static data, and a program and erase rate of 50 blocks every 10 minutes (or 6 files per
hour), static wear leveling provides the best chance of extending the device life span
beyond 15 years.
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10,000 cycles x 4,096 blocks
Wear leveling static & dynamic data: --------------------------------------------------------
50 blocks per file x 6 files per hour x 24 hours per day
= ~5,689 days or >15 years
The drastic difference in block utilization between dynamic and static wear leveling is
illustrated in the figure below.
Figure 3: Static vs. Dynamic Block Utilization
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2.4 Choosing Wear-Leveling Methods
Choosing a wear-leveling method involves evaluating the advantages and disadvantages
of each method.
Figure 4: Static vs. Dynamic Wear-Leveling Methods
2.5 Wear-Leveling Considerations in Die Memory Arrays
2.5.1 Impact of Zoning
Some controllers use a zoning approach, in which wear leveling is segmented into subsets
of the total die memory array. Because wear leveling is contained within each zone, if one
zone wears out sooner than the remaining zones, the entire die prematurely wears out
before all blocks reach their maximum cycling count. Even when static wear leveling is
used, this approach can result in a shorter device life span.
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Figure 5: Data Distribution Using Multiple Zones
If dynamic wear leveling is applied in a die where zone 1 contains 25% dynamic data and
75% static data, only 25% of the blocks in this zone will be used for wear leveling. Zone
1 will likely become worn out sooner than the remaining 3 zones, causing the die to wear
out before all blocks reach their maximum cycle count.
Even though static wear leveling helps ensure equal block use within each zone if the
controller treats each zone separately, different zones might receive different levels of
use. As such, one zone is likely to wear out before another, which would cause the die to
wear out prematurely. The most effective approach is to encompass all good blocks in the
memory array into a single zone to help ensure equal wear leveling.
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Figure 6: Data Distribution Using a Single Zone
2.5.2 Wear Leveling Across Multiple Die
In devices with multiple die, wear leveling should be applied across all die to ensure
equal use of blocks and avoid premature wear-out. The best implementation of wear
leveling in devices with multiple die is to consider the wear-leveling pool to be all the
good blocks within the device. This helps ensure that a single die does not wear out
before the remaining die, which enables the device to reach maximum operating life.
For example, in a solid state drive application with many NAND devices, if wear leveling
is not completed across all devices, it is highly likely that some devices may experience
greater wear and wear out more quickly. These prematurely worn blocks can cause the
solid state drive to operate as read-only before all blocks and/or devices are fully used.
The proper implementation of wear leveling can ensure that solid state drives continue to
function to the full extent of their maximum available useful life.
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2.6 Basic Hot-Cold Swapping Algorithm
Uneven wearing of flash-memory blocks is mainly due to spatial localities in work load.
Usually cold data statically reside in blocks, while hot data quickly leave many pages of
invalidated data in blocks. Since to write hot data occurs more frequently than to write
cold data does, hot data could be circulated in some particular blocks. Block-mapped
Flash Translation Layer is widely used for large-capacity flash storage because they
require relatively smaller memory size than page-mapped Flash Translation Layer. In a
block-mapped Flash Translation Layer, LBAs (Logical Block Addresses) are translated
into physical addresses in flash memory. Each LBA is divided into a logical block number
and an offset. The logical block number is mapped onto a physical flash block (data
block) with the assistance of address translation table, and the offset is used to find the
page inside the block which contains the designated data.
Figure 7: Conversion of LBA to PBA
The hot-cold swapping algorithm which is a static wear-leveling algorithm tries to
balance erase cycles by periodically swapping hot data in old blocks with cold data in
young blocks. We define data blocks with relatively low erase cycles as young blocks,
while data blocks with relatively high erase cycles as old blocks. The data in a data block
that are not updated for a long time, we regard them as cold data. Every time when data
needs to be updated the erase count of the live hot block is compared with a certain
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threshold called Block to Update Threshold, If the block has reach the threshold then the
incoming data is assigned to an update block. Thus an update block (sometimes called
replacement block or log block) get the new data. So, the update blocks are likely to be
re-written and erased soon due to temporal and spatial locality in storage access patterns.
Therefore, the data in update blocks are classified into hot data.
Figure 8: Flowchart for the Basic Hot-Cold Swapping Algorithm
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In the proposed scheme, the swapping condition is also examined whenever a new update
block is allocated to a data block. As we described above, an update block will be erased
soon and the erase cycle of the block will grow faster than blocks containing cold data.
Before an update block is allocated, the erase cycle of the update block is compared with
the Block to Swap threshold. Swapping between the youngest live block and live hot
block is performed when the erase cycles of update block has reached the Block to Swap
threshold.
Erase cycle of the live block is compared with a threshold, which is the maximum erase
cycles that the flash block can undergo, this compare is done before every erase
operation, if the block erase cycle has reached the threshold then the block is declared as
permanently bad. The bad block is mapped out of the active region by swapping it with
an update block.
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2.7 Group-Based Algorithm
The main purpose of the group-based algorithm is to reduce memory requirement for
storing wear information. The basic idea is to organize several blocks into a group and to
keep only the summary information for each group in memory, instead of maintaining
wear information for every block.
In the proposed algorithm, a group consists of a fixed number of adjacent logical blocks,
and a group summary represents its overall wear status. The group summary information
is used to detect uneven wearing and to find victim groups for wear leveling. Suppose
that a group summary shows that blocks in the particular group are much younger than
other blocks. Then, the group is selected as a victim group for wear leveling, and the
blocks in the group are swapped with the other blocks in an update group.
Since the proposed algorithm relies on the group summary information, the effectiveness
of wear leveling depends on the accuracy of the summary information. This is because,
unlike other wear-leveling schemes that utilize per-block information, the group
summary information only denotes the overall wear status of blocks that belong to the
group. In order to minimize negative impact on wear leveling, the summary should be
designed to represent the wear status of a group as closely as possible.
One of the simplest approaches is to use the average erase cycle of a group as the group
summary. This is straight forward and easy to implement; the average can be recalculated
whenever a block is erased. However, the simple averaging scheme is not accurate
enough to express the wear status of a group. To illustrate, suppose that several blocks in
a group are swapped with old blocks. In this case, the average erase cycle of the group
gets much higher than young blocks in the group, and those young blocks may not be
eligible for swapping any more due to the increased average erase cycle of the group, the
group may be marked bad.
In this scheme whenever a data in a block need to be updated the average erase cycle of
the group containing the block who contain needs to be updated is compared with a
certain threshold called the Group to Update threshold, if the average erase cycle of the
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group has reached the threshold then the update data is assigned to a update group. So the
blocks in the update group are swapped with the blocks in the live group that has reached
the threshold. But before the swap take place the average erase cycle of the assigned
update group is compared with the Group to Swap threshold, if the update group has
reached the threshold then a youngest live group is searched and selected, that is a live
group with the lowest average erase cycle. So the blocks in youngest live group are
swapped with the blocks of the hot live group that has reached the Block to Update
threshold.
Figure 9: Flowchart for the Group-Based Algorithm
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When a certain number of blocks in a group have become bad we tag the entire group as
a bad group, while the individual blocks are declared as bad based on the erase cycle. The
bad groups are mapped out of the active region by swapping it with an update group.
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3. Implementation of the Group-Based Wear-leveling
Algorithm with Basic Hot-Cold Block Swapping
3.1 Terminology Used
LBA (Logical Block Address): The LBA is the address that the operating system uses
while issuing a read, write or an erase to a block on the flash drive.
PBA (Physical Block Address): The PBA is the fixed, physical address of a block on the
flash drive.
Hot data: Data in the data block that are updated regularly are regarded as Hot data.
Cold data: Data in the data block that are not updated frequently are regarded as Cold
data.
Update Block: when data in the data block is to be update, a new block is assigned to the
corresponding data block and the incoming data is written to this block which is called an
Update Block.
Live Block: Data block that is in the active region.
Update Group: An Update Group is a group which consists of consecutively located
update blocks.
Young Blocks: Data blocks with relatively low erase cycles.
Old Blocks: Data blocks with relatively high erase cycles.
Youngest Live Block: Data block in the active region with the least erase cycles.
Youngest Live Group: A group in the active region with the least average erase cycles.
Block to Swap Threshold: Is the threshold that is used to determine if the hot-cold
swapping between the hot live block and youngest live block need to be performed.
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Block to Update Threshold: Is the threshold that is used to determine if the hot-cold
swapping between the hot live block and update block need to be performed.
Group to Swap Threshold: Is the threshold that is used to determine if the swapping
between the hot live group and youngest live group need to be performed.
Group to Update Threshold: Is the threshold that is used to determine if the swapping
between the hot live group and update group need to be performed.
3.2 Determining Thresholds
In the proposed algorithms, the threshold values that are the Block to Update threshold,
Block to Swap threshold, Group to Update threshold and the Group to swap threshold
controls the degree of wear leveling. This is because the decision whether the hot-cold
swapping should be performed or not depends on these threshold.
As the Block to Update threshold increases, the algorithm performs less swapping
operations and the standard deviation of erase cycles will increase. In contrast, a smaller
Block to Update threshold value results in more swapping operations, lowering the
standard deviation.
Although a smaller Block to Update threshold tends to uniformly distribute erase cycles
across the whole flash memory blocks, it is not always a good choice because a too small
threshold value will cause a lot of swapping operations. In this case, the average erase
cycle grows fast and the wear-leveling overhead becomes significant.
The Block to Swap threshold controls the degree of swapping of the live blocks with the
youngest live blocks this happens when the update block has reached the Block to Swap
threshold which is determined by taking a modules of the erase cycles of the update block
with the Block to Swap threshold, a lower threshold value means that the update blocks
reaches the threshold quite often and hence this leads to a frequent swap of the live
blocks with the youngest live blocks. Which leads to a more uniform wear-leveling but it
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
25Manipal Centre for Information Science
also increases the frequency of unnecessary swapping of data and hence leads to high
erase cycles of the blocks.
Similarly the Group to Update threshold controls the swapping of the live group that has
reached the threshold with the update group and the Group to Swap threshold controls the
frequency of the blocks in the live group being swapped with blocks in the youngest live
group, low value of both the threshold means frequent swapping, uniform wear-leveling
but increased overhead such as increase in average erase cycle and time taken to
complete the updated operation.
3.3 Information Tables Needed
Average Group Erase cycle Table: This information table is used to store the average
erase cycles on a per group basis, it is a one dimensional table and the size of this table is
equal to the number of groups the flash is divided into.
Block Offset Table: This is a two dimensional information table and is used to map a
Logical Block Address to a Physical Block Address. The size of this table is determined
by two things, the number of Group the flash is divided into and the number of Live
Block per Group.
Block Erases Table: The erase cycles for each block are noted in this information table, it
is a two dimensional table whose size is determined by the number of Group the flash is
divided into and the number of Block per Group.
Update Block Table: The next good update block in the group is noted in this information
table, the specified block is swapped with the live block when the live block has reached
the Block to Updated threshold. This is a one dimensional table where the size of the
structure is determined by the number of groups the flash is divided into.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
26Manipal Centre for Information Science
Bad Group Table: This information table is used to mark the group either as a good group
or a bad group. The size of this one dimensional table is equal to the number of groups
the flash is divided into.
Bad Block Table: This information table is used to mark the individual blocks in the
group either as good or bad. This is a two dimensional table whose size is determined by
the number of Group the flash is divided into and the number of Blocks per Group.
Group Offset Table: The data stored in this information table is used to swap a live group
with an update group, it helps in the mapping of a update group to a live group. The size
of this one dimensional information table is equal to the number of groups the flash is
divided into.
Update Or Live Group Table: This table is used to determine whether a group is a live
group or an update group. This is a one dimensional information table whose size is equal
to the number of groups the flash is divided into.
3.4 Creating an Initial Bad-Block Table
Creating an initial bad-block table is a relatively simple process. Unfortunately, the
process is often skipped altogether or carried out incorrectly.
After an initial bad-block table is created, new bad-block information must be appended
as other blocks in the array wear out. The host device should reserve a marking location
within each NAND Flash block and mark it if the block becomes bad. If the list of bad
blocks becomes corrupted, it can be re-created by reading all the marked bad blocks
directly from the blocks in the NAND Flash array.
Different NAND Flash manufacturers mark bad blocks in different ways, and the bad
block marking approach may even vary among different devices from the same NAND
Flash manufacturer. This makes it essential that the algorithm used to read bad block
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
27Manipal Centre for Information Science
information must be able to read bad block information correctly from any NAND Flash
device that may be used.
Figure 10: Flowchart for Creating an Initial Bad-Block Table
3.5 Procedural Description of Algorithm
Group-Based Wear-leveling Algorithm with Basic Hot-Cold Block Swapping is a
combination of the Basic Hot-Cold Block swapping algorithm and the Group-Based
algorithm. These algorithms are implemented combined to gain the advantages of each
one, here we first covert the logical address that is given to be erased to the physical
address, the address is divided into a group address and a offset within the group, the
offset gives the block within the group.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
28Manipal Centre for Information Science
The group which contains the block to be erased is compared with the allowed number of
bad blocks in the group, if the number of bad blocks in the group exceed the maximum
number of allowed bad blocks then the group is tagged as a bad group. A bad group is
swapped with a good update group thus mapping the bad group out of the active region,
swapping between the groups is performed by swapping the file translation layer entries
of the group involved in the swap, every time the group are swapped the erase cycle of
the blocks in the group and the average erase cycle of the group involved in the swap are
updated.
Figure 11: Flowchart for Group-Based Wear-leveling Algorithm with
Basic Hot-Cold Block Swapping
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
29Manipal Centre for Information Science
If the group turns out to be a good group that has number of bad blocks less than the
maximum allowed number, then the group is examined to see if the group has reached the
Group to Update threshold, the update group is fetched if the group has reached the
threshold, also the update group is compared to the Group to Swap threshold, if the
Update group had reached the Group to Swap threshold then the youngest live group is
searched and fetched, this group has the least average erase cycle and hence it is the
youngest. Then the youngest live group is swapped with the hot live group, swapping is
achieved by swapping the file translation layer entries. If the update group has not
reached the Group to Swap threshold then the update group is swapped with the live
group.
Suppose that the group had not reached the Group to Update threshold then assess the
block in the group which need to be erased to see if it is bad, if it is bad and not included
in the bad block table then mark the block as bad and increment the bad block count for
that group, at this point a good update block is fetched and swapped with the bad block.
If the block is a good block then check if the block has reached the Block to Update
threshold, if the threshold is reached then fetch a good update block from the group.
Compare the update blocks erase cycle with the Block to Swap threshold. If the result of
the comparison is affirmative, the youngest live block in that group is found and is
swapped with the hot live block. If Block to Swap threshold has not reached then the
update block is moved in place of the hot live block.
If the block has not reached the Block to Update threshold then just proceed with the
erase of the block.
Swapping the File Translation Layer Entries
The swapping of the file translation layer entries is done when ever groups need to be
swapped. So swapping of the group is achieved by swapping the translation table entries
which holds the data pertaining to each group.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
30Manipal Centre for Information Science
Firstly the group addresses of the group and the block addresses of the blocks in the
group engaged in the swap needs to be swapped, since each group has its own average
erase cycle count these values are also to be swapped, every group has a pointer pointing
to the next good updated block, the contain of these pointers are swapped so that they
always point to a valid update block in the group. As already mentioned that the bad
block count of a group is used to decide the fate of the group, these entries also need to be
swapped so that a group always has the correct bad block count.
Good Update Block Search
The search for valid update block is not that straight forward since the blocks are
swapped in and out of the active region and also because there is a possibility that the
update region may contain a considerable number of bad blocks.
The procedure used to search and fetch a Good Update block is as follows. We increment
the pointer to point to the next block after the current update block in the group, if the
current update block is the last block in the group we wrap around and thus the pointer is
made to point to the fist block in the group. Since there is a high possibility for a pointer
to point to a block that is a live block we need to check the entire live block region in the
group to make sure that the block to which the pointer is pointing is really an update
block and is out of the active region. Also the block is examined to make sure that its a
good block and not a bad block, if the block is a bad block or a live block we make the
pointer point to the next block in the group and repeat the entire procedure given above
once more.
Youngest Live Block and Youngest Live Group Search
The youngest live block is fetched when the update block erase cycle reaches the Block
to Swap threshold, the youngest live block is located in a straight forward method by
fetching the erase cycle of each live block and comparing it with the least one obtain till
that point, every time the least erase cycle is obtain the address of the block is noted
down, when the erase count of all the live blocks is fetched we have the youngest block
in that group identified.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
31Manipal Centre for Information Science
Youngest Live Group search is achieved in the same way the only difference is that the
average erase cycle for each live group is fetched and compared to identify the youngest
live group.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
32Manipal Centre for Information Science
4. Results of Simulation
The correctness and effectiveness of the Group-Based Wear-leveling Algorithm with
Basic Hot-Cold Block Swapping was tested with the parameters and thresholds set to
different sets of values. The results of the simulation with the parameters and thresholds
set to the value given below are shown in the form of graphs.
Number of Blocks = 16384
Blocks per Group = 32
Live to Update Block Ratio = 50
Number of Blocks
Number of Groups = ------------------------ = 512
Blocks per Group
Live to Update Block Ratio * Blocks per Group
Number of Live Blocks = ---------------------------------------------------------- = 16
100
100 – Live to Update Block Ratio
Number of Update Blocks = ----------------------------------------- * Blocks per Group = 16
100
Number of Update Groups = 12
Maximum Erase Cycle = 8500
Bad Group Count = 8
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
33Manipal Centre for Information Science
Block to Update Threshold = 8
Block to Swap Threshold = 16
Group to Update Threshold = 16
Group to Swap Threshold = 32
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
34Manipal Centre for Information Science
4.1 Tests results for best case (uniform Logical write to all Blocks)
Graph showing Erases generated by Operating System
Figure 12: Graph of Logical Erase vs. Logical Block Number for a best case test
This graph shows the Logical Erases vs. Logical Block Address, the Logical erase
addresses are given as an input to the wear-leveling algorithm, these addresses where
generated such that each block would wear out uniformly above the maximum erase limit
of 8500 erases and would generate a erase for only half the total addressable space.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
35Manipal Centre for Information Science
Graph showing the Physical Wear status of the Flash
Figure 13: Graph of Physical Erase vs. Physical Block Number for a best case test
This graph show the Physical Erases vs. Physical Block Address, this is the output of the
wear-leveling algorithm, from the graph we can infer that each block was erased almost
uniformly throughout the whole addressable space and within the maximum erase limit of
8500.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
36Manipal Centre for Information Science
4.2 Tests results for worst case (ramp Logical write to all Blocks)
Graph showing Erases generated by Operating System
Figure 14: Graph of Logical Erase vs. Logical Block Number for a worst case test
This graph shows the Logical Erases vs. Logical Block Address, the Logical erase
addresses are given as an input to the wear-leveling algorithm, these addresses where
generated such that each block would wear out in an increasing order from 0 to above the
maximum erase limit of 8500 erases and would generate a erase for only half the total
addressable space.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
37Manipal Centre for Information Science
Graph showing the Physical wear status of the Flash
Figure 15: Graph of Physical Erase vs. Physical Block Number for a worst case test
This graph show the Physical Erases vs. Physical Block Address, this is the output of the
wear-leveling algorithm, from the graph we can infer that each block was erased almost
uniformly throughout the whole addressable space and within the maximum erase limit of
8500.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
38Manipal Centre for Information Science
4.3 Tests results for practical case (random Logical write to all Blocks)
Graph showing Erases generated by Operating System
Figure 16: Graph of Logical Erase vs. Logical Block Number for a practical case
This graph shows the Logical Erases vs. Logical Block Address, the Logical erase
addresses are given as an input to the wear-leveling algorithm, these addresses where
generated such that each block would wear out in an random order from 0 to above the
maximum erase limit of 8500 erases and would generate a erase for only half the total
addressable space.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
39Manipal Centre for Information Science
Graph showing the Physical wear status of the Flash
Figure 17: Graph of Physical Erase vs. Physical Block Number for a practical case
This graph show the Physical Erases vs. Physical Block Address, this is the output of the
wear-leveling algorithm, from the graph we can infer that each block was erased almost
uniformly throughout the whole addressable space and within the maximum erase limit of
8500.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
40Manipal Centre for Information Science
5. Conclusion and Scope for future work
5.1 Conclusion
Wear leveling helps in extend the useful life of NAND Flash devices and is necessary to
ensure that the devices reach the specified endurance rating by equalizing the wear of
good blocks. The use of wear-leveling techniques is imperative in NAND Flash devices,
regardless of the individual device’s endurance rating.
The most effective wear-leveling method is static wear leveling because it typically
provides more uniform block usage than dynamic wear leveling. Although dynamic wear
leveling is typically inferior to static wear leveling, this method is easier to implement and
can still provide enough wear leveling to meet the needs of many applications.
The Implementation and Simulation of the Group-Based Wear-leveling Algorithm with
Basic Hot-Cold Block Swapping proved the correctness and effectiveness of the
proposed methods.
5.2 Scope for future work
The algorithms can be implemented to evaluate the cost involved in Wear-leveling of
flash memory, it can be done from two perspectives
Time taken to wear the blocks uniformly.
The memory need to implement the algorithm.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
41Manipal Centre for Information Science
6. GNU Tools Used
6.1 GNU Octave
GNU Octave is a high-level language, primarily intended for numerical computations. It
provides a convenient command line interface for solving linear and nonlinear problems
numerically, and for performing other numerical experiments using a language that is
mostly compatible with Matlab. It may also be used as a batch-oriented language.
Octave has extensive tools for solving common numerical linear algebra problems,
finding the roots of nonlinear equations, integrating ordinary functions, manipulating
polynomials, and integrating ordinary differential and differential-algebraic equations. It
is also used to plot and study graphs. It is easily extensible and customizable via user-
defined functions written in Octave's own language, or using dynamically loaded
modules written in C++, C, Fortran, or other languages.
GNU Octave is a freely redistributable software. So anyone may redistribute it and/or
modify it under the terms of the GNU General Public License (GPL) as published by the
Free Software Foundation.
The inbuilt functions that were extensively used in plotting the results of the implemented
Wear-leveling algorithms were abs(), stem(), xlabel(), ylabel() and title().
6.2 GDB
The GNU Debugger, usually called just GDB, is the standard debugger for the GNU
software system. It is a portable debugger that runs on many Unix like systems and works
for many programming languages, including Ada, C, C++, FreeBASIC and Pascal.
GDB allows you to see what is going on inside another program while it executes or what
another program was doing at the moment it crashed.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
42Manipal Centre for Information Science
GDB can do four main kinds of things (plus other things in support of these) to help you
catch bugs in the act:
1) Start your program, specifying anything that might affect its behavior.
2) Make your program stop on specified conditions.
3) Examine what has happened, when your program has stopped.
4) Change things in your program, so you can experiment with correcting the effects of
one bug and go on to learn about another.
Thus GDB offers extensive facilities for tracing and altering the execution of computer
programs. The user can monitor and modify the values of programs internal variables,
and even call functions independently of the program's normal behavior.
6.3 GCC
The GNU Compiler Collection (shortened to GCC) is a compiler system produced by the
GNU Project supporting various programming languages. GCC is a key component of the
GNU tool chain. As well as being the official compiler of the GNU system, GCC has
been adopted as the standard compiler by most other modern Unix like computer
operating systems. GCC has been ported to a wide variety of processor architectures, and
is widely deployed as a tool in commercial, proprietary and closed source software
development environments.
Originally named the GNU C Compiler, because it only handled the C programming
language, but soon the compiler was extended to compile C++, Front ends were later
developed for Fortran, Pascal, Objective-C, Java, and Ada, among others.
The Free Software Foundation (FSF) distributes GCC under the GNU General Public
License (GNU GPL) and the GNU Lesser General Public License (GNU LGPL).
GCC is often the compiler of choice for developing software that is required to execute
on a wide variety of hardware and/or operating systems. System-specific compilers
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
43Manipal Centre for Information Science
provided by hardware or OS vendors can differ substantially, complicating both the
software's source code and the scripts which invoke the compiler to build it. With GCC,
most of the compiler is the same on every platform, so only code which explicitly uses
platform-specific features must be rewritten for each system.
Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues
44Manipal Centre for Information Science
7. Bibliography
1. http://en.wikipedia.org/wiki/Flash_memory
2. http://en.wikipedia.org/wiki/Wear_levelling
3. http://www.corsair.com/_faq/FAQ_flash_drive_wear_leveling.pdf
4. http://www.eetasia.com/ART_8800575064_499486_AN_ae5c2c44.HTM
5. http://www.spansion.com/application_notes/Wear_Leveling_AN_01.pdf
6. http://www.byteandswitch.com/storage/how-long-does-nand-flash-memory-last.php
7. http://www.eetindia.co.in/ARTICLES/2004NOV/A/2004NOV29_MEM_AN06.PDF
8. TN-29-42: Wear-Leveling Techniques in NAND Flash Devices
9. NAND Flash 101 - An Introduction to NAND Flash and How to Design It In to Your
Next Product
10. A group-based wear-leveling algorithm for large-capacity flash memory storage sys-
tems by Dawoon, Chae, Heeseung, Jin-Soo and Joonwon (KAIST)

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MSc_project_report

  • 1. PROTOTYPING AND SIMULATION OF WEAR LEVELING AND BAD BLOCK MANAGEMENT ALGORITHMS USING C Thesis submitted in partial fulfillment of the Requirements for the degree of MASTER OF SCIENCE (M. Sc.) in DIGITAL DESIGN AND EMBEDDED SYSTEMS by Walter Jesuslee Savio Rodrigues Under the guidance of Mr. Nagaraja Katil Prof. Harishchandra Hebbar Director of Engineering Director Manipal Dot Net Pvt. Ltd. MCIS Manipal Manipal University, Manipal MANIPAL CENTRE FOR INFORMATION SCIENCE (A Constituent College of Manipal University, Manipal)
  • 2. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 1Manipal Centre for Information Science ABSTRACT Although NAND flash memory has become one of the most popular storage media for portable devices, it has a serious problem with respect to lifetime. Each block of NAND flash memory has a limited number of program/erase cycles, usually 10,000–100,000, and data in a block become unreliable after the limit. The need for wear leveling results from the finite Program/Erase cycling capability of NAND Flash memory cells. The repeated use of a limited number of blocks can cause the device to prematurely wear out or exceed its program/erase endurance. The wear-leveling process spreads NAND Flash memory cell use over the available memory array, ideally equalizing the use of all memory cells and helping to extend device life. Many wear-leveling algorithms have been proposed from academia and industry. We here examine the correctness and effectiveness of the Basic Hot-Cold Swapping Algorithm and the Group-Based Algorithm using a C based implementation.
  • 3. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 2Manipal Centre for Information Science 1. NAND Flash Memory 1.1 Introduction NAND Flash memory is a non-volatile computer memory that can be electrically erased and reprogrammed. It is a technology that is primarily used in memory cards and USB Flash drives for general storage and transfer of data between computers and other digital products. It is a specific type of EEPROM (Electrically Erasable Programmable Read- Only Memory) that is erased and programmed in large blocks. NAND Flash memory costs far less than byte-programmable EEPROM and therefore has become the dominant technology wherever a significant amount of non-volatile, solid state storage is needed. Example applications include PDAs (personal digital assistants), laptop computers, digital audio players, digital cameras and mobile phones. Since NAND Flash memory is non-volatile, no power is needed to maintain the information stored in the chip. In addition, NAND Flash memory offers fast read access times (although not as fast as volatile DRAM memory used for main memory in PCs) and better kinetic shock resistance than hard disks. These characteristics explain the popularity of NAND Flash memory in portable devices. Another feature of NAND Flash memory is that when packaged in a "memory card," it is enormously durable, being able to withstand intense pressure, extremes of temperature, and even immersion in water. While technically a type of EEPROM, the term "EEPROM" is generally used to refer specifically to non-NAND Flash EEPROM which is erasable in small blocks, typically bytes. Because erase cycles are slow, the large block sizes used in NAND Flash memory erasing give it a significant speed advantage over old-style EEPROM when writing large amounts of data.
  • 4. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 3Manipal Centre for Information Science 1.2 Flash Basics The NAND Flash array is grouped into a series of blocks, which are the smallest erasable entities in a NAND Flash device. A NAND Flash block is normally 128KB. Erasing a block sets all bits to “1” (and all bytes to FFh). Programming is necessary to change erased bits from “1” to “0.” The smallest entity that can be programmed is a byte. Some NOR Flash memory can perform READ-While-WRITE operations. Although NAND FLASH cannot perform READs and WRITEs simultaneously, it is possible to accomplish READ/WRITE operations at the system level using a method called shadowing. Shadowing has been used on personal computers for many years to load the BIOS from the slower ROM into the higher-speed RAM. There is a limit to the number of times NAND Flash blocks can reliably be programmed and erased. Nominally, each NAND block will survive 100,000 PROGRAM/ERASE cycles. A technique known as wear leveling ensures that all physical blocks are exercised uniformly. To maximize the lifespan of a design, it is critical to implement both wear leveling and bad-block management. Figure 1: NAND flash memory structure
  • 5. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 4Manipal Centre for Information Science NAND efficiencies are due in part to the small number of metal contacts in the NAND Flash string. NAND Flash cell size is much smaller than NOR Flash cell size because NOR Flash cells require a separate metal contact for each cell. NAND Flash is very similar to a hard-disk drive. It is sector-based (page-based) and well suited for storage of sequential data such as pictures, video, audio, or PC data. Although random access can be accomplished at the system level by shadowing the data to RAM, doing so requires additional RAM storage. Also, like a hard-disk drive, a NAND Flash device may have bad blocks and requires error-correction code (ECC) to maintain data integrity. NAND Flash cells are 60 percent smaller than NOR Flash cells, providing the higher densities required for today’s low-cost consumer devices in a significantly reduced die area. 1.3 NAND Flash Lifetime Metrics Flash memory lifetimes are described in two primary metrics: Data retention Endurance cycles Data retention is often listed at 20 years at a given operating temperature. Increased temperature ranges reduce the data retention period which further decrease as the flash memory is used at or near its specified operating temperatures. It is important to note that data retention is measured from the time data is successfully programmed. The second metric, endurance cycles, is a measure of the number of write and erase cycles that the flash memory can endure before becoming unreliable. Flash memories are organized into a number of erase blocks or sectors and each must be erased prior to writing data. A typical erase block is 128KB in size, however may range from 512B to 2,048KB or even more. Any given address within an erase block cannot be rewritten without an intervening erase. Erase cycles are cumulative and affect only those erase
  • 6. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 5Manipal Centre for Information Science blocks being cycled. In other words, an error in any erase block is constrained to the data of that block. Erase cycles range around 10K for MLC and 100K for SLC. So, it is the application the flash is placed into that will primarily define the product lifetime. 1.4 NAND Flash Memory Array Management With use, memory cells that make up blocks of the NAND Flash memory array can wear out. This is true of all Flash technology. Robust systems take block failure into account and make appropriate adjustments. 1.4.1 Bad-Block Identification Most NAND Flash devices, like all types of mass storage memory, contain some initial bad blocks within the memory array. These blocks are typically marked as bad by the manufacturer, indicating that they should not be used in any system. NAND Flash device data sheets provide the location of bad-block markings. Factory testing is performed under worst-case conditions, and those blocks that fail this testing are marked bad. If a factory-marked bad block is used in a system it may appear to operate normally, but may cause other, good blocks to fail, or create additional unforeseen system errors. If a customer erases a factory-marked bad block, the marking is also erased. To avoid losing this information, it is best to do an initial read for bad blocks and create a bad block table before issuing any PROGRAM or ERASE commands. After the original bad-block table is created, it must be maintained and updated as additional blocks go bad with use. 1.4.2 Block Degradation and Tracking Because good blocks in a NAND Flash device can degrade and wear out, it is important to track not only the initial, factory-marked bad blocks but also the blocks that go bad during normal device operation. To detect whether a block has worn out and is now bad, issue a READ STATUS command after any ERASE or PROGRAM operation. This
  • 7. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 6Manipal Centre for Information Science command will report whether the previous operation passed or failed. READ STATUS will only report a failure for a PROGRAM operation if at least one bit in the page programmed did not change from a “1” to a “0” state. READ STATUS will only report a failure for an ERASE operation if at least one bit in the block erased did not change from a “0” to a “1” state. 1.4.3 Types of Failure When failures occur during NAND Flash device operation, they are categorized as either permanent or temporary failures. A permanent failure is one from which the NAND Flash device cannot recover. Temporary failures can be corrected or avoided. a. Permanent Failures Permanent failures usually appear to the user as one or more bits in a NAND Flash page that are stuck in the “0” or “1” state and cannot be altered by PROGRAM or ERASE operations. When a permanent failure occurs, it is necessary to add the block to the bad block table and avoid using it in the future. b. Temporary Failures Temporary failures can be minimized with proper NAND Flash design practices. If these failures do occur, it is possible to recover the failing location of the memory array, the block need not be added to the bad-block table. Temporary failures occur in multiple forms: 1. Program Disturb: A program disturb error occurs when one or more bits not intended to be programmed are changed from “1” to “0” during a PROGRAM operation. An increased number of partial-page programs to a page can exacerbate this error. Program disturb errors can show up on pages being programmed or on other pages within the same block. To recover from this type of error, erase the block where the error occurred and reprogram the data to that block. 2. Read Disturb: A read disturb error occurs when one or more bits are changed from “1” to “0” during a READ operation. Read disturb errors occur within the block being read, but on a page or pages other than the page being read.
  • 8. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 7Manipal Centre for Information Science Performing a high number (hundreds of thousands or millions) of READ operations on individual pages before an ERASE command for the block containing those pages can exacerbate this error. To recover from this type of error, erase the block where the error occurred and reprogram the data to that block 3. Over-programming: Over-programming can occur when a memory-cell threshold gate voltage on a bitline within a block goes too high. This prevents the memory cells from being read, and a “0” is read at the targeted bit location for every other page in the block. To recover from this type of error, erase the block where the error occurred and reprogram the data to that block. 4. Data Loss: During extended storage periods, some memory cells can lose data by changing from “1” to “0” via charge gain or from “0” to “1” via charge loss. High ERASE/PROGRAM cycle counts can exacerbate data loss by inducing trapped charge in the gate oxide of the memory cells, effectively wearing out the gate oxide. To recover from this type of error, erase the block where the error occurred and reprogram the lost data. 1.4.4 NAND Flash Controllers Using the low-level commands (READ/PROGRAM/ERASE) to read and program data to NAND Flash devices is only one aspect of NAND Flash operation within a system. NAND Flash controllers can be implemented in a system to enhance NAND Flash performance. Controllers typically provide wear leveling, error correction code (ECC), and bad-block management. A controller can be implemented in software, hardware, or a combination of the two. Generally, the controller resides between the host and the NAND Flash device and controls access to the device. 1.4.5 Wear Leveling Because NAND Flash memory cells can eventually wear out, a robust NAND Flash implementation should include a wear-leveling strategy. Wear leveling is used to translate a logical memory address to different physical memory addresses each time a
  • 9. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 8Manipal Centre for Information Science file is programmed. This operation is monitored and implemented by the controller connected to the NAND Flash device. Wear leveling spreads NAND Flash memory-cell use over the entire range of the memory array, equalizing use of all the memory cells, and helping extend the life of the device. 1.4.6 Error Correction Code (ECC) Requirement Bit errors can occur during NAND Flash device operation or during long periods of inactivity, making ECC use mandatory. ECC is generally characterized in terms of the number of bits the code can correct per data sector checked. For example, if a controller has 1-bit ECC, it is able to correct one 1-bit error in each data sector.
  • 10. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 9Manipal Centre for Information Science 2. Wear-Leveling in NAND Flash 2.1 Introduction Although NAND flash memory has become one of the most popular storage media for portable devices, it has a serious problem with respect to lifetime. Each block of NAND flash memory has a limited number of program/erase cycles, usually 10,000 in case of MLC and 100,000 in case of SLC, The data in a block become unreliable after the limit. For this reason, distributing erase operations evenly across the whole flash memory media is an important concern in designing flash memory storage systems. Many wear-leveling algorithms have been proposed from academia and industry. The design issues that need to be addressed by the designer include 1) how to evenly wear all blocks and 2) how to reduce traffic introduced by wear leveling. Among many prior works, one misconception is to prevent some particular blocks from being poorly worn. However, as in realistic workloads a majority of data are cold, to start wearing such blocks may require a lot of data movements, and in turn the data movements unnecessarily wear NAND flash memory. On the other hand, as high-capacity NAND flash memory is becoming affordable, many previously proposed algorithms start scaling poorly. Either large RAM space or considerable CPU time is required. 2.2 The Importance of Wear Leveling The need for wear leveling results from the finite Program/Erase cycling capability of NAND Flash memory cells. The repeated use of a limited number of blocks can cause the device to prematurely wear out or exceed its program/erase endurance. The wear-leveling process spreads NAND Flash memory cell use over the available memory array, ideally equalizing the use of all memory cells and helping to extend device life. Consider a case without wear leveling. In a NAND Flash device with 4,096 total blocks and 2.5% allowable bad blocks in a system that updates 3 files comprised of 50 blocks
  • 11. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 10Manipal Centre for Information Science each at a rate of 1 file every 10 minutes (or 6 files per hour), where a NAND host reuses the same 200 physical blocks for these updates, the NAND Flash device will wear out in under 1 year, leaving over 95% of the memory array unused. 10,000 cycles x 200 blocks Only 200 blocks are reused: ------------------------------------------------------------------ 50 blocks per file x 6 files per hour x 24 hours per day = ~278 days or <1 year In contrast, in a situation where all blocks are used equally by programming and erasing 4,096 of them at a rate of 50 blocks every 10 minutes (or 6 files per hour), even distribution of wear across all blocks dramatically increases the useful life of the device. 10,000 cycles x 4,096 blocks 4,096 blocks are evenly used: ---------------------------------------------------------------- 50 blocks per file x 6 files per hour x 24 hours per day = ~5,689 days or >15 years Wear leveling not only extends the life of a Flash device, it also enables the memory capacity to be used more efficiently. Reusing only 200 blocks results in programming and erasing about 2 million effective blocks over the life of the device, while evenly using all 4,096 blocks results in programming and erasing more than 40 million effective blocks. 2.3 Wear-Leveling Methods Wear leveling can be implemented using several methods, each of which adds complexity, but increases the life of NAND Flash devices. A lack of wear leveling can dramatically reduce the useful life of the NAND Flash device.
  • 12. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 11Manipal Centre for Information Science Two types of data exist in NAND Flash devices: static and dynamic. Static data (Cold data) is information that is rarely, if ever, updated. It may be read frequently, but it seldom changes and can theoretically reside in the same physical location for the life of the device. Dynamic data (Hot data), on the other hand, is constantly changing and consequently requires frequent reprogramming. 2.3.1 Implementing Dynamic Wear Leveling Dynamic wear leveling is a method of pooling the available blocks that are free of data and selecting the block with the lowest erase count for the next write. This method is most efficient for dynamic data because only the non-static portion of the NAND Flash array is wear-leveled. A system that implements dynamic wear leveling enables longer NAND Flash device life than a system that does not implement wear leveling. For instance, in a device with a 25% / 75% split of dynamic data versus static data, respectively, dynamic wear leveling targets the 25% of the blocks of dynamic memory area, while the other 75% of the blocks remain idle with static data. In this case, 25% of the available blocks are used to their maximum cycle count. Figure 2: NAND Flash Data Distribution
  • 13. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 12Manipal Centre for Information Science In a 4,096-block MLC device with a 10,000-cycle count, 75% static data, and a program and erase rate of 50 blocks every 10 minutes (or 6 files per hour), dynamic wear leveling results in device wear-out after approximately 4 years, with 75% of the blocks nearly unused as seen in the above figure. 10,000 cycles x 1,024 blocks Wear leveling only dynamic data: ----------------------------------------------------------------- 50 blocks per file x 6 files per hour x 24 hours per day = ~1,422 days or <4 years 2.3.2 Implementing Static Wear Leveling Static wear leveling utilizes all good blocks to evenly distribute wear, providing effective wear leveling and thereby extending the life of the device. This method tracks the erase cycle count of all good blocks and attempts to evenly distribute block wear throughout the entire device by selecting the available block with the least wear each time a program operation is executed. Static data is managed by maintaining all blocks within a certain erase count threshold. Blocks that contain static data with erase counts that begin to lag behind other blocks will be included in the wear-leveling block pool, with the static data being moved to blocks with higher erase counts. Although the additional step of moving static data to free up space in low erase count blocks can slow write performance (because it requires additional controller overhead) and can consume some block life, overall, static wear leveling is the best method for maximizing the life of a NAND device. Using the same example of a 4,096-block MLC device with a 10,000-cycle count, 75% static data, and a program and erase rate of 50 blocks every 10 minutes (or 6 files per hour), static wear leveling provides the best chance of extending the device life span beyond 15 years.
  • 14. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 13Manipal Centre for Information Science 10,000 cycles x 4,096 blocks Wear leveling static & dynamic data: -------------------------------------------------------- 50 blocks per file x 6 files per hour x 24 hours per day = ~5,689 days or >15 years The drastic difference in block utilization between dynamic and static wear leveling is illustrated in the figure below. Figure 3: Static vs. Dynamic Block Utilization
  • 15. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 14Manipal Centre for Information Science 2.4 Choosing Wear-Leveling Methods Choosing a wear-leveling method involves evaluating the advantages and disadvantages of each method. Figure 4: Static vs. Dynamic Wear-Leveling Methods 2.5 Wear-Leveling Considerations in Die Memory Arrays 2.5.1 Impact of Zoning Some controllers use a zoning approach, in which wear leveling is segmented into subsets of the total die memory array. Because wear leveling is contained within each zone, if one zone wears out sooner than the remaining zones, the entire die prematurely wears out before all blocks reach their maximum cycling count. Even when static wear leveling is used, this approach can result in a shorter device life span.
  • 16. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 15Manipal Centre for Information Science Figure 5: Data Distribution Using Multiple Zones If dynamic wear leveling is applied in a die where zone 1 contains 25% dynamic data and 75% static data, only 25% of the blocks in this zone will be used for wear leveling. Zone 1 will likely become worn out sooner than the remaining 3 zones, causing the die to wear out before all blocks reach their maximum cycle count. Even though static wear leveling helps ensure equal block use within each zone if the controller treats each zone separately, different zones might receive different levels of use. As such, one zone is likely to wear out before another, which would cause the die to wear out prematurely. The most effective approach is to encompass all good blocks in the memory array into a single zone to help ensure equal wear leveling.
  • 17. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 16Manipal Centre for Information Science Figure 6: Data Distribution Using a Single Zone 2.5.2 Wear Leveling Across Multiple Die In devices with multiple die, wear leveling should be applied across all die to ensure equal use of blocks and avoid premature wear-out. The best implementation of wear leveling in devices with multiple die is to consider the wear-leveling pool to be all the good blocks within the device. This helps ensure that a single die does not wear out before the remaining die, which enables the device to reach maximum operating life. For example, in a solid state drive application with many NAND devices, if wear leveling is not completed across all devices, it is highly likely that some devices may experience greater wear and wear out more quickly. These prematurely worn blocks can cause the solid state drive to operate as read-only before all blocks and/or devices are fully used. The proper implementation of wear leveling can ensure that solid state drives continue to function to the full extent of their maximum available useful life.
  • 18. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 17Manipal Centre for Information Science 2.6 Basic Hot-Cold Swapping Algorithm Uneven wearing of flash-memory blocks is mainly due to spatial localities in work load. Usually cold data statically reside in blocks, while hot data quickly leave many pages of invalidated data in blocks. Since to write hot data occurs more frequently than to write cold data does, hot data could be circulated in some particular blocks. Block-mapped Flash Translation Layer is widely used for large-capacity flash storage because they require relatively smaller memory size than page-mapped Flash Translation Layer. In a block-mapped Flash Translation Layer, LBAs (Logical Block Addresses) are translated into physical addresses in flash memory. Each LBA is divided into a logical block number and an offset. The logical block number is mapped onto a physical flash block (data block) with the assistance of address translation table, and the offset is used to find the page inside the block which contains the designated data. Figure 7: Conversion of LBA to PBA The hot-cold swapping algorithm which is a static wear-leveling algorithm tries to balance erase cycles by periodically swapping hot data in old blocks with cold data in young blocks. We define data blocks with relatively low erase cycles as young blocks, while data blocks with relatively high erase cycles as old blocks. The data in a data block that are not updated for a long time, we regard them as cold data. Every time when data needs to be updated the erase count of the live hot block is compared with a certain
  • 19. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 18Manipal Centre for Information Science threshold called Block to Update Threshold, If the block has reach the threshold then the incoming data is assigned to an update block. Thus an update block (sometimes called replacement block or log block) get the new data. So, the update blocks are likely to be re-written and erased soon due to temporal and spatial locality in storage access patterns. Therefore, the data in update blocks are classified into hot data. Figure 8: Flowchart for the Basic Hot-Cold Swapping Algorithm
  • 20. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 19Manipal Centre for Information Science In the proposed scheme, the swapping condition is also examined whenever a new update block is allocated to a data block. As we described above, an update block will be erased soon and the erase cycle of the block will grow faster than blocks containing cold data. Before an update block is allocated, the erase cycle of the update block is compared with the Block to Swap threshold. Swapping between the youngest live block and live hot block is performed when the erase cycles of update block has reached the Block to Swap threshold. Erase cycle of the live block is compared with a threshold, which is the maximum erase cycles that the flash block can undergo, this compare is done before every erase operation, if the block erase cycle has reached the threshold then the block is declared as permanently bad. The bad block is mapped out of the active region by swapping it with an update block.
  • 21. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 20Manipal Centre for Information Science 2.7 Group-Based Algorithm The main purpose of the group-based algorithm is to reduce memory requirement for storing wear information. The basic idea is to organize several blocks into a group and to keep only the summary information for each group in memory, instead of maintaining wear information for every block. In the proposed algorithm, a group consists of a fixed number of adjacent logical blocks, and a group summary represents its overall wear status. The group summary information is used to detect uneven wearing and to find victim groups for wear leveling. Suppose that a group summary shows that blocks in the particular group are much younger than other blocks. Then, the group is selected as a victim group for wear leveling, and the blocks in the group are swapped with the other blocks in an update group. Since the proposed algorithm relies on the group summary information, the effectiveness of wear leveling depends on the accuracy of the summary information. This is because, unlike other wear-leveling schemes that utilize per-block information, the group summary information only denotes the overall wear status of blocks that belong to the group. In order to minimize negative impact on wear leveling, the summary should be designed to represent the wear status of a group as closely as possible. One of the simplest approaches is to use the average erase cycle of a group as the group summary. This is straight forward and easy to implement; the average can be recalculated whenever a block is erased. However, the simple averaging scheme is not accurate enough to express the wear status of a group. To illustrate, suppose that several blocks in a group are swapped with old blocks. In this case, the average erase cycle of the group gets much higher than young blocks in the group, and those young blocks may not be eligible for swapping any more due to the increased average erase cycle of the group, the group may be marked bad. In this scheme whenever a data in a block need to be updated the average erase cycle of the group containing the block who contain needs to be updated is compared with a certain threshold called the Group to Update threshold, if the average erase cycle of the
  • 22. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 21Manipal Centre for Information Science group has reached the threshold then the update data is assigned to a update group. So the blocks in the update group are swapped with the blocks in the live group that has reached the threshold. But before the swap take place the average erase cycle of the assigned update group is compared with the Group to Swap threshold, if the update group has reached the threshold then a youngest live group is searched and selected, that is a live group with the lowest average erase cycle. So the blocks in youngest live group are swapped with the blocks of the hot live group that has reached the Block to Update threshold. Figure 9: Flowchart for the Group-Based Algorithm
  • 23. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 22Manipal Centre for Information Science When a certain number of blocks in a group have become bad we tag the entire group as a bad group, while the individual blocks are declared as bad based on the erase cycle. The bad groups are mapped out of the active region by swapping it with an update group.
  • 24. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 23Manipal Centre for Information Science 3. Implementation of the Group-Based Wear-leveling Algorithm with Basic Hot-Cold Block Swapping 3.1 Terminology Used LBA (Logical Block Address): The LBA is the address that the operating system uses while issuing a read, write or an erase to a block on the flash drive. PBA (Physical Block Address): The PBA is the fixed, physical address of a block on the flash drive. Hot data: Data in the data block that are updated regularly are regarded as Hot data. Cold data: Data in the data block that are not updated frequently are regarded as Cold data. Update Block: when data in the data block is to be update, a new block is assigned to the corresponding data block and the incoming data is written to this block which is called an Update Block. Live Block: Data block that is in the active region. Update Group: An Update Group is a group which consists of consecutively located update blocks. Young Blocks: Data blocks with relatively low erase cycles. Old Blocks: Data blocks with relatively high erase cycles. Youngest Live Block: Data block in the active region with the least erase cycles. Youngest Live Group: A group in the active region with the least average erase cycles. Block to Swap Threshold: Is the threshold that is used to determine if the hot-cold swapping between the hot live block and youngest live block need to be performed.
  • 25. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 24Manipal Centre for Information Science Block to Update Threshold: Is the threshold that is used to determine if the hot-cold swapping between the hot live block and update block need to be performed. Group to Swap Threshold: Is the threshold that is used to determine if the swapping between the hot live group and youngest live group need to be performed. Group to Update Threshold: Is the threshold that is used to determine if the swapping between the hot live group and update group need to be performed. 3.2 Determining Thresholds In the proposed algorithms, the threshold values that are the Block to Update threshold, Block to Swap threshold, Group to Update threshold and the Group to swap threshold controls the degree of wear leveling. This is because the decision whether the hot-cold swapping should be performed or not depends on these threshold. As the Block to Update threshold increases, the algorithm performs less swapping operations and the standard deviation of erase cycles will increase. In contrast, a smaller Block to Update threshold value results in more swapping operations, lowering the standard deviation. Although a smaller Block to Update threshold tends to uniformly distribute erase cycles across the whole flash memory blocks, it is not always a good choice because a too small threshold value will cause a lot of swapping operations. In this case, the average erase cycle grows fast and the wear-leveling overhead becomes significant. The Block to Swap threshold controls the degree of swapping of the live blocks with the youngest live blocks this happens when the update block has reached the Block to Swap threshold which is determined by taking a modules of the erase cycles of the update block with the Block to Swap threshold, a lower threshold value means that the update blocks reaches the threshold quite often and hence this leads to a frequent swap of the live blocks with the youngest live blocks. Which leads to a more uniform wear-leveling but it
  • 26. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 25Manipal Centre for Information Science also increases the frequency of unnecessary swapping of data and hence leads to high erase cycles of the blocks. Similarly the Group to Update threshold controls the swapping of the live group that has reached the threshold with the update group and the Group to Swap threshold controls the frequency of the blocks in the live group being swapped with blocks in the youngest live group, low value of both the threshold means frequent swapping, uniform wear-leveling but increased overhead such as increase in average erase cycle and time taken to complete the updated operation. 3.3 Information Tables Needed Average Group Erase cycle Table: This information table is used to store the average erase cycles on a per group basis, it is a one dimensional table and the size of this table is equal to the number of groups the flash is divided into. Block Offset Table: This is a two dimensional information table and is used to map a Logical Block Address to a Physical Block Address. The size of this table is determined by two things, the number of Group the flash is divided into and the number of Live Block per Group. Block Erases Table: The erase cycles for each block are noted in this information table, it is a two dimensional table whose size is determined by the number of Group the flash is divided into and the number of Block per Group. Update Block Table: The next good update block in the group is noted in this information table, the specified block is swapped with the live block when the live block has reached the Block to Updated threshold. This is a one dimensional table where the size of the structure is determined by the number of groups the flash is divided into.
  • 27. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 26Manipal Centre for Information Science Bad Group Table: This information table is used to mark the group either as a good group or a bad group. The size of this one dimensional table is equal to the number of groups the flash is divided into. Bad Block Table: This information table is used to mark the individual blocks in the group either as good or bad. This is a two dimensional table whose size is determined by the number of Group the flash is divided into and the number of Blocks per Group. Group Offset Table: The data stored in this information table is used to swap a live group with an update group, it helps in the mapping of a update group to a live group. The size of this one dimensional information table is equal to the number of groups the flash is divided into. Update Or Live Group Table: This table is used to determine whether a group is a live group or an update group. This is a one dimensional information table whose size is equal to the number of groups the flash is divided into. 3.4 Creating an Initial Bad-Block Table Creating an initial bad-block table is a relatively simple process. Unfortunately, the process is often skipped altogether or carried out incorrectly. After an initial bad-block table is created, new bad-block information must be appended as other blocks in the array wear out. The host device should reserve a marking location within each NAND Flash block and mark it if the block becomes bad. If the list of bad blocks becomes corrupted, it can be re-created by reading all the marked bad blocks directly from the blocks in the NAND Flash array. Different NAND Flash manufacturers mark bad blocks in different ways, and the bad block marking approach may even vary among different devices from the same NAND Flash manufacturer. This makes it essential that the algorithm used to read bad block
  • 28. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 27Manipal Centre for Information Science information must be able to read bad block information correctly from any NAND Flash device that may be used. Figure 10: Flowchart for Creating an Initial Bad-Block Table 3.5 Procedural Description of Algorithm Group-Based Wear-leveling Algorithm with Basic Hot-Cold Block Swapping is a combination of the Basic Hot-Cold Block swapping algorithm and the Group-Based algorithm. These algorithms are implemented combined to gain the advantages of each one, here we first covert the logical address that is given to be erased to the physical address, the address is divided into a group address and a offset within the group, the offset gives the block within the group.
  • 29. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 28Manipal Centre for Information Science The group which contains the block to be erased is compared with the allowed number of bad blocks in the group, if the number of bad blocks in the group exceed the maximum number of allowed bad blocks then the group is tagged as a bad group. A bad group is swapped with a good update group thus mapping the bad group out of the active region, swapping between the groups is performed by swapping the file translation layer entries of the group involved in the swap, every time the group are swapped the erase cycle of the blocks in the group and the average erase cycle of the group involved in the swap are updated. Figure 11: Flowchart for Group-Based Wear-leveling Algorithm with Basic Hot-Cold Block Swapping
  • 30. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 29Manipal Centre for Information Science If the group turns out to be a good group that has number of bad blocks less than the maximum allowed number, then the group is examined to see if the group has reached the Group to Update threshold, the update group is fetched if the group has reached the threshold, also the update group is compared to the Group to Swap threshold, if the Update group had reached the Group to Swap threshold then the youngest live group is searched and fetched, this group has the least average erase cycle and hence it is the youngest. Then the youngest live group is swapped with the hot live group, swapping is achieved by swapping the file translation layer entries. If the update group has not reached the Group to Swap threshold then the update group is swapped with the live group. Suppose that the group had not reached the Group to Update threshold then assess the block in the group which need to be erased to see if it is bad, if it is bad and not included in the bad block table then mark the block as bad and increment the bad block count for that group, at this point a good update block is fetched and swapped with the bad block. If the block is a good block then check if the block has reached the Block to Update threshold, if the threshold is reached then fetch a good update block from the group. Compare the update blocks erase cycle with the Block to Swap threshold. If the result of the comparison is affirmative, the youngest live block in that group is found and is swapped with the hot live block. If Block to Swap threshold has not reached then the update block is moved in place of the hot live block. If the block has not reached the Block to Update threshold then just proceed with the erase of the block. Swapping the File Translation Layer Entries The swapping of the file translation layer entries is done when ever groups need to be swapped. So swapping of the group is achieved by swapping the translation table entries which holds the data pertaining to each group.
  • 31. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 30Manipal Centre for Information Science Firstly the group addresses of the group and the block addresses of the blocks in the group engaged in the swap needs to be swapped, since each group has its own average erase cycle count these values are also to be swapped, every group has a pointer pointing to the next good updated block, the contain of these pointers are swapped so that they always point to a valid update block in the group. As already mentioned that the bad block count of a group is used to decide the fate of the group, these entries also need to be swapped so that a group always has the correct bad block count. Good Update Block Search The search for valid update block is not that straight forward since the blocks are swapped in and out of the active region and also because there is a possibility that the update region may contain a considerable number of bad blocks. The procedure used to search and fetch a Good Update block is as follows. We increment the pointer to point to the next block after the current update block in the group, if the current update block is the last block in the group we wrap around and thus the pointer is made to point to the fist block in the group. Since there is a high possibility for a pointer to point to a block that is a live block we need to check the entire live block region in the group to make sure that the block to which the pointer is pointing is really an update block and is out of the active region. Also the block is examined to make sure that its a good block and not a bad block, if the block is a bad block or a live block we make the pointer point to the next block in the group and repeat the entire procedure given above once more. Youngest Live Block and Youngest Live Group Search The youngest live block is fetched when the update block erase cycle reaches the Block to Swap threshold, the youngest live block is located in a straight forward method by fetching the erase cycle of each live block and comparing it with the least one obtain till that point, every time the least erase cycle is obtain the address of the block is noted down, when the erase count of all the live blocks is fetched we have the youngest block in that group identified.
  • 32. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 31Manipal Centre for Information Science Youngest Live Group search is achieved in the same way the only difference is that the average erase cycle for each live group is fetched and compared to identify the youngest live group.
  • 33. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 32Manipal Centre for Information Science 4. Results of Simulation The correctness and effectiveness of the Group-Based Wear-leveling Algorithm with Basic Hot-Cold Block Swapping was tested with the parameters and thresholds set to different sets of values. The results of the simulation with the parameters and thresholds set to the value given below are shown in the form of graphs. Number of Blocks = 16384 Blocks per Group = 32 Live to Update Block Ratio = 50 Number of Blocks Number of Groups = ------------------------ = 512 Blocks per Group Live to Update Block Ratio * Blocks per Group Number of Live Blocks = ---------------------------------------------------------- = 16 100 100 – Live to Update Block Ratio Number of Update Blocks = ----------------------------------------- * Blocks per Group = 16 100 Number of Update Groups = 12 Maximum Erase Cycle = 8500 Bad Group Count = 8
  • 34. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 33Manipal Centre for Information Science Block to Update Threshold = 8 Block to Swap Threshold = 16 Group to Update Threshold = 16 Group to Swap Threshold = 32
  • 35. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 34Manipal Centre for Information Science 4.1 Tests results for best case (uniform Logical write to all Blocks) Graph showing Erases generated by Operating System Figure 12: Graph of Logical Erase vs. Logical Block Number for a best case test This graph shows the Logical Erases vs. Logical Block Address, the Logical erase addresses are given as an input to the wear-leveling algorithm, these addresses where generated such that each block would wear out uniformly above the maximum erase limit of 8500 erases and would generate a erase for only half the total addressable space.
  • 36. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 35Manipal Centre for Information Science Graph showing the Physical Wear status of the Flash Figure 13: Graph of Physical Erase vs. Physical Block Number for a best case test This graph show the Physical Erases vs. Physical Block Address, this is the output of the wear-leveling algorithm, from the graph we can infer that each block was erased almost uniformly throughout the whole addressable space and within the maximum erase limit of 8500.
  • 37. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 36Manipal Centre for Information Science 4.2 Tests results for worst case (ramp Logical write to all Blocks) Graph showing Erases generated by Operating System Figure 14: Graph of Logical Erase vs. Logical Block Number for a worst case test This graph shows the Logical Erases vs. Logical Block Address, the Logical erase addresses are given as an input to the wear-leveling algorithm, these addresses where generated such that each block would wear out in an increasing order from 0 to above the maximum erase limit of 8500 erases and would generate a erase for only half the total addressable space.
  • 38. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 37Manipal Centre for Information Science Graph showing the Physical wear status of the Flash Figure 15: Graph of Physical Erase vs. Physical Block Number for a worst case test This graph show the Physical Erases vs. Physical Block Address, this is the output of the wear-leveling algorithm, from the graph we can infer that each block was erased almost uniformly throughout the whole addressable space and within the maximum erase limit of 8500.
  • 39. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 38Manipal Centre for Information Science 4.3 Tests results for practical case (random Logical write to all Blocks) Graph showing Erases generated by Operating System Figure 16: Graph of Logical Erase vs. Logical Block Number for a practical case This graph shows the Logical Erases vs. Logical Block Address, the Logical erase addresses are given as an input to the wear-leveling algorithm, these addresses where generated such that each block would wear out in an random order from 0 to above the maximum erase limit of 8500 erases and would generate a erase for only half the total addressable space.
  • 40. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 39Manipal Centre for Information Science Graph showing the Physical wear status of the Flash Figure 17: Graph of Physical Erase vs. Physical Block Number for a practical case This graph show the Physical Erases vs. Physical Block Address, this is the output of the wear-leveling algorithm, from the graph we can infer that each block was erased almost uniformly throughout the whole addressable space and within the maximum erase limit of 8500.
  • 41. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 40Manipal Centre for Information Science 5. Conclusion and Scope for future work 5.1 Conclusion Wear leveling helps in extend the useful life of NAND Flash devices and is necessary to ensure that the devices reach the specified endurance rating by equalizing the wear of good blocks. The use of wear-leveling techniques is imperative in NAND Flash devices, regardless of the individual device’s endurance rating. The most effective wear-leveling method is static wear leveling because it typically provides more uniform block usage than dynamic wear leveling. Although dynamic wear leveling is typically inferior to static wear leveling, this method is easier to implement and can still provide enough wear leveling to meet the needs of many applications. The Implementation and Simulation of the Group-Based Wear-leveling Algorithm with Basic Hot-Cold Block Swapping proved the correctness and effectiveness of the proposed methods. 5.2 Scope for future work The algorithms can be implemented to evaluate the cost involved in Wear-leveling of flash memory, it can be done from two perspectives Time taken to wear the blocks uniformly. The memory need to implement the algorithm.
  • 42. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 41Manipal Centre for Information Science 6. GNU Tools Used 6.1 GNU Octave GNU Octave is a high-level language, primarily intended for numerical computations. It provides a convenient command line interface for solving linear and nonlinear problems numerically, and for performing other numerical experiments using a language that is mostly compatible with Matlab. It may also be used as a batch-oriented language. Octave has extensive tools for solving common numerical linear algebra problems, finding the roots of nonlinear equations, integrating ordinary functions, manipulating polynomials, and integrating ordinary differential and differential-algebraic equations. It is also used to plot and study graphs. It is easily extensible and customizable via user- defined functions written in Octave's own language, or using dynamically loaded modules written in C++, C, Fortran, or other languages. GNU Octave is a freely redistributable software. So anyone may redistribute it and/or modify it under the terms of the GNU General Public License (GPL) as published by the Free Software Foundation. The inbuilt functions that were extensively used in plotting the results of the implemented Wear-leveling algorithms were abs(), stem(), xlabel(), ylabel() and title(). 6.2 GDB The GNU Debugger, usually called just GDB, is the standard debugger for the GNU software system. It is a portable debugger that runs on many Unix like systems and works for many programming languages, including Ada, C, C++, FreeBASIC and Pascal. GDB allows you to see what is going on inside another program while it executes or what another program was doing at the moment it crashed.
  • 43. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 42Manipal Centre for Information Science GDB can do four main kinds of things (plus other things in support of these) to help you catch bugs in the act: 1) Start your program, specifying anything that might affect its behavior. 2) Make your program stop on specified conditions. 3) Examine what has happened, when your program has stopped. 4) Change things in your program, so you can experiment with correcting the effects of one bug and go on to learn about another. Thus GDB offers extensive facilities for tracing and altering the execution of computer programs. The user can monitor and modify the values of programs internal variables, and even call functions independently of the program's normal behavior. 6.3 GCC The GNU Compiler Collection (shortened to GCC) is a compiler system produced by the GNU Project supporting various programming languages. GCC is a key component of the GNU tool chain. As well as being the official compiler of the GNU system, GCC has been adopted as the standard compiler by most other modern Unix like computer operating systems. GCC has been ported to a wide variety of processor architectures, and is widely deployed as a tool in commercial, proprietary and closed source software development environments. Originally named the GNU C Compiler, because it only handled the C programming language, but soon the compiler was extended to compile C++, Front ends were later developed for Fortran, Pascal, Objective-C, Java, and Ada, among others. The Free Software Foundation (FSF) distributes GCC under the GNU General Public License (GNU GPL) and the GNU Lesser General Public License (GNU LGPL). GCC is often the compiler of choice for developing software that is required to execute on a wide variety of hardware and/or operating systems. System-specific compilers
  • 44. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 43Manipal Centre for Information Science provided by hardware or OS vendors can differ substantially, complicating both the software's source code and the scripts which invoke the compiler to build it. With GCC, most of the compiler is the same on every platform, so only code which explicitly uses platform-specific features must be rewritten for each system.
  • 45. Prototyping and Simulation of Wear-leveling and Bad Block Management Algorithms using C Walter J S Rodrigues 44Manipal Centre for Information Science 7. Bibliography 1. http://en.wikipedia.org/wiki/Flash_memory 2. http://en.wikipedia.org/wiki/Wear_levelling 3. http://www.corsair.com/_faq/FAQ_flash_drive_wear_leveling.pdf 4. http://www.eetasia.com/ART_8800575064_499486_AN_ae5c2c44.HTM 5. http://www.spansion.com/application_notes/Wear_Leveling_AN_01.pdf 6. http://www.byteandswitch.com/storage/how-long-does-nand-flash-memory-last.php 7. http://www.eetindia.co.in/ARTICLES/2004NOV/A/2004NOV29_MEM_AN06.PDF 8. TN-29-42: Wear-Leveling Techniques in NAND Flash Devices 9. NAND Flash 101 - An Introduction to NAND Flash and How to Design It In to Your Next Product 10. A group-based wear-leveling algorithm for large-capacity flash memory storage sys- tems by Dawoon, Chae, Heeseung, Jin-Soo and Joonwon (KAIST)