Organisasi dan Arsitektur
Komputer
Ajeng Savitri Puspaningrum, M.Kom
Pertemuan 26
Memory (Part 2)
 Learning the Definition of Cache
 Learning How Cache’s Works
 Learning Characteristic of Cache
So you want fast?
 It is possible to build a computer which uses only static RAM
(see later)
 This would be very fast
 This would need no cache
 How can you cache cache?
 This would cost a very large amount
Cache
 Small amount of fast memory
 Sits between normal main memory and CPU
 May be located on CPU chip or module
Cache Memory
 Mekanisme penyimpanan data sekunder berkecepatan tinggi yang
digunakan untuk menyimpan data / instruksi yang sering diakses.
 Memberi kecepatan memori yang mendekati memori yang paling
cepat yang bisa diperoleh, dan pada waktu yang sama
menyediakan kapasitas memori yang besar dengan harga yang
lebih murah dari jenis-jenis memori semikonduktor.
Cache and Main Memory
Cara Kerja
 Komputer membutuhkan data
 Mencarinya pada Cache.
 Jika data ditemukan, prosesor akan langsung membacanya
dengan delay yang sangat kecil. Tetapi jika data yang dicari
tidak ditemukan,prosesor akan mencarinya pada RAM yang
kecepatannya lebih rendah.
 Kapasitas memori cache yang semakin besar juga akan
meningkatkan kecepatan kerja komputer secara keseluruhan.
Cache Read Operation -
Flowchart
Cache Design
 Addressing
 Size
 Mapping Function
 Replacement Algorithm
 Write Policy
 Block Size
 Number of Caches
Cache Addressing
 Where does cache sit?
 Between processor and virtual memory management unit
 Between MMU and main memory
 Logical cache (virtual cache) stores data using virtual addresses
 Processor accesses cache directly, not thorough physical cache
 Cache access faster, before MMU address translation
 Virtual addresses use same address space for different applications
Must flush cache on each context switch
 Physical cache stores data using main memory physical addresses
Size does matter
 Cost
 More cache is expensive
 Speed
 More cache is faster (up to a point)
 Checking cache for data takes time
Direct Mapping
 Each block of main memory maps to only one cache line
 i.e. if a block is in cache, it must be in one specific place
 Address is in two parts
 Least Significant w bits identify unique word
 Most Significant s bits specify one memory block
 The MSBs are split into a cache line field r and a tag of s-r
(most significant)
Direct Mapping Summary
 Address length = (s + w) bits
 Number of addressable units = 2s+w words or bytes
 Block size = line size = 2w words or bytes
 Number of blocks in main memory = 2s+ w/2w = 2s
 Number of lines in cache = m = 2r
 Size of tag = (s – r) bits
Direct Mapping Pros & Cons
 Simple
 Inexpensive
 Fixed location for given block
 If a program accesses 2 blocks that map to the same line repeatedly,
cache misses are very high
Victim Cache
 Lower miss penalty
 Remember what was discarded
 Already fetched
 Use again with little penalty
 Fully associative
 4 to 16 cache lines
 Between direct mapped L1 cache and next memory level
Associative Mapping
 A main memory block can load into any line of cache
 Memory address is interpreted as tag and word
 Tag uniquely identifies block of memory
 Every line’s tag is examined for a match
 Cache searching gets expensive
Associative Mapping
 A main memory block can load into any line of cache
 Memory address is interpreted as tag and word
 Tag uniquely identifies block of memory
 Every line’s tag is examined for a match
 Cache searching gets expensive
Direct and Set Associative Cache
Performance Differences
 Significant up to at least 64kB for 2-way
 Difference between 2-way and 4-way at 4kB much less than
4kB to 8kB
 Cache complexity increases with associativity
 Not justified against increasing cache to 8kB or 16kB
 Above 32kB gives no improvement
 (simulation results)
Memori Internal dan External
 Memori internal adalah memori yang dapat diakses
langsung oleh prosesor
 register yang terdapat di dalam prosesor, cache memori dan
memori utama berada di luar prosesor.
 Memori eksternal adalah memori yang diakses prosesor
melalui piranti I/O
 disket dan hardisk.
Operasi Sel Memori
 Elemen dasar memori
 Sel memori memiliki sifat – sifat tertentu
Sifat Sel Memori
 Sel memori memiliki dua keadaan stabil (atau semi-stabil),
yang dapat digunakan untuk merepresentasikan bilangan
biner 1 atau 0.
 Sel memori mempunyai kemampuan untuk ditulisi
(sedikitnya satu kali).
 Sel memori mempunyai kemampuan untuk dibaca.
Terminal Fungsi Sel Memori
Main Memory
 Memori utama merupakan media penyimpanan dalam bentuk
array yang disusun word atau byte, kapasitas daya simpannya bisa
jutaan susunan.
 Setiap word atau byte mempunyai alamat tersendiri.
 Data yang disimpan pada memori utama ini bersifat volatile.
 Memori utama digunakan sebagai media penyimpanan data yang
berkaitan dengan CPU atau perangkat I/O.
Tipe Main Memory
Random Access Memory ( RAM )
Read Only Memory ( ROM )
CMOS Memory
Virtual Memory
Main Memory
Semiconductor Memory Types
Memory Type Category Erasure Write Mechanism Volatility
Random-access
memory (RAM)
Read-write memory Electrically, byte-level Electrically Volatile
Read-only
memory (ROM)
Read-only memory Not possible
Masks
Nonvolatile
Programmable
ROM (PROM)
Electrically
Erasable PROM
(EPROM)
Read-mostly memory
UV light, chip-level
Electrically Erasable
PROM (EEPROM)
Electrically, byte-level
Flash memory Electrically, block-level
Refference
Stalling, William, Computer Organization
and Architecture, 10th Edition, Pearson,
2015
Abdurohman, Maman, Organisasi dan
Arsitektur Komputer revisi ke-4, Penerbit
Informatika, 2017
Terima Kasih
ajeng.savitri@teknokrat.ac.id
https://teknokrat.ac.id/en/
https://spada.teknokrat.ac.id/

Memory (Part 2)

  • 1.
    Organisasi dan Arsitektur Komputer AjengSavitri Puspaningrum, M.Kom Pertemuan 26
  • 2.
  • 3.
     Learning theDefinition of Cache  Learning How Cache’s Works  Learning Characteristic of Cache
  • 4.
    So you wantfast?  It is possible to build a computer which uses only static RAM (see later)  This would be very fast  This would need no cache  How can you cache cache?  This would cost a very large amount
  • 5.
    Cache  Small amountof fast memory  Sits between normal main memory and CPU  May be located on CPU chip or module
  • 6.
    Cache Memory  Mekanismepenyimpanan data sekunder berkecepatan tinggi yang digunakan untuk menyimpan data / instruksi yang sering diakses.  Memberi kecepatan memori yang mendekati memori yang paling cepat yang bisa diperoleh, dan pada waktu yang sama menyediakan kapasitas memori yang besar dengan harga yang lebih murah dari jenis-jenis memori semikonduktor.
  • 7.
  • 8.
    Cara Kerja  Komputermembutuhkan data  Mencarinya pada Cache.  Jika data ditemukan, prosesor akan langsung membacanya dengan delay yang sangat kecil. Tetapi jika data yang dicari tidak ditemukan,prosesor akan mencarinya pada RAM yang kecepatannya lebih rendah.  Kapasitas memori cache yang semakin besar juga akan meningkatkan kecepatan kerja komputer secara keseluruhan.
  • 9.
  • 10.
    Cache Design  Addressing Size  Mapping Function  Replacement Algorithm  Write Policy  Block Size  Number of Caches
  • 11.
    Cache Addressing  Wheredoes cache sit?  Between processor and virtual memory management unit  Between MMU and main memory  Logical cache (virtual cache) stores data using virtual addresses  Processor accesses cache directly, not thorough physical cache  Cache access faster, before MMU address translation  Virtual addresses use same address space for different applications Must flush cache on each context switch  Physical cache stores data using main memory physical addresses
  • 12.
    Size does matter Cost  More cache is expensive  Speed  More cache is faster (up to a point)  Checking cache for data takes time
  • 13.
    Direct Mapping  Eachblock of main memory maps to only one cache line  i.e. if a block is in cache, it must be in one specific place  Address is in two parts  Least Significant w bits identify unique word  Most Significant s bits specify one memory block  The MSBs are split into a cache line field r and a tag of s-r (most significant)
  • 14.
    Direct Mapping Summary Address length = (s + w) bits  Number of addressable units = 2s+w words or bytes  Block size = line size = 2w words or bytes  Number of blocks in main memory = 2s+ w/2w = 2s  Number of lines in cache = m = 2r  Size of tag = (s – r) bits
  • 15.
    Direct Mapping Pros& Cons  Simple  Inexpensive  Fixed location for given block  If a program accesses 2 blocks that map to the same line repeatedly, cache misses are very high
  • 16.
    Victim Cache  Lowermiss penalty  Remember what was discarded  Already fetched  Use again with little penalty  Fully associative  4 to 16 cache lines  Between direct mapped L1 cache and next memory level
  • 17.
    Associative Mapping  Amain memory block can load into any line of cache  Memory address is interpreted as tag and word  Tag uniquely identifies block of memory  Every line’s tag is examined for a match  Cache searching gets expensive
  • 18.
    Associative Mapping  Amain memory block can load into any line of cache  Memory address is interpreted as tag and word  Tag uniquely identifies block of memory  Every line’s tag is examined for a match  Cache searching gets expensive
  • 19.
    Direct and SetAssociative Cache Performance Differences  Significant up to at least 64kB for 2-way  Difference between 2-way and 4-way at 4kB much less than 4kB to 8kB  Cache complexity increases with associativity  Not justified against increasing cache to 8kB or 16kB  Above 32kB gives no improvement  (simulation results)
  • 20.
    Memori Internal danExternal  Memori internal adalah memori yang dapat diakses langsung oleh prosesor  register yang terdapat di dalam prosesor, cache memori dan memori utama berada di luar prosesor.  Memori eksternal adalah memori yang diakses prosesor melalui piranti I/O  disket dan hardisk.
  • 21.
    Operasi Sel Memori Elemen dasar memori  Sel memori memiliki sifat – sifat tertentu
  • 22.
    Sifat Sel Memori Sel memori memiliki dua keadaan stabil (atau semi-stabil), yang dapat digunakan untuk merepresentasikan bilangan biner 1 atau 0.  Sel memori mempunyai kemampuan untuk ditulisi (sedikitnya satu kali).  Sel memori mempunyai kemampuan untuk dibaca.
  • 23.
  • 24.
    Main Memory  Memoriutama merupakan media penyimpanan dalam bentuk array yang disusun word atau byte, kapasitas daya simpannya bisa jutaan susunan.  Setiap word atau byte mempunyai alamat tersendiri.  Data yang disimpan pada memori utama ini bersifat volatile.  Memori utama digunakan sebagai media penyimpanan data yang berkaitan dengan CPU atau perangkat I/O.
  • 25.
    Tipe Main Memory RandomAccess Memory ( RAM ) Read Only Memory ( ROM ) CMOS Memory Virtual Memory Main Memory
  • 26.
    Semiconductor Memory Types MemoryType Category Erasure Write Mechanism Volatility Random-access memory (RAM) Read-write memory Electrically, byte-level Electrically Volatile Read-only memory (ROM) Read-only memory Not possible Masks Nonvolatile Programmable ROM (PROM) Electrically Erasable PROM (EPROM) Read-mostly memory UV light, chip-level Electrically Erasable PROM (EEPROM) Electrically, byte-level Flash memory Electrically, block-level
  • 27.
    Refference Stalling, William, ComputerOrganization and Architecture, 10th Edition, Pearson, 2015 Abdurohman, Maman, Organisasi dan Arsitektur Komputer revisi ke-4, Penerbit Informatika, 2017
  • 28.