Department of Electronics and Communication Engineering UNIT-I -ED
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1
UNIT-1
ELECTRON DYNAMICS AND CRO
SYLLABUS:
Motion of charged particles in electric and magnetic fields. Simple problems involving electric and
magnetic fields only. Electrostatic and magnetic focusing. Principles of CRT, deflection sensitivity
(Electrostatic and magnetic deflection), Parallel Electric and Magnetic fields, Perpendicular Electric
and Magnetic fields.
LECTURE PLAN
S. No. Topic to be covered
Periods
required
1
Introduction to Coulomb's Law, Electric field intensity, Potential,
Potential Energy.
1
2 Motion of charged particles in electric field. 3
3 Simple problems involving electric field. 1
4 CRO, Principle of CRT, Electrostatic and Magnetic Focusing 2
5 Electrostatic Deflection Sensitivity, Simple problems involving
electrostatic deflection sensitivity.
1
6 Motion of charged particles in magnetic fields. 1
7 Simple problems involving magnetic field. 1
8
Magnetic Deflection Sensitivity, Simple problems involving
magnetic deflection sensitivity. 1
9 Comparison between deflection methods, Current Density,
Charge density and their relation. Related Problems
1
10
Motion of electron in (i) Parallel electric and magnetic fields and
(ii) Perpendicular electric and magnetic fields.
3
Total 15
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Introduction:
Electronics has been defined as the branch of science & Technology which relates the
conduction of current through vacuum (or) gas (or) semiconductor material. An electronic device is
that in which electrons flow through a vacuum (or) gas (or) semiconductor.
The Operation of an electronic device depends upon the motion of electrons under the
influence of electric and Magnetic fields. The behavior of an electron under the influence of these
fields is termed as electron ballistics.
The charge of an electron is 1.602 x 10-19
coulombs. The mass of an electron is 9.1 x 10-31
kg.
Force:
From coulomb‟s law F  Q1 Q2
F 
²
1
R
 F  2
21
R
QQ
F = 2
0
21
4 R
QQ

Where 0 is the permittivity of free space.
0 = 8.854 x 10-12
farad/m
Electric field intensity (E):
The electric field intensity is defined as the force on a unit positive charge. The unit of electric field
intensity is volt/meter.
The force on charged particles in an electric field:
The force on a unit positive charge at any point in an electric field is the electric field intensity at
that point.
The force (F) on a positive charge „q‟ in an electric field of intensity „E‟ is given by
F = E.q ………… (1)
The resulting force F being in the direction of electric field.
F in Newton‟s
E in V/m
q in coulombs.
In order to calculate the path of a charged particle in an electric field, the force given by eqn (1)
must be related to the mass and acceleration of the particle by Newton‟s second Law of motion.
F = EQ = ma = m
dt
d
………… (2)
Where m = mass, Kg
a = acceleration, m/sec²
 = Velocity, m/sec.
The solution of above eqn. (2) subject to appropriate initial conditions gives the path of the particle
resulting from the action of the electric forces. If the magnitude of the charge on the electron is „e‟,
the force on an electron in the field is F = -eE
The minus sign denotes that the force is in the direction opposite to the field.
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The eV unit of Energy:
A unit of work or energy, called the electron volt (eV), is defined as follows:
1 eV = 1.60 x 10-19
Joules
Potential:
The amount of work done in moving a unit positive charge „Q‟ from infinity to the required
point is called “Potential”. Electric potential is scalar quantity.
The work done against the field in carrying a unit positive charge from the point x0 to the point „x‟
by definition is the potential „V‟.
dw = -F. dl
dw = -EQ. dl
w = - Q 
x
x
dlE
0
.

x
x
dlE
Q
w
0
.

x
x
dlEV
0
.
Dividing w by Q gives the potential energy per unit charge.
Relationship between field intensity and potential:
By definition, V = - 
x
x
dlE
0
. = - E (x – x0)
E =
d
V
xx
V 



0
In general, the field intensity may vary with the distance, the correct eqn. is
dx
dv
Ex 
The Minus sign shows that the electric field is directed from the region of higher potential to the
region of Lower Potential.
Constant Electric Field:
Suppose that an electron is situated between the two plates of a parallel – plate capacitor as shown
in fig. below. And the distance b/w the plate is small compared with the dimensions of the plates.
A difference of potential is applied between the two plates then the direction of electric field is
shown in fig. below
Y
d
E
0 X
+ -
Z
Fig. The one – dimensional electric field b/w the plates of a parallel plate capacitor
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If the distance b/w the plates is small compared with the dimensions of the plates, the electric field
may be considered to be uniform, and the lines of force pointing along the negative x – direction.
i.e., the only field that is present is along the x direction.
To know the motion of electron between plates having initial velocity  ox along the electric field E
and the initial position of the electron is „x0‟ along the x-axis.
Since there is no force along the y or z directions the particle will not move along these directions.
i.e., the only possible motion is one – dimensional and the electron moves along the x-direction.
By applying the Newton‟s Law to the x-direction.
F = max
eE = max
ax =
m
eE
……… (1)
Where E is the magnitude of electric field.
From the above eqn. we came to know that the electron will move with a constant acceleration in a
uniform electric field.
The velocity and displacement can be calculated by the below expressions.
 x =  0x + ax.t
x = x0 +  0xt+
2
1
axt²
Provided that ax = const. independent of time.
Problem 1:
An electron starts at rest on one plate of a plane – parallel capacitor whose plates are 5 cm apart.
The applied voltage is zero at the instant the electron is released, and it increases linearly from
zero to 10V in 0.1 µ sec.
a) If the opposite plate is positive, what speed will the electron attain in 50 n sec ?
b) Where will it be at the end of this time?
c) With what speed will the electron strike the positive plate.
V10v (0.1 µsec, 10V) d=5cm
a)
(0,0)
0.1µsec - +
y = mx
v =  t
v=
sec1.0
10
µ
t E =
d
v
v= 7
10
10

t
E = 27
10510
10


t
E = 2  10+9
t
E = 2  109
t v/m
ax =
dt
d x
f = max
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ax =
m
f
 ax =
m
eE
m
f
dt
d x


f = eE
ax =
19
9
31
.602 10
2 10
9.1 10
eE
t
m


 
  

ax = (1.76  1011
) (2  109
t)
ax = 3.52  1020
t m/sec²
By integrating the above eqn. we obtain the speed.

t
xx dta
0
.
 
t
x dtt
0
20
1052.3
=3.52 x 1020
.
1
02
²





 t
= ²
2
1052.3 20
t

 x = 1.76 x 1020
t²
At t = 50n sec. x = 1.76 x 1020
x [50 x 10-9
]²
= 1.76 x 25 x 10² x
= 1.76 x 25 x 104
x = 4.40 x 105
m/sec
b) Integration of x with respect to t, subject to the condition that x = 0 when t = 0 yields
x =  
tt
x dttdt
0
20
0
²1076.1
x = 1.76  1020

1
03
³





 t
= 5.87  1019
t³
At t = 50 n sec
x = 5.87  1019
 [50  10-9
]³
x = 5.87  1019
 53
 10-24
= 7.32  10-3
m
x = 0.732 cm
c) To find the speed with which the electron strikes the positive plate, we first find the time„t‟ it
takes to reach that + plate.
 t =
3
1
19
1087.5 




x
T = sec1046.9
1087.5
05.0 8
3
1
19






Hence
x 1.76  1020
t²
= 1.76  1020
(9.46  10-8
]²
= 1.58  106
m/sec
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Problem from previous external Question paper
Problem 2
Two parallel plates of a capacitor are separated by 4 cms. An electron is at rest initially at the
bottom plate. Voltage is applied b/w the plates, which increases linearly from 0v to 8v in 0.1m sec.
If the Top plate is +ve, determine.
i) The speed of electron in 40n sec.
ii) The distance traversed by the electron in 40 n sec.
Solution: d = 4 cm = 4  10-2
m
V = t
t
43
10
8
101.0
8



E = tt
t
d
V 6
624
102
10
2
1010
2 



 v/m
i) a =
m
eE
m
F
dt
d


a = (1.76  1011
)  2  106
t
a = 3.52  1017
t m/sec²

t
dta
0
. = 3.52  1017

2
²t
 = 1.76  1017
t²
 = 1.376  1017
(40  10-9
)²= 1.76  16  101
 10-1
= 1.76 x 160 m/sec.
ii) 
t
dtx
0
 =  
t
t
0
217
1076.1 dt
x = 1.76  1017
3
³t
= 5.87  1016
t³
= 5.87  1016
[ 40  10-9
]3
m
Motion of electron with zero initial velocity in an electric field:
From Newton‟s second Law
F = max ……… (1)
F = -eEx ……… (2)
ax =
dt
d x
……… (3)
Substituting eqns. (2) or (3) in eqn. (1)
- eEx = m.
dt
d x
……….. (4)
By multiplying with „dx‟ both L.H.S & R.H.S
-eEx dx = m dx
dt
d x
.

-eExdx= m.d x.  x  x
dt
dx

Taking integration on both sides
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 

x
x
xx
x
x
xx ddE
m
e
00


x
x
xx dV
m
e
0
.   
x
x
xx VdE
0

x
x
x
V
m
e
0
2
²








 ²²
2
1
0xxV
m
e
  ……… (5)
m
eV
xx
22
0  
Where 0x is the initial velocity of the charged particle.
If 00 x
 x
Then the above eqn. becomes as
²
2
1
V
m
e
m
eV2
² 
m
eV2

The above eqn. is used to calculate the speed of electron, if the electron starts at rest.
Transit time of an Electron:
Consider that an electron starts with an initial velocity x0 from one plate of a parallel plate
capacitor and strikes the second plate with a velocity of f m/s, Where f = Final velocity with
which electron strikes the plate.
Then
m
eV
xf
22
0  
Let t = time of transit from cathode to anode.
t =
speedaverage
platesbetweenseparation
Now d = distance traveled = separation of plates
Average speed =
2
velocityfinalvelocityinitial 
=
2
vox fv
Therefore t =
2
vox fv
d

=> t =
fv
d
oxv
2
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Two Dimensional Motion:
Motion of electron with initial velocity in an electric field:
Consider a parallel-plate capacitor with uniform electric field between the plates. If the
electron enters the region between the two plates with an initial velocity x0 in the + x direction as
shown in figure below.
Fig. Two dimensional electronic motion in a uniform electric field.
From the above fig. the electric field E is in the direction of –y axis.
The motion of particle to be investigated, subject to the initial conditions.
xx 0  at x = 0
y = 0 at y = 0 When t = 0 …….. (1)
z = 0 at z =0
Z-axis
Since there is no force in the z-direction, the acceleration in that direction is zero.
X-axis
Since there is no force in the x-direction, the velocity along the x-axis remains constant and equal
to x0
i.e., x = x0
x = x0 t ………… (2)
Y-axis
A constant acceleration exists along the y-direction and the motion in the y-direction is given by
tayy 
y =
2
1
ayt² …………… (3)
Where ay =
m
eEy
ay =
dm
Vde
.
.
………. (4)
This equation indicates that in the region between the plates the electron is accelerated upward,
and the velocity y is varying from point to point. Where as the velocity component x remains
unchanged in the passage of the electron between the plates.
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The path of the particle with respect to the point O can be determined from the eqns. (2) or (3) by
eliminating„t‟. As y =
2
1
ayt²
y =
2
1
ay
2
0






x
x

tx x0
y = ².
²2
1
0
x
a
x
y







………… (5)
x
x
t
0

The above eqn. shows that the particle moves in a parabolic path in the region between the plates.
Problem 3:
Find the speed of an electron after it has moved through a potential difference of 5000V.
Soln.
The speed of the electron.
m
eV2

19
31
2 1.6 10 5000
9.1 10



  


.sec/102.4 7
m
Problem 4:
A charged particle having mass equal to 1000 times of an electron and a charge same as that of an
electron is accelerated through a potential difference of 1000V. Calculate the velocity attained by
the charged particle.
Soln. The mass of the charged particle = 1000 times the mass of an electron
= 1000 x 9.1 x 10-31

m
eV2

sec/10596.0
101.91000
1000106.12 6
31
19
m


 


Problem 5:
Two plane parallel plates A and B are placed 3mm apart and potential of B is made 200V positive
with respect to plate A. An electron starts from rest from plate A. Calculate
a) The velocity of the electron on reaching plate B.
b) Time taken by the electron to travel from plate A to plate B.
Soln:
a) The electron starts from rest at plate A, therefore the initial velocity is zero. The velocity of
the electron on reaching plate B is
 = 31
19
101.9
200106.122





m
eV
= 8.38106
m/sec
b) Time taken by the electron to travel from plate A to plate B can be calculated from the
average velocity of the electron in transit.
The average velocity =
2
velocityfinalvelocityinitial 
=
2
1038.80 6

=4.19106
m/sec
 Time taken for travel is = 6
3
1019.4
103




timeaverage
platesbetweenseparation
= 0.7110-9
sec
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Problem 6:
Two plane parallel plates A and B are placed 8mm apart and plate B is 300V more positive than
plate A. The electron travels from plate A to plate B with an initial velocity of 1 x 106
m/sec.
Calculate the time of travel.
Soln.
m
eV
initial
2
²  
  31
19
26
101.9
300106.12
101 




sec/1033.10 6
m
The average velocity Vavg =
2
finalVinitialV 
= sec/10665.5
2
1033.10101 6
66
m
x


 the time for travel =
averageV
platesbetweenseperation
= sec104.1
10665.5
108 9
6
3





Special case of Two Dimensional Motion:
y
E +
v0

x
0
-
At t = 0, vox = v0 cos
voy = vo sin
No force in x-direction x = voxt = vo cost ………… (1)
ay = -
m
qEy
vy = vo sin + ayt ……….(2)
y = vo sint +
2
1
ayt² ………… (3)
Problem 7:
An electron with a velocity of 3 x 105
m/s enters an electric field of 910 v/m making an angle of
60º with the direction. The x- direction of the electric field is in the –ve y-direction. The direction of
the electric field is in the y-direction. Calculate the time required to reach its max, height.
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Soln. v0 = 3 x 105
m/s , E = 910 v/m,  = 60º
vox = v0cos = 3 x 105
x cos 600
= 150 x 103
m/s
voy = vo sin = 3 x 105
x sin60º = 259.807 x 103
m/s
ay =
m
qEy
constant
 vy = v0sin + ayt
y = v0 sint +
2
1
ayt²
For max. height,
dt
dy
= 0
t
a
dt
dy y
2
2 + v0sin = 0
T =
yy
o
y qE
mv
m
qE
v
a
v  sin
0
sinsin 00











=> T = 1.625 x 10-9
S
Electrostatic Deflection in a cathode Ray Tube:
Fig: Electrostatic deflection in a cathode – ray Tube
The configuration of the electro static deflection system in a CRT is shown in above figure. The
electro static deflection system uses a pair of deflection plates as shown in fig. The hot cathode K
emits electrons which are accelerated towards the anode by the potential Va. Those electrons which
are not collected by the anode pass through the tiny anode hole and strike the end of the glass
envelope. The glass envelope has been coated with a material that fluoresces when bom-barded by
electrons. Thus the position where the electrons strike the screen are made visible to the eye.
The displacement „D‟ of the electrons is determined by the potential Vd (assumed constant) applied
between the deflecting plates as shown in fig.
The velocity x0 with which the electrons emerge from the anode hole is given by
x0 =
m
eVa2
………… (1)
Since No field is to exist in the region from the anode to the point O, the electrons will move with a
constant velocity x0 in a straight – line path.
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In the region between the plates the electrons will move in the parabolic path given by the eqn.
y =








²2
1
0 x
ya

. x²……… (2)
Where ay =
md
eV
m
eE dy


……….. (3)
The path is a straight line from the point M at the edge of the plates to the point P¹ on the screen,
since the region is field free. The straight line path in the region from the deflection plates to the
screen is, of course, tangent to the parabola at the point M. the slope of the line at every point
between M and P¹is given by tan =
dx
dy
x = 
From eqn. (2) y =
2
1
².
²0
x
a
x
y

Differentiating with respect to „x‟ on both sides gives.
²
.
² 00 x
y
x
y la
x
a
dx
dy

  x
 tan =
²
.
0 x
ya


………. (4)
From the geometry of the figure, the eqn. of the straight line MP1
is found to be At the point M ,
x1 = , y1 =
2
1
ay
²
²
0 x


At the point P¹, y2 = D and x2 = L +
2

(y2 – y1) = m (x2 – x1)
y2 =  

 2
00 ²²
²
2
1
x
aa
x
y
x
y

y2 =
²
²
2
1
²
²
² 00
2
0 x
y
x
y
x
y aa
x
a



y2 =







2²
2
0

x
a
x
y

D =
²0 x
ya


D =
²0 x
yLa


……….. (5)
By substituting eqns. (3) in eqn. (5) we have
D =
m
eV
md
LeV
a
d
2


D =
a
d
dV
LV
2

……… (6)
This result shows that the deflection on the screen of a cathode – ray tube is directly proportional
to the deflecting voltage Vd applied between the plates.
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 CRT may be used as a linear – voltage indicating device.
The electrostatic – deflection sensitivity of a cathode – ray tube is defined as the deflection (in
meters) on the screen per volt of deflecting voltage.
Thus S =
ad dv
L
V
D
2

 …….. (7)
The above eqns. shows that the sensitivity is independent of the deflecting voltage Vd and the
ration e/m. the sensitivity varies inversely with the accelerating potential Va.
Typical measured values of sensitivity are 1.0 to 0.1 mm/v. Corresponding to a voltage
requirement of 10 to 100V to give a deflection of 1 cm.
Problem 8:
In a CRT the deflection plates are 2 cm long and are spaced 0.5 cm apart. The screen is 20 cm
away from the centre of the deflecting plates the final anode voltage is 800v. Calculate
i) The velocity of the beam on emerging from the field and
ii) The voltage that must be applied to the deflecting plates to have a displacement of 1 cm.
Soln. Given Va = 800 V  = 2 cm
d = 0.5 cm L = 20 cm D = 1 cm
i) The velocity of the beam
m
eVa2

31
19
101.9
800106.12





6
16.8 10 / secm  
ii) The deflection of the beam
D =
a
d
Vd
LV
2

1  10-2
=
800105.02
1020102
2
22




dV
=> Vd = 20V.
Problem 9:
An electrostatic CRT has a final anode voltage of 600v. the deflection plates are 1.5 cm long and
0.8cm apart. The screen is at a distance of 20cm from the centre of plates. A voltage of 20V is
applied to the deflection plates. Calculate
i) Velocity of electron on reaching the field. ii) Acceleration due to deflection field.
iii) deflection produced on the screen in cm. and iv) deflection sensitivity in cm/v.
Soln. Given Va = 600V  = 3.5 cm
d = 0.8 cm L = 20 cm Vd = 20V
i) The velocity of electron
m
eVa2
 = 14.5x106
m/sec
ii) ma = eE
a = 312
19
101.9108.0
600106.1
. 




md
eV
m
eE a
= 43.95 x 1013
m/sec²
iii) D = cm
dV
LV
a
d
45.1
2


iv) S =
Vd
D = 0.0725 cm/v.
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Force in a Magnetic Field:
A Magnetic field can exert force only on a moving charge. If a conductor of Length „L‟ carrying a
current of I, is situated in a magnetic field of intensity B. the force „fm‟ acting on this conductor is
fm = BIL …….. (1)
Where fm is in Newton
B is in Webers / m²
I is in Amperes and
L is in meters
The above equation assumes that the directions of I and B are perpendicular to each other. The
direction of this force is perpendicular to the plane of I and B.
If „N‟ electrons are contained in a Length „L‟ of conductor and If it takes an electron a time „T‟ sec to
travel a distance of „L‟ meters in the conductor, then the total number of electrons passing through
any cross section of wire in unit time is = N/T. ……. (2)
Thus the total charge per second passing any point, which by definition, is the current in
amperes, is
I =
T
Ne
…….. (3)
The force in Newton‟s on a Length „L‟ m is
fm = BIL = B.
T
Ne
.L
fm = BNe ……… (4)
Since
T
L
is the average, or drift speed  m/sec of the electrons.
The force per electron is fm = e B ………. (5)
Motion in a Magnetic field:
Consider an electron to be placed in the region of the magnetic field. If the particle is at rest, the
magnetic field can not exert any force i.e fm=0 and the particle remains at rest. The magnetic force
acting on a charged particle in a uniform magnetic field is
fm = e  x B
fm = e  B. sin ……..(1)
Where  is the angle between the direction of magnetic field and the direction of motion of
particle.
If the initial velocity of the particle is along the lines of the magnetic flux, there is no force acting
on the particle. The magnetic force acting on a particle moving perpendicular to the direction of the
magnetic flux density.
Fig. Circular motion of an electron in a transverse magnetic field
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Consider an electron moving with a speed „ ‟ to enter a constant uniform magnetic field
normally as shown in above fig. The direction of the current is opposite to that of the motion of
electron. At every point in the magnetic field force acts on the electron and the resultant direction
will be perpendicular to both magnetic field and the direction of motion of electron at that point.
This type of force makes an electron to move in a circular path with uniform speed. As shown in
figure, the direction of the magnetic force is always towards the centre of the circle. This force is
same as the centripetal force which always tries to push the electron towards the centre of the
circle.
To find the radius of the circle 

eB
R
m

²
…………… (2)
From which R =
eB
m
………. (3)
The radius of the path is directly proportional to the speed of the particle.
The angular velocity of the electron in radians per second is W =
m
eB
R


……….. (4)
The time in seconds for one complete revolution, called the period is
T =
eB
m
m
eBW
 



2
……….. (5)
For an electron, this reduces to T =
B
x 11
1057.3 
………… (6)
The period and the angular velocity are independent of speed Y or radius. This means that faster
moving particles will traverse larger circles in the same time that a slower particle moves in its
smaller circle.
Special case of motion in a Magnetic field:
Consider a charged particle enters into a uniform magnetic field. With an initial velocity 0 ,
not perpendicular to the magnetic field but makes an angle with the direction of the field, the
electronic motion can easily be analyzed by resolving the velocity in two components.
Y
B
0
0 cos = 0 y θ
O X
 sin00 x
Z
The force is perpendicular to the B, So no force can be along y – direction. Hence the velocity in y-
direction is constant and equal to y0
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i.e., y = y0 = constant
The component y0 is responsible to produce the force as it is normal to the magnetic filed B. this
gives a circular motion to an electron with radius






eB
m x0
.
The resultant path due to these two components of velocities is helical path called “helix”. Whose
axis is parallel to the y-axis and displaced from it by the distance R along the z-axis.
Fig. Helical path of an electron.
The pitch of the helix is defined as the distance traveled along the direction of the magnetic field in
one revolution. It is given by p = yo T
T is the period of time for one revolution. P = 





eB
m2
yo .
Problem 10:
An electron has a velocity of 2 x 107
m/sec when it enters a magnetic field perpendicularly to the
direction of flux. If flux density is 0.5m wb / m², find the radius of curvature of an electron path
and time for one revolution.
Soln:  = 2  107
m/sec, B = 0.5  10-3
wb/m²
R = 319
7317
105.0106.1
1021010.9





eB
m
R = 0.2276 mt = 22.76 cm
and T =
eB
m2
= 319
31
105.0106.1
101.92




T = 71.526  10-9
sec.
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Problem 11:
An electron having initial velocity corresponding to 300V are projected perpendicularly into a
uniform magnetic field of density 10-3
wb/m². Find the radius of the path and time for one
revolution. If an electron is accelerated at an angle of 40º with the field, what is the new value of
radius of path, time for one revolution and pitch of the helical path?
Soln.
Given V = 300V, B = 10-3
Wb/m²
Initial velocity corresponding to V = 300V is
31
19
109
300106.122





m
eV
 = 1.0267  107
m/sec
Case i) Electron is projected perpendicularly to field.
R = 319
731
10106.1
100267.110107.9





eB
m
R = 0.0584 mt = 5.84 cm
T = ns
eB
m
763.35
10106.1
10107.922
319
31



 


Case ii)
0
40
Vox = vsin = 1.0267 x 107
x sin40º
= 6.6 x 106
m/sec.
R =
eB
mvox
= 319
631
10106.1
106.610107.9


xx
xxx
= 0.375 m = 3.755 cm
T = m
eB
m
763.35
2


time period is not dependent on v or component of v.
Problem from Previous External Question Paper
Problem 12:
When an electron is placed in a magnetic field with a period of rotation sec10
5.35 12

B
T . So
that the trajectory of an electron is a circle.
a) What is the radius described by an electron placed in a magnetic field, perpendicular to its
motion, when the accelerating potential is 900v and B = 0.01 wb/m².
b) What is the time period of rotation?
soln: Given T = sec10
5.35 12

B
Given the trajectory of an electron is a circle i.e., electron is projected perpendicularly to field.
a) V = 900v, B = 0.01 wb/m²
31
19
101.9
900106.122





m
eV
v
sec/10778.11016.3
1.9
101096.12 714
212
mv 


19
731
106.101.0
10778.1101.9





Be
mv
R =
3
10
6.1
778.11.9 


R = 10.11 x 10-3
m R = 1.01 cm
b) T =
eB
m2
01.0106.1
101.92
19
31


 


T
T = 35.73 x 10-10
sec T = 3.573 ns
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Problem 13:
An electron moving with a velocity of 107
m/sec. enters a uniform magnetic field at an angle of 30º
with it calculate the magnetic flux density required in order that the radius of helical path is 2mt.
Also calculate the time taken by the electron for on revolution and pitch of the helix.
Soln. Given v = 107
m/sec  = 30º B =? R = 2m T =? P =?
vox = v sin = 107
x sin30º = 0.5 x 107
m/sec.
Now R = 19
731
106.12
105.0101.4




 B
Be
mvox
B = 1.4229 x 10-5
wb/m²
T = sec105133.2
104229.1106.1
101.922 6
519
31








qB
m
P = voy T = vcos . T = 107
cos 30º x 2.5133 x 10-6 = 21.76 m
Current Density:
If „N‟ electrons are contained in a Length „L‟ of the conductor and if it takes an electron a time „T‟
sec to travel a distance of „L‟ meters in the conductor
N-electrons
……..……………………………
A ..……………………………………
…………..….……………………
L
Then the total number of electrons passing through any cross section of wire in unit time is
T
N
…………… (1)
Thus the total charge per second passing any point, which by definition is the current in amperes,
is I =
T
Ne
……….. (2)
The current density is defined as the current per unit area of the conducting medium. And it is
denoted by the symbol „J‟.Assuming uniform current distribution.
J =
A
I
……….. (3) Where J is in Amperes / m²
A is the cross sectional Area of the conducting medium.
By substituting eqn. (2) in eqn. (3) we get
J =
TA
Ne
………. (4) But T =
v
L
 J =
LA
Nev
………. (5)
But LA is simply the volume containing the N electrons.  J =
V
Nev
LA
N
n  is the electron concentration per cubic meter. Thus J = nev, J = 
Where  =ne is the charge density in coulombs per cubic meter and v is in meter per second.
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Magnetic Deflection in a Cathode Ray Tube:
The below fig. shows the magnetic deflection in a cathode – Ray Tube.
Fig. Magnetic Deflection in CRT
A Short coil furnishing a transverse field in a Limited region is employed as shown in
figure.It is assumed that the magnetic field intensity „B‟ is uniform in the restricted region shown in
fig. and is zero outside of this area. The magnetic field is taken as pointing out of the paper, and
the beam is deflected upward. The electron moves in a straight line from the cathode to the
boundary „O‟ of the magnetic field.
In the region of uniform magnetic field the electron experiences a force of magnitude eBv, where v
is the speed. fm = eBv ……… (1)
This force is perpendicular to both, direction of motion and magnetic field. So the electron moves
along the circular path.
The path OM will be the arc of a circle whose center is at Q. The speed of the particles will remain
constant and equal to
v = vox =
m
eVa2
……… (2)
The angle  subtended by the arc OM at the centre is  =
R
lengtharc
is by definition of radians
measure if we assume a small angle of deflection then from above fig.
 =
R

……….. (3)
Where R =
eB
mv
……….. (4)
If the straight line MP¹ is projected backward, will pass through the centre „1‟ of the region of the
magnetic field. Then
Tan  =
L
D
D  L tan  L  ………… (5)
Substituting eqns (3) and (4) in eqn. (5) We get D  L  =
R
L
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D =
eB
mv
L
D =
mv
eBL
…………. (6)
Substituting eqns. (2) in eqns (6)
D =
m
eV
m
eBL
a2
.

D =
amv
e
2
. BL 
D =
m
e
v
LB
a
2
.

………. (7)
The Deflection per unit magnetic field intensity D/B is given by
m
e
v
L
B
D
a
2
.

 is called the magnetic – deflection Sensitivity of the tube.
m
e
v
L
S
a 2

 Which is independent of magnetic flux density „B‟
Problem 14:
In a CRT, the distance of the screen from the centre of the magnetic field is 20cm. The deflecting
magnetic field of flux density 1 10-4
wb/m² extends for a Length of 2cm along the Tube axis. The
final anode voltage is 800v. Calculate the deflection of the spot.
Soln.
The deflection of the spot is D =
m
e
v
BL
a
2

Given L = 20  10-2
m
B = 10-4
wb/m²
 = 2  10-2
m
Va = 800 V.
 D = 31
19242
101.92
106.1
800
102010102




D = 0.42 cm
Problem 15:
An electron beam, after being accelerated by a potential difference of 1500V, travels through a
uniform magnetic field of density 1.5 m wb / m², the direction of the magnetic field being normal to
the initial direction of the beam. If the width of the magnetic field traversed by the electron beam is
15mm, calculate.
a) The radius of curvature of the beam while it is traveling through the magnetic field, and
b) The angle through which the beam is deflected. Assume e/m is to be 1.76  10¹¹ C/kg.
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Soln. Given va = 1500V B = 1.5 m wb/ m² B = 1.5  10-3
wb / m²
 = 15 mm = 15  10-3
m Q / m = 1.76  10¹¹ c/kg.
Velocity of the electron is = vox =
m
eVa2
= 2.29 x 107
m/sec
a) R = 311
7
105.11076.1
1029.2




Be
mvox
= 0.087 m = 87mm
b)
mv
Bq
ox.

 radians
7
33
1029.2
105.11015




 x 1.76 x 1011
= 0.1729 radians
º9.9
Problem 16:
It is found that an electron beam is deflected 8 degrees when it traverses a uniform
magnetic field. 3cm wide, having a density of 0.6 m wb/m². Calculate
a) The speed of the electrons and
b) The force on each electron, the direction of beam is normal to that of the flux.
Soln.  must be in radians

º180
8
º8



 radians = 0.1396 rad
cm3
B = 0.6  10-3
wb/m²
a)
mv
qB

v =
m
qB
=
1396.0101.9
106.0106.1103
31
3192




v = 22.65  106
m/sec
b) fm = Bev
= 0.6  10-3
 1.6  10-19
 22.65  106
= 2.174  10-15
Newtons
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Comparison between Deflection Methods
The electrostatic deflection and the magnetic deflection methods can be compared on the
following points.
S.No Electrostatic deflection Magnetic Deflection
1.
The deflection is achieved by applying
voltage to the plates.
The deflection is obtained by
controlling the magnetic field by
varying current through the coils.
2.
The deflection is inversely
proportional to the accelerating
voltage va.
The deflection is inversely
proportional to the square root of the
voltage va.
3.
The deflection of the beam is smaller,
for given va.
The scheme gives wider beam
deflection, for given va.
4. The sensitivity is given by
adv
L
s
2


The sensitivity is given by
m
e
v
L
s
a
.
2


5.
The deflection is independent of the
ratio e/m.
The deflection is dependent on ratio
e/m
6.
For the given display area longer
tubes are necessary.
The shorter tubes can be built for the
given display area.
7.
For greater sensitivity if va is reduced,
the brightness of the spot also
reduces.
Though Va is reduced, more
brightness and resolution of spot can
be achieved.
8.
The scheme is used for the general
purpose oscilloscopes.
The scheme is preferred for the T.V
and radar.
Magnetic deflection uses coils resulting in Losses and also requires large currents for
deflections. The electrostatic deflection uses plates and require very little power. The Accelerating
potential can be increased to give brighter spot with small decrease in sensitivity for magnetic
deflection than for electric deflection.
Parallel Electric and Magnetic Fields:
Consider the case where both electric and magnetic fields exist simultaneously, the fields being in
the same or in opposite directions. If the initial velocity of the electron is either zero or directed
along the fields. The Magnetic field exerts No Force on the electron and the resultant motion
depends upon the electric field intensity „E‟. The electron will move in a direction parallel to the
fields with a constant acceleration.
If the fields are chosen as in fig. the complete motion of electron is specified by
Y
E B
X
Z Fig. Parallel electric and magnetic fields
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Vy = Voy - at
Y = voyt -
2
1
at²
Where a =
m
eE
is the magnitude of acceleration. The Negative sign results from the fact
that the direction of the acceleration of an electron is opposite to the direction of the electric field
intensity E.
Perpendicular Electric and Magnetic fields:
y
B
E .
X
Z
The directions of the fields are shown in fig. Let the magnetic field be directed
along the y direction and the Electric field be directed along the –x direction. The force on
an electron due to the electric field is directed along the +x axis. The force due to the
magnetic field is always normal to B, and Lies in a plane parallel to the xz-plane. Thus
there is no component of force along the y-direction, and the y component of acceleration
is zero. Hence the motion along the y is given by
fy = 0
vy = voy
y = voyt Assuming that the electron starts at the origin.
If the electron starting at rest at the origin, the initial magnetic force is zero. Since
the velocity is zero. The electric force is directed along the + x axis, and the electron will
be accelerated in this direction. As soon as the electron is in motion, the magnetic force
will no longer be zero. And there will be a component of this force which will be
proportional to the X component of velocity and will be direction along the +z – axis. The
path will thus bend away from the x – direction toward the +z – direction. The electric
and Magnetic forces interact with one another and the net force will finally make the
electron to travel in a “Cycloidal” path. To determine the path of an electron, the force
equations must be set up. The force due to the electric field E is eE along the +x
direction.
The force due to the magnetic field is found as follows:
At any instant, the velocity is determined by the three components vx, vy and vz
along the three co-ordinate axes. Since B is in the y-direction, no force will be exerted on
the electron due to vy. Because of vx, the force is eBvx in the +z –direction. Similarly, the
force due to vz is eBvz in the –x –direction.
Hence, Newton‟s Law, when expressed in terms of the three components, gives.
fig. Perpendicular electric and Magnetic fields
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fx =
dt
mdvx
= eE – eBvz
………………… (1)
fz =
dt
mdvz
= eBvx
Letting w =
m
eB
, and u =
B
E
The above eqn. (1) becomes as
.z
x
wvwu
dt
dv
 ……….. (2)
dt
dvz
= wvx ………… (3)
By differentiating eqn. (2) with respect to „t‟ we get
dt
dv
w
dt
xdv z

²
²
= -w² vx
0²
²
²
 x
x
vw
dt
vd
……….. (4)
The above equation is a Linear differential equation, and the solution of the above
equation is
Vx = C1 cos wt + C2 sinwt
By applying the initial conditions, i.e, vx = 0, vz = 0
at t = 0 we get 0 = C1  1 + C2  0
 C1 = 0
 vx = C2 sinwt Assuming C2 = u
vx = u sin wt ………….. (5)
By substituting eqn. (5) in eqn (1), we get
m.
dt
d
(u sin wt) = eE – eB. vz
m  u sin wt. w = eE – eB vz
eBvz = eE – muw. cos wt
vz =
eB
uwm
B
E .
 cos wt.
vz = u – u. cos wt ……… (6)
By integrating the eqn. (5)&(6) with respect to„t‟ we can obtain the co-ordinates x and z.
 X =
w
wtu cos.
+ C1
…………… (7)
Z = ut – u. 2
sin
C
w
wt

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By applying the initial conditions x = 0 = z at t = 0 we have
0 = 1C
w
u


C1 =
w
u
w
u
wt
w
u
x  cos
X =  wt
w
u
cos1
0 = 0 – 0 + C2  z = ut - wt
w
u
sin. …….. (8)
C2 = 0
If for convenience
 = wt and Q =
w
u
then x =  (1 – cos ) and …………. (9)
z = ut -
w
u
sin wt
z = Q – Q sin 
z = Q ( – sin  ) …………. (10)
Cycloidal path:
The above equations x = Q(1 – cos ) and z = Q ( – sin ) represents the parametric equations
of a common cycloid.
A common cycloid, defined as the path generated by a point on the circumference of a circle of
radius Q which rolls along a straight line, the z-axis and is shown in fig. below.
Fig. The cyloidal path of an electron in perpendicular electric and magnetic fields when the initial
velocity is zero
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The co-ordinates of the point P are x and z (y = 0) represents the position of the electron at any
time. The dark curve is the locus of the point P. The Angle  gives the number of radians through
which the circle has rotated.
From the diagram, it follows that
x = Q – Q cos and z = Q – Q sin which are identical to the path eqns of a cyloidal.
The physical interpretation of the symbols and then abbreviations is as follows:
„w‟ represents the angular velocity of rotation of the rolling circle.
„ ‟ represents the number of radians through which the circle has rotated.
„Q‟ represents the radians of the rolling circle.
u = wQ represents the velocity of translation of the center of rolling circle.
Straight Line Path:
As a special case of importance, consider that the electron is released perpendicular to both the
electric and Magnetic fields so that vox = voy = 0 and voz ≠ 0.
The electric force is eE along the +x direction and the magnetic force is eBvz along the –x direction.
 The total force in x – direction is fx = eE – Bevoz
If the net force on the electron is zero, then this condition is realized when
eE = eBvoz or
voz = u
B
E

It represents that velocity with which an electron may be injected into perpendicular electric and
magnetic fields and suffer no deflection, the net force being zero.
The velocity „u‟ is independent of the change and mass of the ions and moves along the z-axis in a
straight line path with the same velocity voz.
Problem 17:
The magnetic flux density B = 0.02 wb/m² and electric field strength E = 105 v/m are uniform
fields, perpendicular to each other. A pure source of an electron is placed in a field. Determine the
minimum distance from the source at which an electron with 0V will again have 0V in its trajectory
under the influence of combined electric and magnetic fields.
Soln: Given, B = 0.02 wb / m² E = 105
v/m
The initial velocity v0 = 0V
The minimum distance from the source at which an electron with 0V will again have 0V in its
trajectory under the influence of combined electric and magnetic fields is given by
= 2 Q
= 2 .
w
u
Where „w‟ is the angular velocity of the rolling circle w =
m
eB
„u‟ is the velocity of translation of the center of the rolling circle u =
B
E
„Q‟ is the radius of the rolling circle.
e = 1.602 x 10-19
C m = 9.1 x 10-31
kg
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 W = 31
19
101.9
02.0106.1





m
eB
= 3.5174 x 109
rad/sec.
U =
02.0
105

B
E
= 5 x 106
m/sec.
 The minimum distance traveled by an electron in perpendicular electric and magnetic
fields when the initial velocity is zero given by
m
w
u 3
9
6
10932.8
105174.3
10522 





Focusing:
The convergent beam from accelerating electrode has a tendency to spread
because of mutual repulsion between the electrons. Hence some focusing device is
required to bring the beam to a sharp focus at the screen. Two methods of focusing most
commonly used are
i) Electro static focusing
ii) Magneto static focusing
Electro static focusing:
Fig. Electrostatic Focusing system of a CRT
The control grid and a set of anodes will form a electrostatic focusing system. The
control grid is given a more negative potential (-200v) with respect to cathode (-30V).
The pre accelerating anode and accelerating anode are kept at high potential (2kv to
10kv) compared to focus anode (300v to 500v).The electron gun shown in above figure
contains two electrostatic focusing systems called electron lenses. The first lens
comprises the cathode surface, the control electrode and the aperture of pre accelerating
electrode. Due to this first electron lens, the electrons emitted from the cathode surface
converges to a small area located in front of the cathode on the axis of the tube. This
area is called cross over area. The second electron lens system is formed in the region
between pre accelerating electrode, focus anode and accelerating anode. The final anode
potential determines the velocity with which on electron in the beam travels to the screen
on leaving the electron gun.
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Magnetic focusing:
Magnetic focusing may be achieved either by permanent magnet or by passing current
through a coil of wire, the axis of which coincides with the beam axis. The principle of magnetic
focusing is illustrated in figure below.
Fig. Focusing action of a short focusing coil
The electron experiences a force from the magnetic field only if its motion is at angle to the
lines of magnetic force. If the lines of motion and magnetic lines of force are parallel, the electron
moves only by the attractive force of the anode. If the electron leaves the cathode at an angle to
the axis of the system, a force is exerted on it by the magnetic field. The direction of this force is at
right angle to both the directions of motion of electron and to the magnetic lines of force. This force
causes the electron to move in a spiral path. Therefore all the electrons emerging from the cathode
and magnetic focusing coil are brought to a corresponding point of screen.
CATHODE RAY OSCILLOSCOPE
The device, which allows, the amplitude of signals which are functions of time, to be
displayed primarily as a function of time is called Cathode Ray Oscilloscope, commonly known as
CRO. The CRO gives the visual representation of the time varying signals.
The CRO basically operates on voltages, but it is possible to convert current, pressure,
strain, acceleration and other physical quantities in to the voltage using transducers and obtain
their visual representations on the CRO. The block diagram of CRO is shown in the figure below.
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CATHODE RAY TUBE (CRT) :
The CRT is the heart of the CRO. The CRT generates the electron beam accelerates the beam,
deflects the beam and also has a screen where beam becomes visible as a spot. A schematic
diagram of CRT showing its structure and main components is shown in figure (2) below:
Fig. Cathode Ray Tube
The main parts of the CRT are
1. Electron gun
2. Deflection system
3. Flouroscent Screen
4. Glass Tube or Envelope.
5. Base.
6.
1. Electron Gun:
It consists of an indirectly heated cathode, a control grid, a focusing anode and an accelerating
anode. The electron gun generates a narrow accelerated beam of electrons which produces a spot
of light when it strikes the beam.
2. Deflection System:
The CRT has two sets of deflecting plates which are at right angles to each other in space.
These plates are referred to as the vertical deflection and horizontal deflection plates. The electron
beam comes under the influence of vertical and horizontal deflection plates before it strikes the
screen. When no voltage is applied to the vertical deflection plates the electron beam produces a
spot of light at the center of the screen. The electron beam is made to move up and down vertically
by controlling the voltage on the vertical plates thereby producing spots of light on the screen.
The electron beam is made to move horizontally from side to side at a uniform rate by applying
a saw tooth wave, which varies linearly with time across the horizontal deflection plates. Since this
voltage is used to sweep the electron beam across the screen, it is called a sweep voltage.
3. Fluorescent Screen:
The screen is coated with a suitable fluorescent material depending on the required color of the
spot. Some of the substances, which give characteristic fluorescent colors, are
Zinc Orthosilicate: Green
Calcium Tungstate: Blue
Zinc Sulphide or Zinc CadmiumSulphate: White
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4. Glass Tube or Envelope:
All the components of a CRT are enclosed in an evacuated glass tube called envelope. This allows
the emitted electrons to move about freely from one end of the tube to the other end.
5. Base:
The base is provided to the CRT through which the connections are made to the various parts.
CRO Measurements:
The various parameters which can be measured using CRO are voltage, current, period, frequency,
phase, amplitude, peak-to-peak value, duty cycle etc.
Voltage Measurement:
To measure the amplitude uses the following steps:
1. Note down the selection in volts/division from the front panel selected for measurement.
2. Adjust shift control to adjust signal on screen so that it becomes easy to count number of
divisions corresponding to peak-to-peak value of the signal.
3. Note down the peak-to-peak value in terms of the number of divisions on the screen.
4. Use the following relation to obtain peak to peak value in volts
Vp-p= (Number of Divisions) * 





Divisions
Volts
.
5. The amplitude (Peak value) then can be calculated as Vm=
2
V p-p
6. The RMS value of a sinusoidal signal can be obtained as Vrms =
2
mV
Current Measurement:
CRO is basically voltage-indicating device. Hence to measure the current, the current is passed
through a known standard resistance. The voltage across a resistance is displayed on CRO and is
measured. This measured voltage divided by the known resistance gives the value of unknown
current.
Thus I =
R
CROonVmeasured
Period and Frequency Measurement:
Note the time/division selected on the front panel. Then the period of the waveform can be
obtained as
T = (Number of Divisions occupied by one cycle) * 





Division
time
= time period
The frequency is the reciprocal of the period. f =
T
1
Lissajous Figures:
The Lissajous pattern method is the quickest method of measuring the frequency. The Patterns
obtained by applying simultaneously two different sine waves to horizontal and vertical deflection
plates are called Lissajous Figures or Lissajous Patterns.
The shape of the Lissajous figures depends on:
1. Amplitude of two waves
2. Phase difference between two waves.
3. Ratio of frequencies of two waves.
Consider two signals applied, having same amplitude and frequency having phase difference of φ
between them.
e1 = Emsinωt
and e2 = Emsin(ωt + φ)
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The phase difference φ produces the various patterns, which vary from straight diagonal lines to
the ellipse of different eccentricities. The shapes of Lissajous figures for various values of φ are
shown in fig. below.
Fig.. Lissajous Patterns for same frequency different phase shifts.
Measurement of Phase Difference:
Consider the Lissajous figure obtained on CRO with an unknown phase difference φ as shown in the
figure below. The frequency and amplitude of two waves is same. The parameters x1, x2, or y1, y2
can be measured in the fig.
The phase angle then can be obtained as,
φ = sin-1
2
1
y
y
= sin-1
2
1
x
x
If the pattern obtained is as shown in the fig. below then the phase angle φ is given by,
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φ = 1800
– sin-1
2
1
y
y
Measurement of Frequency:
To measure the unknown frequency, the signal with unknown frequency is applied to vertical
deflection plates called fV. The signal applied to horizontal deflection plates is obtained from variable
frequency oscillator of known frequency fH.
Thus, fH = frequency of signal applied to horizontal plates which is know
fV = frequency of signal applied to vertical plates which is unknown
The ratio of two frequencies can be obtained as,
genciesverticalofnumber
gencieshorizontalofnumber
f
f
H
V
tan
tan

Fig. Measurement of Frequency
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UNIT I - Semiconductors
SYLLABUS
CONDUCTION IN SEMICONDUCTORS: Electrons and holes in an Intrinsic
semiconductor, conductivity of a semiconductor, carrier concentrations in an intrinsic
semiconductor, donor and acceptor impurities, charge densities in a semiconductor,
Fermi level in a semiconductor having impurities, diffusion, carrier lifetime, the continuity
equation, the hall effect.
<,
LECTURE PLAN
S.
No.
Topics to be covered
No. of
Periods
1
Classification of Semiconductor materials and Review of semiconductor
physics.
1
2
Mobility, Current density, Conductivity of a Semiconductor, Mass Action
Law.
1
3 Electrons and holes in an Intrinsic semiconductor 2
4 carrier concentrations in an intrinsic semiconductor 1
5 donor and acceptor impurities, charge densities in a semiconductor 2
6 Fermi level in a semiconductor having impurities 1
7 Carrier lifetime, the continuity equation, the hall effect 1
TOTAL 9
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UNIT – II
JUNCTION DIODE CHARACTERISTICS
Introduction:
 A very poor conductor of electricity is called an insulator.
Eg: Wood, Glass, Diamond, Mica etc.
 An excellent conductor is a metal.
Eg: Copper, Alluminium etc.
 A material whose conductivity lies between that of conductors and insulators is called semi
– conductors.
Eg : Germanium and Silicon.
Structure of an Atom:
 All the protons and neutrons are bound together at the center of an atom, which is called
nucleus. While all the electrons are moving around the nucleus.
 The electrons which are revolving around the nucleus do not move in the same orbit. The
electrons are arranged in the different orbits or shells at fixed distances from the nucleus.
In general, a shell can contain a maximum of „2n²” electrons where „n‟ is the number of the
shell..
 Each shell has energy level associated with it. Closer the shell to the nucleus, more tightly
it is bound to the nucleus and possesses lower energy level.
 The outermost shell is called the valence shell and the electrons in this shell are called
valence electrons. The outermost shell in an atom cannot accommodate more than eight
electrons (exception to the 2n² rule)
 The valence electrons revolving in the outermost shell are said to be having highest energy
level. The amount of energy required to extract the valence electron from the outer shell is
very less.
 An electron which is not subjected to the force of attraction of the nucleus is called a free
electron. Such free electrons are basically responsible to the flow of current. More the
number of free electrons better is the conductivity of the material.
Energy Band Theory:
A material can be placed into insulators, conductors and semi conductors depending upon its
energy band structure. The energy band diagram consists of three bands.
1. Valence band
2. Conduction band
3. Forbidden band
Valence Band:
The valence electrons possess highest energy level. When such electrons form the covalent bands
due to the coupling between valence electrons of adjacent atom, the energy band formed due to
merging of energy levels associated with the valence electrons i.e., electrons in the last shell is
called the valence band.
Conduction Band:
Valence electrons form the covalent bond and are not free, but when certain energy is imparted to
them they become free. The energy band formed due to merging of energy levels associated with
the free electrons is called conduction band. Under normal condition, the conduction band is empty
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and once energy is imparted the valence electrons jump from valence band to conduction band and
become free.
Forbidden Band:
While jumping from valence band to conduction band the electrons have to cross an energy gap.
The energy gap which is present separating the conduction band and the valence band is called
forbidden band or forbidden gap.
Insulators:
Fig: The energy band diagram of an insulator
The valence band is fully filled and conduction band is almost empty and forbidden gap is more
approximately of about 7eV. For a diamond, the forbidden gap is about 6eV.Conduction is
impossible in insulators even by applying additional energy.
 The resistivity of insulators is of the order of 107
ohm-meter.
 Examples of the insulators are Glass, Wood, Diamond, Mica etc.
Conductors:
The energy band diagram of conductors is shown in figure. In this the valence band and the
conduction band are fully filled and there is no forbidden band. As a result the electrons in the
valence band can easily move into the conduction band to make conduction easily.
Fig: The energy band diagram of an conductor
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 The resistivity of the conductors is of the order of 10-8
ohm-meter.
 Examples of the conductors are: Copper, Aluminum etc.
Semi Conductors:
The energy band diagram of semiconductors is shown in figure below.
Fig. Energy band diagram of Semi conductors
In this the valence band is fully filled and conduction band is almost empty
and forbidden band is very small, and is about 1eV. Semi conductors are material whose
conductivity lies between conductors and insulators. The resistivity of semi conductors is
of the order of 10-4
ohm-meter.
The examples of the semiconductors are: Germanium & Silicon.
The semiconductor acts as insulators at low temperature. As the temperature is
increased, some of the valence electrons acquire thermal energy greater than EG to
overcome the forbidden band and jump into the conduction band to make the conduction
possible. Hence semiconductors have negative resistance temperature coefficient.
At 0ºK, the forbidden gap for Germanium (Ge) is
And for Silicon (Si)
The forbidden gap EG depends on temperature. It has been determined experimentally
that EG for Germanium (Ge) decreases with temperature at the rate of 2.23 x 10-4
eV/ºK
Hence for Ge, Where T is in ºK.
EG for Silicon (Si) decreases with temperature at the rate of 3.60 x 10-4
eV/ºK
Hence for Si. EG(T) = 1.21 – 3.60 x 10-4
T
At room temperature i.e., 300ºK.
For Ge : EG = 0.72eV
For Si : EG = 1.1eV
EG = 0.785eV
EG = 1.21eV
EG(T) = 0.785 – 2.23 x 10-4
T
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Problem: 1 Calculate the value of forbidden gap for Si & Ge at the temperature of 35ºC.
Soln. Forbidden gap for Si is given by EG = 1.21 – 3.6 x 10-4
T
Given T = 35ºC T = 35 + 273 = 308ºK
 EG = 1.21 – 3.6  10-4
(308)  EG = 1.099 eV
Forbidden gap for Ge is given by
EG = 0.785 – 2.23  10-4
T
 EG = 0.785 – 2.23  10-4
(308)  EG = 0.7163eV.
Classification of Semi conductor materials:
Semi conductor materials are classified into two types.
1. Intrinsic Semiconductors
2. Extrinsic Semiconductors
Intrinsic Semiconductors:
A Pure form of semiconductor material is known as intrinsic semiconductor material. When
there are four electrons in the outermost orbit, the semiconductor material is referred to as pure or
intrinsic semiconductor. In pure semi conductor, the number of holes is equal to the number of free
electrons. Even at the room temperature, some of valence electrons may acquire sufficient energy
to enter the conduction band to form free electrons. Under the influence of electric field, these
electrons constitute the electric current.
The current due to the movement of free electrons in the conduction band is an electron
current. A missing electron in the valence band leaves a vacant space there, which is known as a
hole.
Under the influence of electric field, the current due to the movement of holes in the
valence band is a hole current. Therefore, the electron as well as hole current together constitutes
the total current in an intrinsic semiconductor.
Extrinsic Semiconductors:
Doped semiconductor material is called extrinsic (impure) semiconductor.
Doping:
The process of adding small amount of impurities to the pure form of semiconductor in
order to increase the conductivity of semiconductor is knows as „doping‟.
Depending upon type of impurities, there are two types of extrinsic semiconductors.
1. N – Type 2. P – Type
N-type Semiconductor:
When a small amount of pentavalent impurity such as Arsenic, Antimony, phosphorous,
Bismuth etc is added to pure form of semiconductor then the N-type semiconductor is formed.
These pentavalent impurities are also called „donor impurities‟.
Fig: Formation of covalent bonds in N-type semiconductor.
One donor impurity atom donates one free electron in N-type material; therefore, free
electrons are majority charge carriers in N-type semiconductors, while the holes are called minority
charge carriers.
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P-type Semiconductors:
When a small amount of trivalent impurity such as Boron, Aluminium, Indium, Gallium etc
is added to pure form of semiconductor then the p-type semiconductor is formed. These trivalent
impurities are also called „acceptor impurities‟. One acceptor impurity creates one hole in a p-type
material, therefore, the holes are majority charge carriers and free electrons are minority charge
carriers in p-type semiconductors.
Fig: Formation of covalent Bonds in p-type semiconductor
Mobility:
Let us imagine a material which has many free electrons available throughout the material.
If an electric field E v/m is applied to the material, the electrons will be accelerated and the velocity
would increase. This velocity is called „drift velocity‟.
The magnitude of the drift velocity „ ‟ is proportional to the Electric field „E‟.
i.e., EE   or µ =
E

Where „µ‟ is called mobility of electrons and has the units of
sec
²
V
m
Conductivity:
If „N‟ electrons are contained in a length „L‟ of the conductor and if it takes an electron a
time „T‟ sec to travel a distance of „L‟ meters in the conductor. Then the total number of electrons
passing through any cross section of wire in unit time is
T
N
------------ (1)
Thus the total charge per second passing any point, which by definition is the current in amperes,
is I =
T
Ne
------------ (2)
The current density is defined as the current per unit area of the conducting medium, and it is
denoted by the symbol „J‟. Assuming uniform current distribution.
J =
A
I
------------ (3) Where J is in A/m²
A - is the cross sectional area of the conducting medium.
By substituting eqn. (2) in eqn. (3) we get J =
TA
Ne
------------ (4)
But T =

L
 J =
LA
Ne
------------ (5)
But LA is simply the volume containing the N electrons.
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 J =
V
Ne
------------ (6)
n =
LA
N
is the electron concentration per cubic meter.
Thus J = ne But  = µE
 J = neµE A/m² -------------- (7)
This is the general expression for current density in a given material.
The current density is related to electric field E by the relation, J =  E --------------- (8)
Where  = conductivity of the material in (  -m)-1
Comparing (7) and (8),  = neµ ---------- (9) (  -m)-1
This is the general expression for conductivity of the given material.
The resistivity  is the reciprocal of the conductivity.
  = resistivity =

1
(  -m)
Conductivity of Intrinsic Semiconductor:
In a semiconductor, there are two charged particles; one is negatively charged free
electrons having the mobility µn while the other is positively charged holes having mobility µp.
These particles move in opposite direction under the influence of electric field. But as both are of
opposite sign they constitute current in the same direction.
For the semiconductor,
n = concentration of free electrons / m³
p = concentration of holes / m³
µn = mobility of electrons in m² / v-s
µp = mobility of holes in m² / v-s
Then the current density is given by
J = Current density due to holes + Current density due to electrons
Since the electron as well as the hole current together constitutes the total current in an intrinsic
semiconductor.
 J = Jp + Jn
J = PeµpE + neµnE
J = (pµp + nµn)eE A/m²
Hence the conductivity of a semiconductor is given by
 = (pµp + nµn) e (  -m)-1
For an intrinsic semiconductor the number of holes is equal to number of free electrons.
i.e., n = p = ni = intrinsic concentration.
 J = ni (µp + µn)eE A/m²
And i = ni (µp + µn) e ( -m)-1
Where i is conductivity of an intrinsic semiconductor.
Effect of Temperature on conductivity of an Intrinsic Semiconductor:
The conductivity depends on the temperature. As the temperature increases more number of
electron – hole pairs are generated. Hence the free electron concentration and hole concentration
also increases. This tends to increase the value of intrinsic concentration ni. As ni increases,
conductivity of intrinsic semiconductor also increases.
The intrinsic concentration ni varies with temperature in accordance with the following relation.
/2 3
0
GE o KT
in A T e

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Where A0 = constant, independent of temperature.
T = Absolute temperature expressed in ºK.
EG0 = Forbidden energy gap at 0ºK.
K = Boltzman‟s constant expressed in eV/ºK
= 8.620 x 10-5
eV/ºK.
The intrinsic conductivity of Ge increases by approximately 5 percent per ºC and 7 percent per ºC
rise in temperature for silicon.
Properties of Germanium & Silicon
Property Ge Si
1. Atomic number 32 14
2. Atomic weight 72.6 28.1
3. Atoms / cm³ 4.4 x 10²² 5.0 x 10²²
4. EGO, eV at 0ºK 0.785 1.21
5. EG, eV at 300ºK 0.72 1.1
6. ni at 300ºK/ cm³ 2.5 x 1013
1.5 x 1010
7. µn, cm²/v-sec 3,800 1,300
8. µp, cm² / v-sec 1,800 500
9. Intrinsic resistivity at 300ºk (  -cm) 45 230,000
Problem: 2 Find the resistivity of an intrinsic silicon at 300ºk if intrinsic concentration of silicon at
300ºk is 1.5  1010
per cm³ while µn = 1300 cm²/v-sec and µp = 500 cm² / v-sec. Assume e = 1.6
x 10-19
C.
Soln. The given values are, ni = 1.5 x 1010
/ cm³
 ni =
10
6
1.5x10
10
/m³
= 1.5 x 1016 / m³
And µn = 1300 x 10-4
m² / v-sec
µp = 500 x 10-4
m² / v-sec
Now i = ni (µn + µp) e
= 1.5 x 1016
[1300 + 500] x 10-4
x 1.6 x 10-19
= 0.000432 ( - m)-1
 p =
i
1
=
000432.0
1
= 2314.8148  -m
Problem 3: Estimate the value of resistivity of intrinsic Germanium at 300ºk given:
Intrinsic concentration = 2.5 x 1013
cm³
Electron mobility = 3800 cm²/v-s
Hole mobility = 1800 cm² / v-s
Electron charge = 1.6 x 10-19
C.
Soln. Given values are Ni = 2.5 x 1013
/ cm³
 ni =
13
6
2.5x10
10
= 2.5 x 1019/m³
µn = 3800 cm²/v-s = 3800 x 10-4
m²/v-s
µp = 1800 cm²/v-s = 1800 x 10-4
m²/v-s
i (µn + µp) nie
= (3800 + 1800) x 1.8 x 10-19
x 10-4
x 2.5 x 1019
= 2.24 ( -m)-1
 i=
24.2
11

i
= 0.4464  -cm
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Note: The concentration „n‟ of free electrons per cubic meter of a metal is given by n =
AM
d
.
Where d = density, kg/m³
 = valence, free electrons per atom
A = atomic weight
M = weight of atom of unit atomic weight, kg
Problem from external examination.
Problem 4: Calculate the conductivity of copper having density 8.9 gm/cm³ and mobility 34.8
cm²/v-sec. Atomic weight of copper is 63.57 while it has 1 valence electron per atom. Assume M =
1.66 x 10-27
Kg.
Soln. Given values are d = 8.9 gm/cm³ =
3
6
8.9x10
10


kg/m³
 = 1 valence electron per atom
A = 63.57
M = 1.66 x 10-27
kg
And µ = 345.8 cm²/v-s = 34.8 x 10-4
m²/v-s
The concentration of free electrons per cubic meter of a metal is given by n =
AM
d
3
30
6 27
8.9x10 x1
0.08433x10
10 x63.57x1.66x10
n

 
  
The conductivity of copper is  = n e µ
 = 0.084 x 1030
x 1.6x10-19
x 34.8 x 10-4
 = 4.69 x 1030
x 10-23
 = 4.69 x 107
( -m)-1
Fermi - Dirac function:
In energy band diagram, the probability that the energy level is occupied by an electron is
given by Fermi - Dirac probability function denoted as f(E).
It is given by the expression, F (E) =   KTEE F
e /
1
1


Where K = Boltzmann‟s constant in eV/ºK (8.62 x 10-5 eV/ºK) (or) 1.38x10-23
J/ºK
T = Temperature in ºK
E = Energy level occupied by an electron in eV.
EF = Fermi level in eV.
Fermi Level:
The Fermi Level EF indicates the probability of occupancy of energy by an electron. In intrinsic
semiconductor, at absolute temp. i.e., T = 0ºk, the probability of finding an electron in the
conduction band is zero and the probability of finding a hole in the valence band is zero.
Fermi level is defined as the energy states which has a 50% probability of being filled by an
electron if no forbidden band exists. The EF for intrinsic semiconductor lie in the center of the
forbidden band i.e., EF =
2
VC EE 
EC = Lowest energy level in CB.
EV = Highest energy level in VB.
Carrier concentration in intrinsic semiconductor and Fermi Level:
To calculate the conductivity of a semiconductor, the concentration of free electrons „n‟ and the
concentration of free holes „p‟ must be known. For this purpose, the Fermi – Dirac statistics is
applied.
The number of conduction electrons per cubic meter whose energies lies between E and E +
dE is given by dn = N (E) f (E) dE ………….. (1)
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Where N(E) is the density of states, given by N(E) =  E½
………….(2), assuming the bottom of the
conduction band is at zero potential.
N (E)  no. of states per electron volt per cubic meter
Where  = constant 3
4
h

    2
3
2m (1.6 x 10-19)3/2 = 6.82 x 1027
The dimensions of  are (m-3
) (eV)-3/2
M  mass of the electron in Kg
h x  Planck‟s constant in Joule – sec
f(E)  is the Fermi function given by
f(E) = KTEE F
e /)(
1
1


………………………. (3)
At room temperature KT  0.03 eV, so that f(E) = 0 if E – EF >> 0.03 and
f(E) = 1 if E – EF << 0.03.
The concentration of electrons in the conduction band is n = 

CE
dEEfEN )()( ………………… (4)
In a semiconductor, the lowest energy in the conduction band is EC then
N(E) =   2/1
CEE  ……………. (5)
For E EC, E – EF >> KT and eqn. (3) reduces to
KTEE F
eEf /)(
)( 
 …………….. (6)
 Substituting eqns. (5) & (6) in eqn. (4), we get
n =     KTEE
E
F
C
eEQE /2
1 

  dE
   
dEe
KT
EE
KTn
C
FCC
E
KTEEEEC








 
 /)
2
1
2
1
.
=      
dEe
KT
EE
KT KTEEeKTEE
E
C FCC
C
/./
2
1
2
1
. 


 




 

=      
E.. /
2
1
/2
1
de
KT
EE
eKT KTEE
E
CKTEE C
C
FC 


 




 

Put x
KT
EE C


or dx =
KT
dE
 dE = KT dx
When E = EC  x = 0
E =   x = 
   
 



0
2
1
/2
1
... dxKTexeKTn xKTEE FC

=    



0
2
1
/2
3
.. dxexeKT xKTEE FC

=    









 
 KTEE FC
eKT /2
3
.
  KTEE
C
FC
eNn /
 ……………… (7)
Where NC =  


 .2
3
KT
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This expression is the concentration of electrons in conduction band.
The concentration of holes in the valence band is P =    
VE
dEEfEN ………………….. (8)
When the maximum energy in the valence band is EV, the density of states is given by
N(E) =   2
1
EEV  …………………… (9)
The Fermi function of a hole is [1 – f(E)] and is given by 1 – f(E) = 1 -   KTEE F
e /
1
1


………… (10)
For E  EV, E – EF << KT eqn. (10) reduces to 1 – f(E) =
  KTEE F
e /
…………….. (11)
 Substituting eqns. (9) & (11) in eqn. (8) we get P =     dEEfEN
VE

1
 P =    
 

VE
KT
V eEE /E-E2
1
F
 dE
=    
dEe
KT
EE
KT KTEEEE
E
V VFV
V
/
2
1
2
1
. 

 




 

=      
dEeKTe
KT
EE
KT KTEEEE
E
V VFV
V
/
2
1
2
1
./. 

 




 

Let    dxKTdExKTEEx
KT
EE
V
V


When E = -   x =  E = EV  x = 0
   
 dxKTexeKTp xKTEE FV



0
2
1
/2
1
..
=    



0
2
1
/2
3
. dxexeKT xKTEE FV
 =    









 
 KTEE FV
eKT /2
3
  KT
V eNP /E-E FV
 ………………………….. (12)
Where  



 2
3
KTNV
Therefore eqn. (12) is the expression for the concentration of holes in valence band.
Note: NC : Effective density of states in conduction band.
NV : Effective density of states in valence band
Fig. Band structure of Intrinsic semiconductor Fig. Fermi-Dirac prob. function f(E).
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The Fermi level in the center of the forbidden gap indicates equal concentration of free electrons
and holes.
Fermi level in Intrinsic Semiconductors:
The concentration of electrons in conduction band is given by
 /FCE E KT
Cn N e


The concentration of holes in valence band is given by
 /F VE E KT
VP N e


In pure intrinsic semiconductor, n = p = ni
   / /FC F VE E KT E E KT
VCN e N e
   
 
( )/
( )/
FC
FC
E E KT
E E KT
N eC
N eV
 

 
 2V FCE E E KTC
V
N
e
N
 

KT
EEE
N
N
n FCV
V
C 2






 








V
CVC
F
N
N
n
KTEE
E 
22
If effective masses of electron and hole are same then NC = NV
2
VC
F
EE
E


This expression proves that the Fermi level lies in the center of the forbidden energy band.
Mass – Action Law:
Under thermal equilibrium, for any semiconductor the product of number of hole
concentration and number of electron concentration is constant and is independent of the amount
of donar and acceptor impurity doping
i.e.,
2
inp n
Where n is the concentration of free electrons, p is the concentration of the holes and ni is the
intrinsic concentration.
The above relation is called Mass – Action Law.
Intrinsic Concentration:
The concentration of electrons in the conduction band of a semiconductor is given by
 /FCE E KT
Cn N e
 
 ………………….(1)
The concentration of holes in the valence band of a semiconductor is given by
 /F VE E KT
Vp N e
  
 …………………(2)
Taking the product of equations (1) & (2),
 /VCE E KT
VCnp N N e
 

/GE KT
VCnp N N e
  …………… (3)
Where EG = EC – EV = Energy Gap
According to the Mass – Action Law,
2
innp  …………….. (4)
Hence,
 /2 GE KT
i VCn N N e

 ………… (5)
But  



 2
3
KTNN VC
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And   2
3
2
³h
4
me

 
 


 2
3
2
³h
4
meKTNN VC
  KTemeKTn GE
i /.2
³h
4 3
2
2 









/2 3
0
GOE KT
in A T e
 
Where A0 = a constant, independent of temperature.
T = temperature in ºK
EGO = Forbidden energy gap at 0ºk in eV.
K = Boltzmann constant in (eV/ºK).
Carrier concentration in Extrinsic Semiconductors:
In extrinsic semiconductors, the electron and hole concentration are related by
1. Mass – action law
2. Law of electrical neutrality.
Law of Electrical Neutrality:
Let ND be the concentration of donar atoms is the positive charge per cubic meter contributed by
the donar ions.
Let NA be the concentration of acceptor atoms is the negative charge per cubic meter contributed
by the acceptor ions.
Let n and p be the concentrations of free electrons and holes respectively.
A semiconductor is to be electrically neutral i.e., the magnitude of positive charge
concentration is equal to the magnitude of negative charge concentration.
nNpN AD 
N-type:
Let us consider an N-type semiconductor with no acceptor doping i.e., NA = 0. In such a
material, the concentration of electron „n‟ is much greater than the concentration of holes „p‟.
i.e., n >> p Dn Nn 
From Mass – action law, nn pn = ni
2
D
i
n
i
n
N
n
n
n
P
22

 For N-type semiconductor, nn = ND
2
i
n
D
n
P
N

P-type
Let us consider an p-type semiconductor with no donar doping i.e., ND = 0. In such a
material, the concentration of hole p is much greater than the concentration of electrons „n‟.
i.e., p > > n AP Np 
From Mass – action law, np pp = ni
2
A
i
p
i
p
N
n
p
n
n
22

 For p-type semiconductor, pP = NA
A
i
p
N
n
n
2

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Conductivity of Extrinsic Semiconductor:
N-type
The conductivity of N-type material can be expressed as  eµpµn pnnnn 
But Pn << nn, as holes are minority carriers. Hence eµn nnn 
But for N-type, nn  ND eµN nDn  
P-type
The conductivity of P-type material can be expressed as  eµpµn ppnpp 
But pp >> np, as electrons are minority carriers. Hence eµp ppp 
But for P-type, pp  NA  eµN pAp 
Problem5:
Find the concentration (densities) of holes and electrons in N-type silicon at 300ºK, if the
conductivity is 300 S/cm. Also find these values for P-type silicon. Given that for silicon at 300ºK,
ni = 1.5 x 1010 / cm³, µn = 1300 cm² / v – s and µp = 500 cm²/v-s.
Soln.
a) Concentration in N-type silicon
The conductivity of an N-type silicon is qnµn
Concentration of electrons, n =
nqµ

  
18 3
19
300
1.442 10
1.6 10 1300
n cm

  

Hence concentration of holes, p =
n
ni
2
P =
 
2
10
2 3
18
1.5 10
1.56 10
1.442 10
cm

 

b) Concentration in p-type silicon
The conductivity of a p-type silicon is qpµp
Hence, Concentration of holes, p =
pqµ

  
18 3
19
300
3.75 10
1.6 10 500
p cm

  

Hence, concentration of electrons, n =
p
ni
2
n =
 
2
10
2 3
18
1.5 10
0.6 10 .
3.75 10
cm

 

From Previous external examination:
Problem 6: Find the concentration of holes and electrons in a p-type silicon at 300ºK, assuming
resistivity as 0.02  - cm. Assume µp = 475 m² / v-s, ni = 1.45 x 1010
/ cm3
.
Soln.
Given  =0.02  - cm µp = 475 m²/v-s ni = 1.45 x 1010
/ cm³
Conductivity of p-type silicon is
1


 =   1
50
02.0
1 
 cm
Concentration of holes, p =
pµq

 p = 475
106.1
50
19
x
x 
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From Mass – action law, np =
2
in
p
n
n i
2

 n 1.4610-3
 Concentration of electrons, n =1.4610-3
cm-3
Problem7:
Determine the resistivity of germanium
a) in intrinsic at 300ºK b) with donar impurity of 1 in 107
c) with acceptor impurity of 1 in 108
given that for Ge at room temperature, ni = 2.5 x 1013 cm-3, µn = 3800 cm²/v-sec,
µp = 1800 cm² / v-sec and a number of Ge atoms / cm³ = 4.4 x 1022
Soln:
a) Conductivity  pnii µµen 
 13 19
2.5 10 1.6 10 3800 1800i 
     
  1
/0224.0

 cmi
 Resistivity = .64.44
1
cm
i


b) Number of Ge atoms / cm³ = 4.4  1022
ND =
22
7
4.4 10
10

=4.4  1015
cm-3
n  ND   = n e µn
  = 4.4  1015
 1.6  10-19
 3800
 = 2.675   1
 cm
Resistivity =

1
= 0.374  -cm
c) NA = 4.4 1022
/108
= 4.4  1014
cm-3
P  NA   = P e µp   = 4.4  1014
 1.6  10-19
 1800
  = 0.1267   1
 cm
Resistivity =

1
= 7.89  -cm
Fermi Level in N-type semiconductor:
In a N-type semiconductor, there is increase in the number of electrons in the conduction band due
to donar impurity. As a result the Fermi level is raised closer to the conduction band.
For N – type, n = ND.
The concentration of electrons in conduction band is
  KTEE
C
FC
eNn /

  KTEE
CD
FC
eNN /

  KTEEE
D
C FC
N
N /)

Taking natural logarithm on both sides,
KT
EE
N
N
n FC
D
C 








D
C
CF
N
N
nKTEE 
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Fig. Position of Fermi-level in N-type semiconductor
Fermi-Level in p-type semiconductor:
In a p-type semiconductor, there is decrease in the number of electrons in the conduction
band due to the acceptor impurity. As a result the Fermi-Level is lowered closer to the valence
band and is shown in figure.
For P-type, p = NA
 The concentration of holes in valence band is
  KTEE
V
VF
eNP /

  KTEE
VA
VF
eNN /

  KTEE
A
V VF
e
N
N /

Taking natural logarithm on both sides,
KT
EE
N
N
n VF
A
V 








A
V
VF
N
N
nKTEE 
Fig. Position of Fermi-level in p-type semiconductor.
Hall Effect:
When a specimen (metal or semi conductor) carrying a current I is placed in a transverse
magnetic field B, then an electric field E is induced in the direction perpendicular to both I and B.
This Phenomenon is called “Hall Effect”.
The Hall Effect may be used for
(i) Whether a semiconductor is N-type or p-type
(ii) Finding the carrier concentration.
(iii) In calculating the mobility µ by measuring the conductivity .
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The figure shows a semiconductor bar carrying a current I in the positive x direction. Let a
magnetic field B is applied in the +ve Z direction. Now a force is exerted on the charge carriers
(whether electrons or holes) in the –ve Y direction. Due to this force, charge carriers are pressed
downwards towards face 1. For example, in N-type specimen, the charge carriers are electrons
which are accumulated on face 1. So face 1 becomes negatively charged w.r.t face 2 therefore a
potential difference VH is developed between surfaces 1 and 2 which is called as „Hall voltage‟. The
polarity of the Hall voltage enables us to determine experimentally whether the semiconductor is N-
type or P-type.
In equilibrium state, the electric field intensity E due to Hall effect must exert a force on the carrier
which just balances the magnetic force i.e., eE = Be ………. (1)
But E =
d
VH
or VH = ED
 VH = B d ……… (2)
Where d = distance between face 1 and face 2
We known J = 

wd
I
A
wd
I

  ………….. (3)
Where  = charge density
W = width of the specimen
From equations, (2) & (3) VH = B d
wd
I







=
w
BI

VH =
w
BI

………… (4)
The quantities VH, B, I and w can be measured for specimen. Therefore  can be measured.
Hall coefficient is defined as RH =
BI
wVH


1
………(5)
But  =  µ …………. (6)
If both  and RH are measured then µ can be measured by
µ = HR …………. (7)
This equation is derived by considering that all charge carriers move with mean drift velocity  .
Considering a random thermal distribution in speed, the above eqn. (7) is modified as
µ = HR.
3
8


…………(8)
Importance of Hall Effect:
The Hall Effect gives the following information.
1. It gives the information regarding semiconductor type (whether p-type or N-type) or
regarding the sign of charge carriers (holes or electrons).
2. To measure semiconductor parameters like electron or hole concentration and mobility.
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3. It gives information whether the given material is metal, insulator or semiconductor.
4. It can be used to measure magnetic flux density.
5. It can be used to measure the power in an e.m. wave.
Problem:
An electric field of 200 v/m is applied to a sample of N-type semiconductor whose Hall coefficient
is 0.0145 m²/C. Calculate the current density in the sample assuming µe = 0.36cm²/v-s.
Soln. The Hall coefficient is given by RH =
ne
1
or n =
eRH .

 n = 19
1
0.0145 1.6 10
 
= 4.310  1020
m-3
.
The current density J is given by J = E = n e µeE
= (4.31  1020
) (1.6  10-19
) (0.36) (200)
= 4.965 x 10³
 J = 4965 A/m³
Problem:
A n-type silicon bar whose resistivity is 1000  m and width 1 cm is used in the Hall effect
experiment. If the current in the bar is 10µA and the Hall voltage is 40mV, what is the intensity B
of the applied magnetic field? Assume µn = 1300 cm²/v-s.
Soln. µ = µn = 1300 cm²/v-s = 1300 x 10-4
m²/v-s
w = 1cm = 1 x 10-2
m, I = 10µA, VH = 40mv and resistivity = 1000  - m
We know, µ =
BI
WVH
 ( µ =  RH)
3 2
4
6
1 40 10 1 10
1300 10
1000 10 10B
 


  
   
 
0.3077 / ²B wb m
Drift and Diffusion Currents:
The flow of current through a semiconductor material are of two types namely drift and
diffusion.
Drift current:
When an electric field is applied across the semi conductor material, the charge carriers
attain a certain drift velocity d , which is equal to the product of the mobility of the charge carriers
and the applied electric field intensity, E. The holes move towards the negative terminal of the
battery and electrons move to wards the positive terminal.
This combined effect of movement of the charge carriers constitute a current known as the
drift current.
Thus “the drift current is defined as the flow of electric current due to the motion of the
charge carriers under the influence of an external electric field”.
The equation for the drift current density, Jn, due to free electrons is given by
J q n nE A / cm²n 
And the drift current density, Jp, due to holes is given by
J q p p E A/ cm²p 
Where n = no. of free electrons per cm³
p = no. of holes per cm³
µn = mobility of electrons in cm²/v-s
µp = mobility of holes in cm²/v-s
E = applied electric field intensity in V / cm
q = charge of an electron = 1.6x10-19
C
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Diffusion current:
It is possible for an electric current to flow in a semi conductor even in the absence of the
applied voltage provided a concentration gradient exists in the material.
A concentration gradient exists in the no. of either electrons or holes is greater in one
region of a semi conductor as compared to the rest of the region.
In a semiconductor material, the charge carriers have the tendency to move from the
region of higher concentration to that of lower concentration of the same type of charge carriers.
Thus, the movement of chare carriers takes place resulting in a current called “diffusion
current”. The diffusion current depends on the material of the semiconductor, type of charge
carriers and the concentration gradient.
Diffusion current density due to holes, Jp, is given by J q D . A / cm²p p
dp
dx
 
Diffusion current density due to the free electrons, Jn, is given by
dn
J q Dn A / cm²n dx

Where dn/dx and dp/dx are the concentration gradients for electrons and holes
respectively, in the x – direction and Dn and Dp are the diffusion coefficients expressed in cm²/sec
for electrons and holes respectively.
The dp/dx is negative (since p(x) decreases with increasing x) and the minus sign in the
above equation is needed in order that Jp has a positive sign in the positive x-direction.
Total current: The total current in semi conductor is the sum of drift current and the diffusion
current. Therefore, for a p-type semiconductor, the total current per unit area, i.e., the total
current density is given by J q p p E q Dpp
dp
µ
dx
  . Similarly, the total current for an n-
type semiconductor is given by
dn
J q n n E q Dnn dx
µ 
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Einstein relationship for semiconductor:
There exists a definite relation ship between mobility and diffusion coefficient of a particular
type of charge carrier in the same semiconductor.
The higher the value of mobility of a charge carrier, the greater will be its tendency to
diffuse. The equation which relates the mobility µ and the diffusion coefficient D is known as the
Einstein relationship.
The Einstein relationship is expressed as
D Dn KTp
V
Tn qpµ µ
  
The importance of Einstein relationship is that it can be used to determine Dp(or Dn), if the
mobility of holes(or electrons) is measured experimentally.
For an intrinsic Silicon, Dp = 13 cm²/s and Dn = 34 cm²/s
For an intrinsic Germanium, Dp = 47 cm²/s and Dn = 99 cm²/s
Diffusion length (L):
The average distance that an excess charge carrier can diffuse during its life time is called
the diffusion length L, which is given by
L D τ → a finite life time
Where D is the diffusion coefficient that may be related to the drift mobility, µ, through the
Einstein relation is
KT
D µ
q

Generation and recombination of charges:
In a pure semiconductor, the number of holes is equal to the number of free electrons. Due
to thermal agitation, new electron-hole pairs are generated. Simultaneously, other hole – electron
pair disappear as a result of recombination i.e, free electrons falling into empty covalent bonds.
On an average, a hole exists for τp seconds known as the „mean life time of hole‟ and
similarly an electron exists for τn seconds known as the „mean life time of electron‟.
Carrier life time:
The carrier life time is defined as the time for which, on an average, a charge carrier will
exist before recombination with a carrier of opposite charge. Its value varies from nanoseconds to
hundreds of microseconds and depends on temperature and impurity concentration in the
semiconductor. Gold is extensively used as recombination agent by the manufacturer of
semiconductor devices.
Let the thermal equilibrium concentration of holes and electrons be PO and nO respectively
Fig. The hole concentration in n-type semiconductor bar as a function of time due to carrier
generation and recombination
Assume that at t=t¹, the specimen is illuminated. Now the additional electron-hole pairs are
generated uniformly through out the medium. This causes the concentration of holes and
electrons to increase from PO and nO to new values p and respectively.
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The excess concentration of electrons is n - nO and excess concentration of holes is p - PO.
Therefore p - PO = n - nO ……………………… (1)
Now Increase in hole concentration per second due to thermal generation= g
Decrease in hole concentration per second due to recombination =
p
p
,
where τp =mean life time of hole.
The time rate of increase of hole concentration per second = dp/dt
Thus
dp
g r
dt
 
P pdp
p
o
dt 

 ………………………. (2)
Under steady state condition dp/dt = 0; the hole concentration P reaches the thermal
equilibrium value PO i.e.,
P Po og 0 g
p p 
    ………………….. (3)
Therefore from (2) and (3),
P pdp
p
o
dt 

 ………………….. (4)
Similarly for p-type semiconductor,
n
n ndn o
dt 

 ………………….. (5)
Continuity equation:
The fundamental law governing the flow of charge is called the continuity equation. The carrier
concentration in the body of a semiconductor is function of time and distance. Mathematically, a
partial differential equation governs this functional relation between carrier concentration, time and
distance. Such an equation is called “continuity equation”. The equation is based on the fact that
charge can neither be created nor be destroyed.
Consider an infinitesimal element of volume of area A and length dx as shown in fig. below
Let p be the average hole concentration with in this volume.
The current entering the volume at x is Ip and living at x+dx is Ip+dIp. This change in current is
because of diffusion.
Now, due to diffusion the concentration of charge carriers decreases exponentially with the
distance.
Hence, dIp = Number of coulombs per second decreased with in the volume. ……….. (1)
Now if τp is mean life time of the hole, then p/τp = holes per second lost by recombination per unit
volume.
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Due to the recombination, no. of coulombs per second decreased with in the given volume is,
(Charge on hole) *(holes/sec per unit volume)*(volume)
= qxp/ τp x(Adx) = q A dx p/ τp ………….. (2)
While let „g‟ be the rate at which electron hole pair are generated by thermal generation per unit
volume.
Due to the generation, no. of coulombs per second increased within the volume is,
(Charge on hole) x (rate of generation) x (volume)
= q x g x (Adx) = q Adx g …………… (3)
Thus the total change in the no. of coulombs per second is because of factors as indicated by
equations(1), (2) & (3)
The total change in the holes per unit per second is dp/dt.
Hence total change in coulombs per second within the given volume
= q dp/dt (volume) = q Adx dp/dt …………..(4)
According to law of conservation of charges,
dp
q A dx q Adx q Adx g dI
p
P
dt 
   
dp P
- g –
dt p q A dx
dI

   ………………. (5)
But
I
J dI AdJ
A
  
Therefore
P 1 dJ
g
p q dx
dp
dt 
    ……………… (6)
The total current density J is due to drift and diffusion current
Therefore
dp
J q Dp p q Epdx
µ   ……………… (7)
If the semiconductor is in thermal equilibrium and subjected to no external electric field then hole
density will attain a constant value Po. Under this condition I = 0 i.e., J = 0 and dp/dt = 0 due to
the equilibrium.
Using in (6),
P Po o0 g – 0 g
p p 
     ………………. (8)
The equation (8) indicates the thermal equilibrium i.e., the rate at which holes are thermally
generated just equal to the rate at which holes are lost due to the recombination.
Using (7) and (8) in (6),
Pdp P 1o -
p p
d dP
qD pq Ep pdt q dx dx

 
 
  
    
 
2
P-Pdp o +
2p
d d pEPDp pdt dxdx


   ……………… (9)
This is called equation of conversation of charge or the continuity equation.
The continuity equation for the holes in N-type material is
   P P P EP ²Pn no nn nDp pt x² xp
µ

 
 
 
  
   
  
The continuity equation for the electrons in P-type material is
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   n n n En ²np po pp p
Dn nt x² xn
µ

 
 
 
 
  
   
  
Special cases:
(i) Concentration independent of distance and E=0.
 P PdP n non
dt p

 

t p
P P K en no
 
 
 

  where K =constant, τp is the mean life time and also
time constant of the above equation.
(ii) Concentration independent of time and E = 0
 P EP nn 0 & 0p n
µ
t

 
 
 Pn Pno d²Pn0 Dp
dx²p

  
P Pd²P n non , But D Lp p pdx² Dp p



 
The solution of above equation is
P P K e K en no 1 2
x L x Lp p
  
(iii) Concentration varies sinusoid ally with time and E=0.
    jwt
P x,t P x en n
 
   P x,t d²P x,tn nj P x,t Dn p dx²p


   
 
jd²P p 2n 1 P But D Ln p p pdx² Dp p



 
 
  
   
jd²P pn 1 Pndx² L
P
 
 
  
  
When ω=0 then solution is same as that in case (ii)
When ω=0 then solution is obtain from dc solution by replacing Lp by
Lp
1 j p
.
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UNIT – II
SEMICONDUCTOR DIODE CHARACTERISTICS
SYLLABUS
SEMICONDUCTOR DIODE CHARACTERISTICS: Qualitative theory of the p-n Junction, the p-n junction as a
diode, band structure of an open circuited p-n junction, the current components in a p-n diode, quantitative
theory of the p-n diode currents, the volt ampere characteristics, the temperature dependence of V-I
characteristics, diode resistance, ideal versus practical diodes, diode equivalent circuits, space charge or
transition capacitance CT, diffusion capacitance, breakdown mechanism in diode, Zener diode, V-I
characteristics of Zener diode.
<,
LECTURE PLAN
S.
No.
Topics to be covered
No. of
Periods
1 Qualitative theory of the p-n Junction, the p-n junction as a diode 1
2
Construction of PN Junction, Operation of PN Junction diode in Forward Bias
and Reverse Bias
1
3
PN Junction Energy Band Diagram under open circuited, forward bias and
reverse bias conditions.
1
4 Current components in PN Junction diode (Drift and Diffusion Currents) 2
5 Law of Junction and Diode Current Equation 2
6
V - I Characteristics of PN Diode, Temperature Dependence of V - I
Characteristics, Simple Problems
2
7
Construction Types of PN Junctions, Transition capacitance in grown and
alloy junctions
1
8 diffusion capacitance 1
9
breakdown mechanism in diode, Zener diode, V-I characteristics of Zener
diode
1
TOTAL 12
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Qualitative Theory of PN- Junction:
If donor impurities are introduced into one side and acceptors into the other side of a single
crystal of a semiconductor, a pn-junction is formed.
The donor ion is indicated schematically by a „+‟ sign because, after this impurity atoms
donates an electron, it becomes a positive ion.
The acceptor ion is indicated by a „-„sign because, after this atom accepts an electron, it
becomes a negative ion.
Initially, there are nominally only p-type carriers to the left of the junction and only n-type
carriers to the right.
Because there is a density gradient across the junction, holes will diffuse to the right across
the junction, and electrons to the left.
Due to diffusion some of the holes from the p-region enter the n-region, they find the
number of donor atoms.
The holes recombine with the donor atoms. As donor accepts additional holes, they become
positively charged immobile ions. This happens immediately when holes across the junction hence
number of positively charged immobile ions get formed near the junction on n-type.
Atoms on p-side are acceptor atoms. The electrons diffusing from n-side to p-side
recombine with the acceptor atoms on p-side. As acceptor atoms accept the additional electrons,
they become negatively charged immobile ions. Such large numbers of negatively charged
immobile ions get formed near the junction on p-side.
The formation of immobile ions near the junction is shown in figure (a).
The electric charges are confined to the neighborhood of the junction, and consist of
immobile ions.
The general shape of the charge distribution is illustrated in figure (b).
Since the region of the junction is depleted of mobile charges, it is called the depletion
transition region. The thickness of this region is the order of 10-4
cm (=10-6
m=1micron).
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Fig. A schematic diagram of a pn-junction including the charge density, electric field
intensity, and potential energy barriers at the junction.
Near the junction, on one side there are many positive charges and on other side there are
many negative charges. According to coulomb‟s law, there exists a force between these opposite
charges.
And this force produces an electric field between the charges. This electric field is
responsible to produce potential difference across the junction, which is called barrier potential.
The electric field intensity in the neighboring of the junction is indicated in figure (c)
,
And this curve is the integral of the density function shown in fig (b).
The electrostatic potential variation in the depletion region for holes is shown in figure (d)
and is the negative integral of the function E of figure (c). This variation constitutes a potential
energy barrier against the further diffusion of holes across the barrier.
The potential energy barrier against the flow of electrons from the n-side across the
junction is shown in figure (e).
It is similar to that shown figure (d), except that it is inverted since the charge on electron
is negative.
Barrier potential:
Barrier potential indicates the amount of voltage, to be allied across the pn-junction to
restart the flow of electrons and holes across the junction.
The barrier potential is also called junction potential or built in potential barrier or contact
potential or diffusion potential.
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The barrier potential is expressed in volts. Its value is called height of the barrier. It is
denoted as Vo or Vb.
The magnitude of the barrier potential varies with doping levels and temperature.
The potential barrier can be increased (or) decreased by applying an external voltage.
The barrier potential is approximately 0.7V for silicon and 0.3V for germanium, at 25O
C.
The barrier potential of pn-junction mainly depends on the following factors
1) The type of semiconductor used.
2) The concentration of acceptor impurity on p-side.
3) The concentration of donor impurity on n-side.
4) The intrinsic concentration of basic semiconductor.
5) The temperature.
Energy band structure of an open-circuited pn- junction:
The energy band diagram for a pn-junction under open-circuit condition is shown in figure
below.
As pn-junction is formed by placing p and n-type materials in close physical contact at the
junction on an atomic scale. Hence the energy band diagrams of these two regions undergo relative
shift to make the Fermi level constant throughout the specimen at equilibrium.
In the energy band diagram for a pn-junction shown in figure, the Fermi level EF is closer to
the conduction band edge Ecn in the n-type material, and it is closer to the valence band edge Evp
in the p-type material.
The conduction band edge Ecp in the p –type material Ecn in the n-type material.
Similarly, the valence band edge Evp in the p-type material is higher than the valence band
edge Evn in the n-type material.
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Fig. Energy Band Structure of an open-circuited PN - Junction
E1 and E2 in the figure indicate the shifts in the Fermi level from the intrinsic conditions in
the p and n type materials respectively.
Then the total shift in the energy level Eo is given by
E E E Ec Ec Ev Evo p n p n1 2
      ……………………………… (1)
This energy Eo (in eV) is the pn-junction and is equal to qVo, where Vo is the contact potential
(in volts) or the barrier potential.
The contact potential:
From figure, we have
E
GE Ev EpF 12
   ……………… (2)
and
E
GE E Ecn F 22
   ……………… (3)
Adding equations (2) & (3), we obtain
   E E E E – E E E Evo cn pF F1 2 G      ………………. (4)
From mass Action law, we have
2n n
p i

–E /KT2 Gn N N evci
 
N NvcE KT ln
G 2n
i
 
 
  
 
  ………………. (5)
We know that for an n-type material
E E KTcn Fn N ec
 
 
 
 

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E E KTcn FN N e
D c
 
 
 
 
   n N
D
Q
NcE - E KT lncn F N
D
 
 
 
 
  …………….. (6)
Similarly for a p-type material
E Ev KTpFP N ev
 
 
 
 

E Ev KTpFN N evA
 
  
 
 
   P N
A
Q
NvE Ev KT lnpF N
A
 
 
 
 
  ……………. (7)
Substituting equations (5), (6) & (7) in equation (4) we get
N NNcNv c vE KT ln KT ln – KT lno 2 Nn Di
N
A
    
    
           
 
. .
N NNcNv c vE KT lno 2 Nn Di
N
A
 
 
  
 
 
N
DE KT lno 2n
i
N
A
 
 
  
 
  ..…………… (8)
As Eo =qVo, therefore the barrier voltage Vo is given by
NKT DV lno 2n
i
N
A
q
 
 
  
 
 ……………. (9)
An alternative expression for Eo may be obtained by substituting the equations of
nn =ND, Pn= ni
2
/NA
and PP = NA , np= ni
2
/NA in equation (8)
P Npo noE KT ln KT lno P Nno po
  
  
      
 
Where the subscript „o‟ are added to the concentrations to indicate that these are obtained
under conditions of thermal equilibrium.
The PN-junction as a Diode:
The essential electrical characteristic of a pn-junction is that it constitutes a diode which
permits the easy flow of current in one direction but restrains the flow in opposite direction.
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Working of a Diode:
In order to consider the working of a diode we shall consider the effect of forward bias and
reverse bias across the pn-junction.
Diode symbol:
The diode symbol is shown in figure below.
Anode Cathode
The p-type and n-type regions are referred to as anode and cathode respectively.
When the diode is forward biased, the arrow head shows the conventional direction of
current flow i.e, the direction in which the hole flow takes place.
1) PN- junction with forward bias:
When the positive terminal of the battery is connected to the p-type and the negative
terminal to the n-type of the pn-unction diode, then the bias is said to be forward bias.
A pn-junction with forward bias is shown in figure below:
When the pn-junction is forward biased, as long as applied voltage is less than the barrier
potential, there cannot be any conduction.
When the applied voltage becomes more than the barrier potential, the negative terminal of
the battery pushes the free electrons against barrier potential from n to p region.
Similarly positive terminal pushes the holes from p to n region. Thus holes get repelled by
the positive terminal and across the junction against the barrier potential, electrons gets repelled
from the negative terminal and across the junction against the barrier potential. Thus the applied
voltage overcomes the barrier potential. This reduces the width of the depletion region.
As forward voltage is increased, at a particular value the depletion region becomes very
much narrow such that large number of majority charge carriers can cross the junction and these
majority carriers can travel around the closed circuit and constitute a current called forward
current. The forward potential at which the potential barrier across the junction is completely
eliminated and allows the current to flow through the junction is called cut-in voltage or threshold
voltage of pn-junction diode. The cut-in voltage is 0.3v and 0.7v for germanium and silicon diodes
respectively.
2) PN-junction with reverse bias:
When the positive terminal of the battery is connected to the n-type and the negative
terminal to the p-type of the pn-junction diode, then bias is said to reverse bias.
A pn-junction with reverse bias is shown in figure below.
When the pn-junction is reverse biased the negative terminal attracts the holes in the p-
region, away from junction. The positive terminal attracts the free electrons in the n-region away
from the junction No charge carriers is available to cross the junction. As electron and holes both
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move away from the junction, the depletion region widens. This creates more positive ions and
hence more negative charge in the n-region.
As depletion region widens, barrier potential across the junction also increases.
The polarities of barrier potential are same as that of the applied voltage. Due to increased
barrier potential, the positive side drags the electrons from p-region towards the electrons from p-
region towards the positive of battery. Similarly negative side of the barrier potential drags the
holes from n-region towards the negative of battery. The electrons on p-side and holes on n-side
are minority charge carriers, which constitute the current in reverse biased condition. Thus reverse
condition takes place.
The reverse current flows due to minority charge carriers which are small in number. Hence
reverse current is always very small. The generation of minority charge carriers depends on the
temperature and not on the applied reverse bias voltage. Thus the reverse current depends on the
temperature. i.e, thermal generation and not on the reverse voltage applied.
For a constant temperature, the reverse current is almost constant through reverse voltage
is increased upto a certain limit. Hence it is called reverse saturation current and denoted as Io.
Reverse saturation current is very small of the order of few microamperes for germanium
and few microamperes for silicon pn-junction diodes.
The current components in a PN - diode:
In a forward bias condition, holes get diffused into n-side from p-side while electrons get
diffused into p-side from n-side. So on p-side, the current carried by electrons which is the diffusion
current due to minority carriers decreases exponentially with respect to distance measured from
the junction. This current due to electrons on p-side which are minority carriers is denoted as Inp.
Similarly holes from p-side diffuse into n-side carry current which decreases exponentially
with respect to distance measured from the junction. This current due to holes on n-side, which are
minority carriers is denoted as Ipn.
If distance is denoted by x, then
Inp (x) = current due to electrons in p-side as a function of x,
Ipn (x) = current due to holes in n-side as a function of x.
At the junction i.e, at x=0, electrons crossing from n-side to p-side constitute a current Inp
(o) in the same direction as holes crossing the junction from p-side to n-side constitute a current
Ipn (o).
Hence the current at the junction is the total conventional current I flowing through the
circuit.
I = Ipn (0) + Inp (0)
But the entire circuit is a series circuit, the total current must be maintained at I
independent of x. This indicates that on p-side there exists one more current component which is
due to holes on p-side, which are majority carriers and it is denoted by Ipp (x).
Inn(x) = current due to electrons in n-side.
Therefore,
On p-side, I = Ipp(x) + Inp(x)
On n-side,I =Inn(x) +Ipn(x)
These current components are plotted as a function of distance shows in figure below.
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Therefore sum of currents carried by electrons and holes at any point inside the diode is always
constant, equal to total forward current I.
The law of Junction:
If the hole concentrations at the edges of the space-charge region are Pp and Pn in the p
and n materials respectively, and if the barrier potential across this depletion layer is Vb, then
V V
B TP P ep n …………………. (1)
This is Boltzmann relation of kinetic gas theory.
For an open circuited pn-junction
P P , P P & V Vp po n no oB
   (Vo is the contact potential)
Substituting the above values in eqn,(1),we get
V /Vo TP P epo no …………………. (2)
Consider a forward biased junction with an applied voltage V, then the barrier voltage Vb is
decreased from its equilibrium value Vo by the amount V (or) Vb = Vo-V.
The hole concentration throughout the p-region is constant and equal to the thermal
equilibrium value (or) Pp = Ppo.
The hole concentration varies with distance into the n-side.
At the edge of depletion layer, x=0; Pn =Pn(o)
The boltzmann relation is, for this case
 0
Vo V /V
TP P epo n
 
 
 

 ………………….. (3)
Combining equations (2) & (3), we get
 0
V /V V V /Vo oT TP e P eno n
 
 
 


 0
V/V
TP P . en no  …………………… (4)
This boundary condition is called the law of junction.
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Similarly the electron concentration on p-side,
 0
V/V
Tn n . ep po ………………. (5)
The above equation (4) indicates that the hole concentration Pn(0) at the junction under
forward biased condition is greater than its thermal equilibrium value Pno.
Diode current Equation:
From the law of junction, we have
 0
V/V
TP P . en no ..……………… (1)
Where Pno = hole concentration at the edge of the space charge region in n-type material
under open circuited condition.
Pn(O) = hole concentration at the edge of the depletion region in n-type material under
forward biased condition.
The difference between two concentrations at the junction under biased and unbiased
condition is called injected or excess concentration denoted as Pn(0).
   P P Pn n no0 0  …………………. (2)
Using eqn (1) in eqn (2),
 0
V/V
TP P . e Pn no no
 0
V/V
TP P e 1n no
 
  
 
   …………………. (3)
Similarly,  0
V/V
Tn e 1p poN
 
  
 
  …………………. (4)
The hole current crossing the junction from p-side to n-side is given by,
 
 AqD P 0p n
I 0pn Lp
 ……………… (5)
Similarly, the electron current crossing the junction from n-side to p-side is given by,
 
 AqD N 0n p
I 0np Ln
 ……………… (6)
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Where A = Area of cross-section of junction
Dp= Diffusion constant for holes
Dn = Diffusion constant for electrons
Lp = Diffusion length for holes
Ln= diffusion length for electrons
Using (3) & (4) equations in equations (5) and (6),
The total current I at the junction is given by,
   I I 0 I 0pn np 
   A q D P 0 A q D N 0p n n p
L Lp n
 
   A q D P 0 A q D N 0 V/Vp n n p T. e 1
L Lp n
   
        
  
V/V
T. e 1I Io
 
 
 
 
   …………………. (7)
Where
   A q D P 0 A q D N 0p n n p
L Lp n
Io   = reverse saturation current.
The equation (7) is the required expression for diode current.
In the above equation, it is derived without considering the carrier generation and
recombination in the depletion region.
If we consider the generation and recombination of carriers in the space charge region, the
general equation of the diode current is approximately given by
V/ V
TI I e 1o
 
 
 
  ………………………. (8)
Where, I = diode current
Io = diode reverse saturation current at room temperature.
V = external voltage applied to the diode
η = a constant, 1 for Ge and 2 for Si
VT = kT/q = T/11600,volt equivalent of temperature, i.e, thermal voltage,
where k = Boltzmann‟s constant
q = charge of electron
T = temperature of the diode junction.
The Volt-Ampere characteristics of a Diode:
The V-I characteristics of a diode in the forward biased and reverse biased condition is the
graph of voltage across the diode against the diode current.
Forward characteristics of a P-N junction Diode:
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When a forward bias voltage VF is applied to a P-N junction diode, below the cut-in voltage Vγ, the
diode will not conduct and the current flowing is very small. Practically this current is assumed to
be zero.
The diodes will have a cut-in, offset, breakpoint (or) threshold voltage Vγ, below which the
current is very small (say, less than 1% of maximum rated value). Beyond Vγ, the current rises
very rapidly.
Vγ is approximately o.2V for „Ge‟ and o.6V for „Si‟.
As the forward biased voltage VF is greater than the cut-in voltage Vγ, the potential barrier
across the junction is completely eliminated and the current rises very rapidly.
The V-I characteristics under forward bias condition is shown in figure below.
Reverse characteristics of a PN-junction diode:
When a PN-junction diode is reverse biased, the negative terminal attracts the holes in the
p-region away from the junction. The positive terminal attracts the free electrons in n-region away
from the junction. No charge carrier is able to cross the junction.
As electrons and holes both move away from the junction, the depletion region widens.
As depletion region widens, barrier potential across the junction also increases. The
polarities of barrier potential are same as that of the applied voltage.
However a small reverse current called reverse saturation current Io flows across the
junction due to the movement of minority charge carriers across the junction.
Reverse saturation current is very small of the order of few micro-amperes for „Ge‟ and few
nano-amperes for „Si‟ PN-junction diodes.
The generation of minority charge carriers depends on the temperature and not on the
applied across bias voltage.
If the reverse bias voltage is increased beyond certain limit the junction breaks down and a
very large reverse current flows.
The V-I characteristics under reverse biased condition for a PN-junction diode is shown in
figure.
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The complete V-I characteristics of a PN-diode (forward bias and Reverse bias) for both Ge
and Si are shown in figure below:
Temperature dependence of V-I characteristics of a Diode:
i) Effect of temperature on Reverse Saturation Current:
We know that  0 1
V
A D P Vq p no TI epn
Lp
 
 
 
 
 
 0 1
V
A D n Vq n po TI enp
Ln
 
 
 
 
 
   0 0I I Ipn np  1
V
A D P A D n Vq p no q n po Te
L Lp n
  
  
  
    
But 1
V
VTI I eo 
 
 
 
 
A D P A D nq p no q n po
Io
L Lp n
  
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According to Mass-Action law, we know that
2niPn
ND
 and
2ninp
NA

2A D A Dq p q n
I no iL N L Np nD A
  
 
 
 
 
But
2 3 E KTGOn A Toi e


3D E KTDp n GOI A A T eo q o
L N L Np nD A

  
 
 
 
 
1
E KTm GOI K T eo

  (or)
1
V Vm TGOI K T eo

 
For Ge : η =1 , m=2 , VGO = 0.785 V
For Si : η =2 , m=1.5 , VGO = 1.21 V
1
V Vm TGOI K T eo


 ln ln 1
V Vm TGOI K T eo

 
 
 
 
     ln ln ln ln1
V Vm TGOI K T eo

   
 
 
 
     ln ln ln1
VGOI K m To
VT
   
 ln 1
0
2
Vd I mo GO
KdT T T
q

    
 
 
 
KT
VT q

 
 
 
Q
1 VdI mo GO
I dT T TVo T

  
Where
dIo
Io
is the fractional change in Io per degree rise in temperature.
For Ge, substituting the values of various terms at room temperature we get,
 ln 0.785
200
31 300 26 10
d Io
dT
  
  
= 0.11 per O
C
This indicates that Io increases by 11% per degree rise in temperature.
For Si, we get
 lnd Io
dT
= 0.08 per O
C
This indicates that Io increases by 8% per degree rise in temperature.
But experimentally it is found that the reverse saturation current Io increases by 7% per O
C
change in temperature for both Silicon and Germanium diodes.
If at T O
C, Io is 1μA then at (J+1) O
C it becomes 1.07μA and so on.
From this, it can be concluded that reverse saturation current approximately doubles i.e.,
1.0710
for every 10 O
C rise in temperature.
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Mathematically,
2 1
10102 22 1 1
T T T
I I IO O O
 
 
      
       
Where IO2 = Reverse Saturation current at T2
IO1 = Reverse Saturation current at T1
2) Effect of Temperature on Forward Voltage:
The dependence of Io on temperature T is given by,
1
V Vm TGOI K T eo

 …………………. (1)
But 1
V VTI I eo

  
 
 
 
…………………. (2)
For a forward current,
V VTI I eo

 …………….…… (3)
(Neglecting 1)
1
V V V Vm TGO TI K T e e
 
  g
1
V V Vm TGOI K T e
 
 
 

  (or)
1
V V KTm GOI K T e
 
 
 

 ….……………. (4)
Now for constant diode current, 0
dI
dT
 hence differentiating equation (4) with respect to T,
1 .1
V V V V V KT V VdI dm mTGO GO GOK mT e T e
dT dT KT
 

   
   
   
    
  
  
   
  1
1
1 2
V VdV GOT V Vm GOdI T KTm dTK mT e
dT K T


 
 
 

  
  
 
 
 
 
 
 1 2
V V
GO m mmT T dVKT
K e T V VGOT dTKT


 
 
 

   
  
  
  
 
1 2
dVV V
GO m KT T V VGOdI dTKT mK e T
dT KT



 
 
 

  
 
  
  
  
 
  
 1 2
V V
GO mdI T dVKT
K e m KT T V VGOdT dTKT



 
 
 

    
 
  
 
1
1
V V
GO mdI T dVKT
K e m V T V VT GOdT V dTT



 
 
 


     
 
  
…………….….. (5)
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But 0
dI
dT

  0
dV
m V T V VT GOdT
    
 dV
T V V m VTGOdT
   
 V V m VdV TGO
dT T
 
  ………………. (6)
This is required change in voltage necessary to keep diode current constant.
Hence for Ge, at cut-in voltage V=Vγ=0.2v and with m=2, η=1, T=300O
K and VGO = 0.785V
in equation (6), we get
 30.2 0.785 2 1 26 10
2.12
300
dV omV C
dT
    
   for Ge …………………. (7)
The negative sign indicates that the voltage must be reduced at a rate of 2.12 mV per
degree change in temperature to keep diode current constant.
Similarly for Si, we get 2.3
dV omV C
dT
  for Si ………………. (8)
Practically the value of
dV
dT
is assumed to be 2.5 omV C for either Ge (or) Si at room
temperature.
Diode Resistance:
i) Forward Resistance of a Diode:
The resistance offered by the diode in forward biased condition is called Forward resistance.
The forward resistance is defined in two ways.
a) Static (or) DC Forward resistance (RF).
b) Dynamic (or) AC Forward resistance (rf).
a) Static Forward Resistance (RF):
The static forward resistance RF is defined as the ration of the DC voltage
applied across the PN-junction to the DC current flowing through the PN-junction.
RF = Forward d.c. voltage / Forward d.c. current
= OA/OC at point E.
b) Dynamic (or) AC Forward resistance (rf):
The resistance offered by the PN-junction under AC conditions is called
dynamic resistance and is denoted by rf.
The dynamic resistance is defined as the reciprocal of the slope of the V-I
characteristics
i.e., rf = dV/dI.
The dynamic resistance is not a constant but depends upon the operating
voltage.
From the diode current equation, we have I=Io(eV/ηVT
-1)
Differentiating the above equation w.r.t. V,
We get,
1
. 0
V VdI TI eo
dV VT


 
 
 
 
 
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V VTI edI o
dV VT


 
I IdI o
dV VT

 
For a forward bias, I>>Io and rf is given approximately by
VdI Tr
f dV I

 
VTr
f I

 
The dynamic resistance varies inversely with current.
At room temperature and for η=1, rf = 26/I, where I is in mA and rf is in
ohms.
For a forward current of 26mA, the dynamic resistance is 1Ω.
From the figure,
1V
r
f II
V

 


= 1/Slope of forward characteristics
Generally the value of rf is very small of the order of few ohms in the operating region.
Fig. Forward characteristics of a Diode.
2) Reverse Resistance of a Diode:
The resistance offered by the diode in reverse biased condition is called Reverse resistance.
The reverse resistance is defined in two ways:
a) Static (or) DC Reverse resistance (RR).
b) Dynamic (or) AC Reverse resistance (rr).
a) Static Reverse resistance (RR):
The static reverse resistance RR is defined as the ratio of applied reverse DC
voltage to the reverse saturation current Io flowing through the PN-junction.
RR = Applied Reverse DC Voltage / Reverse saturation current
RR = OQ / OR at point P.
b) Dynamic Reverse resistance (rr):
The reverse dynamic resistance rr is defined as the ration of incremental
change in the reverse voltage applied to the corresponding change in the reverse
current.
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rr =
VR
IR


= Change in reverse voltage / change in reverse current
Fig. Reverse characteristics of a Diode.
Differences between Ideal diode & Practical diode:
Ideal Diode:
i) The cut-in voltage is zero. Since for an ideal diode there is no barrier potential,
thus any small FB voltage causes conduction through the device.
ii) The forward resistance (dynamic resistance) is zero.
iii) The reverse resistance is zero.
iv) The diode readily conducts when FB and it blocks conduction when reverse biased.
The reverse saturation current Io is zero.
v) The ideal diode acts as a fast-acting electronic switch.
Practical Diode:
i) There is a potential barrier across the junction, and this must be overcome before
the diode can conduct. The cut-in (or) threshold voltage (or) offset (or) break-
point voltage Vγ is approximately 0.2V for Ge & 0.6V for Si.
ii) The forward resistance is in the range of few tens of ohms.
iii) The reverse resistance is in the range of mega ohms.
iv) The diode conducts when forward biased and the bias voltage is more than that of
cut-in voltage.
v) The diode does not conduct when reverse biased. However a small reverse
saturation current flows across the junction in the range of nano-amps for Si diode
and micro-amps for Ge diode.
vi) The diode also acts a fast-acting switching electronic switch.
Circuit model of a Diode:
The circuit model of any device is represented by its equivalent circuit.
A equivalent circuit is a combination of elements properly chosen to best represent the
actual terminal characteristics of a device, system in a particular operating region.
A diode is replaced by a model with a battery equal to cut-in voltage of a diode, the forward
resistance of a diode in series with an ideal diode.
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The circuit model of a diode is shown in figure below:
Vγ rf
+ -
Forward resistance Ideal Diode
Fig. Circuit model of a Diode.
The above circuit model is also called as piecewise linear equivalent circuit.
Assuming rf=0, since for most applications, it is small to be ignored compared with
resistance of other elements of the network.
Therefore, the simplified equivalent circuit is as shown in figure below.
Vγ Ideal Diode
Assuming Vγ=0 and rf=0,t he equivalent circuit becomes the circuit model for an ideal
diode.
Ideal Diode
In forward biased condition, the ideal diode acts as short circuit.
Ideal Diode Short circuit under Forward Bias
In reverse biased condition, the ideal diode acts as open circuit.
Ideal Diode Open circuit under Reverse Bias
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Diode equivalent circuits / models:
Sl.
No.
Type Model Characteristics
1.
Piece-wise linear
model
Vγ rf
Vγ ≠0 rf ≠ 0 rr = ∞
ID
VD
0 Vγ
2. Simplified model
Vγ
Vγ ≠0 rf =0 rr = ∞
ID
VD
0 Vγ
3. Ideal model
Vγ = 0 rf =0 rr = ∞
ID
VD
0
Problems:
Problems from previous externally question paper:
1) The resistivities of the two sides of a step-graded Si junction are 5Ω- cm (p – side) and
2.5 Ω- cm(n – side).Calculate the height of the potential barrier Vo. Take µp = 475 cm²/V –
sec and µn=1500 cm²/V – sec at the room temperature of 300k and ni = 1.45x1010
atoms/ cm³.
Solution:
Given Resistivity of the p – region = 5Ω-cm
Resistivity of the n – region = 2.5 Ω- cm
µp = 475 cm²/V – sec
µn = 1500cm²/V – sec
ni = 1.45x1010
atoms/ cm³
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1
p q N qp p pA
p
µ µ

  
1
N
A qp pµ

1
N
A 195 1.6 10 475

  
NA = 2.6315 x 1015
/ cm³
1
n q N qn n nD
n
µ µ

  
1
N
D qn nµ

1
N
D 192.5 1.6 10 500

  
ND = 1.666 x 1015
/ cm³
N NKT D AV lno 2q n
i
 
 
  
 

302.6315 1.666 10
0.026ln
201.45 1.45 10
 
 
 
 
 

 
Vo =0.61V.
2) A silicon diode has a reverse saturation current of 7.12nA at room temperature of
27ºc.Calculate its forward current if it is forward biased with a voltage of 0.7v.
Solution:
The given values are Io = 7.12nA = 7.12 x 10-9
A
V = 0.7V
η =2 for Si , T = 27ºc = 27+273 = 300ºK
Now VT =26mv,
According to diode current equation,
V/ VTI I e 1o
 
 
 
 
= 7.12 x 10-9
(e0.7/2 x 0.026
-1)
= 7.12 x 10-9
(701894.59 -1)
= 4.99 x 10-3
A
I ≈ 5mA
Thus the forward current is 5mA.
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Problem from previous external question paper:
3) A silicon diode has a saturation current of 1nA at 20ºc. Find its current
when it is forward biased by 0.4v. Find the current in the same diode when the
temperature rises to 110ºc.
Solution:
Given Ge diode => η =1
I01 =1nA =10-9
at T1 =20ºC =20+273 = 293ºK.
V = 0.4V , VT = T1/11,600 =293/11,600 =0.0252V
I =?
V/ VTI I e 1o
 
 
 
 
I = 10-9
(e0.4/0.0252
– 1)
If T2 = 110ºc then I =?
I02 = (2T2 - T1/10
) I01
I02 =29
x 10-9
= 512 x 10-9
A
At T2 =110ºC =110+273 =383ºK, VT =383/11,600 =0.033V
V/ VTI I e 1
02
 
 
 
 
= 512 x 10-9
(e0.4/0.033
-1)
=
4) The diode current is 0.6mA when the applied voltage is 400mV and 20mA. When the
applied voltage is 500mV. Determine η . Assume KT/q =25Mv.
Solution: The diode current,
V/ VTI I e 1o
 
 
 
 
0.6 x 10-3
= IO (e400/25η
) (» neglecting 1)
Similarly, 20 x 10-3
= IO (e500/25η
)
320 10
30.6 10


=
20
I eo
16
I eo


100
3
=
4
e
ln
100
3
= 4/η -> 3.507 = 4/η
η =4/3.507 =1.14 .
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Problem from previous external question paper:
5) A pn–junction diode has a reverse saturation current of 30µA at a temperature of 125ºc.At
the same temperature find the dynamic resistance for 0.2v bias in forward and reverse
direction.
Solution:
Given IO = 30µA = 30 x 10-6
A
T = 125ºC = 125+273 =398ºK
V = 0.2V
η = 1,
VT = T1/11,600 = 398/11,600 =0.0343 V
We have
V/ VTI I e 1o
 
 
 
 
Neglecting „1‟, we get
V/ VTI I e 1o
 
 
 
 
I1 dI o e
rf dv V
T
V
V
T
 
1
rf
 =
rf =
I1 dI o e
rf dv V
T
V
V
T
 
r
1
r
 =
rr =
6) Calculate the dynamic forward and reverse resistance of pn – junction silicon diode when
the applied voltage is 0.25v at T = 300ºk with given IO = 2µA.
Solution:
The dynamic resistance of diode is given by,
V
Tr
V
TI e
V
o

 
 
 
 
 

Now η =2 for Si, VT = 26m v for T =300ºK.
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For forward resistance use V =0.2V
 32 x 26 x 10
r
f 0.25
36 2 x 26 x 102 x 10 x e
 
 
 
 



= 212.337Ω
For reverse resistance use V = 0.2V
 32 x 26 x 10
rr 0.25
36 2 x 26 x 102 x 10 x e
 
 
 
 




= 3.1836MΩ
7) Find the value of dc resistance and ac resistance of a germanium junction diode at 25ºc
with IO =25µA and at an applied voltage of 0.2v across the diode.
Solution:
The dc resistance is the ratio of diode voltage and current at a point on V – I
characteristics.
Given : Vf =0.2V, IO =25µA, η =1 for Ge diode
V/ VTI I e 1o
 
 
 
 
Where VT =25+273/11,600 =0.025V
 I = 25 x 10-6
[e0.2/(1 x 0.025)
- 1]
= 0.06013A
Rf = dc resistance = Vf/I = 0.2/0.06013 =3.3259Ω
and Rf =ac resistance = VT/ IO (eV/ηV
T)
= 0.025/25x10-6
x e(0.2/0.025 )
= 0.427Ω.
8) The voltage across a silicon diode at room temperature of 300ºk is 0.7v when 2ma current
flows through it. If the voltage increases to 0.75v, calculate the diode current assuming VT
= 26mv.
Solution:
V = 0.7V, η =2 for Si , VT = 26mV at 300ºK, I = 2mA
Now
V/ VTI I e 1o
 
 
 
 
2 x 10-3
= IO (e0.7/(2x26x10-3)
- 1 )
Io =2.8494 x 10-9
A
New voltage V = 0.75V,
V/ VTI I e 1o
 
 
 
  = 2.8497 x 10-9
[e0.75/(2x26x10-3)
] = 5.2313mA.
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PN- Junction construction types:
Junction can be constructed by using different methods. The different construction
types of PN – junction are:
1) Alloy or step- graded junction.
2) Grown or linearly- graded junction.
3) Diffused junction.
Alloy or step graded junction:
1) The step graded junction is a junction in which there is an abrupt change from acceptor
ions on one side to the donor ions on the other side.
2) Such a junction is formed by placing indium (trivalent) pallet against n-type Germanium
wafer and heating this assembly to a high temperature for a short time.
3) As a result of this heating, some of the indium dissolves into the germanium to change the
germanium from n-type to p-type at the junction.
4) Such a junction is called alloy junction or fused junction or step graded junction.
Grown or linearly grade junction:
If donor impurities are introduced into one side and acceptor impurities into the other side
of a single crystal growing from a melt of Si (or) Ge, then grown- junction or linearly- graded
junction is formed.
Diffused junction:
In diffusion process, a wafer of semi- conductor material (say p-type) is exposed to a gas
of impurity (say n-type) material, then the atoms of the impurity material diffuse into the
semiconductor material to form a diffused pn- junction.
Diode capacitances or junction capacitances:
In a semiconductor pn- junction, there are two types of capacitances.
1) Transition capacitance
2) Diffusion capacitance.
Transition capacitance ( Tc ):
1) The transition capacitances come into play when the junction is under reverse biased
condition.
2) The reverse bias in a pn- diode results in majority carriers moving away from the junction
leaving only uncovered immobile ions.
3) Thus thickness of the space charge layer at the junction increases of reverse bias
magnitude.
4) This depletion region along with concentration of uncovered immobile charges may be
considered to constitute a capacitor whose incremental capacitance Tc is given by
T
dQ
C
dV

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where dQ = increase in charge and
dV=change in voltage
Hence a voltage change dV in time dt will result in a current i given by,
dQ
i
dt

T
dV
i C
dt

This capacitance CT is referred to the space charge capacitance, transition capacitance, barrier
capacitance or depletion capacitance.
The expression for CT can be derived for step-graded and linearly-graded junctions
Expression for CT for Step-graded Junction
The figure shows the charge density as a function of distance from an alloy junction in which the
acceptor impurity density is assumed to be much grater then the donor concentration.
Since the net charge must be zero, then
qN qNp nDA  ……………………. (1)
If NA>>ND, then wp<< wn .
For simplicity, we neglect wp and assume that the entire barrier potential VB appears across
the uncovered donor ions.
The relationship between potential and charge density is given by Poisson‟s equation,
2
2
d V P
dx
 

2
2
DqNd V
dx
 

…………………… (2)
Where Є is the permittivity of the semiconductor.
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Integrating equation (2) w.r.t., x, we get 1
DqNdV
x C
dx
  

The electric flux line originates on the positive donor ions and terminates on the negative
acceptor ions.
Applying boundary conditions, At nx    , 0
dV
E
dx
  
.
1
qNDC  

Substituting C1 value in above equation,
dV
dx
=  
qND x  

………………….. (3)
On integrating equation (3), we get
2
22
qN xDV x C
 
    
   
Applying boundary conditions i.e., at V=0 & at x=0, C2=0
2
2
qN xDV x
 
   
   
At nx    , V=VB, the barrier height
2
2
2
qNDVB


 
    
   
2
.
2
qNDVB

 

…………………….. (5)
Let A be the area of the junction. Then the total charge in the distance w of the depletion
layer is
t DQ qN A
Hence the capacitance CT is given by
t
T D
B B
dQ d
C qN A
dV dV

  ……………….. (6)
Differentiating equation.(5) w.r.t., VB, we get 1 .2D
B
d
qN A
dV


B D
d
dV qN



 
Substituting this value in equation (6). We get T D
D
C qN A
qN 


A
CT 

  ………………. (7)
The transition capacitance CT given by equation(7) is exactly the same as the
equation giving the capacitance of a parallel plate capacitor having plate area A, plate
separation w, containing material of permittivity.
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Expression for CT in linearly-graded junction:
Fig (i) Reverse biased linearly graded junction
Fig (ii) Charge density versus distance curve
Fig (iii) Electric field versus distance curve
Fig (iv) potential versus distance curve
For the grown junction the net charge density in depletion region varies linearly with
distance and becomes to zero abruptly at the edges of distance as shown in the
figure.
The net charge density P= q k x
Where kproportionality constant
q Charge
x distance ,
The relationship between potential and charge density is given by Poisson‟s equation
2
2
d V qKx
dx



……………………… (1)
On integrating eqn.(1), we get
2
12
dV qKx
C
dx

 

At
2
x

  , 0
dV
E
dc
  
Substituting the boundary conditions in the above equation we get
2
1 8
qK
C



2 2
2 8
dV qK x
dx
 
   
   
………………… (2)
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On integrating eqn.(2) we get
3 2
26 8
qK x
V x C
 
   
   
Using boundary condition at x=0,V=0 we get C2=0
3 2
6 8
qK x
V x
 
   
   
………………. (3)
The total potential across the junction from
2

 to
2

 is given by
2 2
V V VB x x    
      
   
 
 
3 2 3 2
48 16 48 16
B
qK qK
V
      
        
       
3
12
B
qK
V

 

………………………. (4)
Let A be the area of the junction, then the total charge on one side of the depletion layer is
1
. . . . .
2 2 2
Q A q Kt
 

3
8
t
AqK
Q

  ………………….. (5)
Hence the transition capacitance is given by
dQtCT dV

.2 .
8 4
AqK d AqK d
CT dV dV
  
   ……… (6)
From equation (4),
3
12
qK
V



Differentiating above equation. With respect to „V‟, we get
21 .3 .
12
qK d
dV



4
2
d
dV qK



 
Substituting this in equation. (6)
4
24
AqK
CT
qK



 
A
C
T 

 
Thus, we get the same expression for CT in case of both grown and alloy junction diodes.
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Diffusion Capacitance (CD):
The diffusion capacitance exists across the junction when it is forward biased. The rate of
change of injected charge with applied voltage is called as “diffusion capacitance” (or) Storage
Capacitance.
Expression for Diffusion Capacitance, (CD):
For simplicity we assume that one side of the diode, say the P-material is so heavily doped
in comparison with the n-side and the current across the junction entirely by holes moving from p-
side to the n-side. i.e., I=Ipn (0).
Therefore the charge  Q A Lp P 0e n …………………….. (1)
By differentiating eqn.(1) w.r.t „V‟ , we get
 dP 0dQ nA LpedV dV
 ……………………… (2)
 A P 0e n
( )
Dp
I Ipn o
Lp
 
Differentiating with respect to „V‟
 A dP 0e nDdI p
dV L dVp

 dP 0n .
Ae
L dIp
dV D dVp
  ………………………(3)
Substituting eqn.(3) in eqn.(2),
dQ
A Lp .e Ae
L dIp
dV D dVp
 
2LdQ
.
dIp
dV D dVp
 
We know that
dQ
CDdV

2L
.
dIp
CD D dVp
 
Where
dI
g
dV
 is the diode conductance
2L
.
p
CD Dp
g But
2Lp
Dp
p  
 Diffusion Capacitance .DC g
We know that the Tran conductance
T
g
dI I
dV V
 
D
I
C
V
T


 
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Limiting values or Specification parameters of a PN-junction:
Data on specific semiconductor devices are normally provided by the manufacturer. The diode
specification sheet includes:
1) The Forward Voltage, VF :
It is the maximum forward voltage that can be applied across the junction.
2) The Maximum Forward Current, IF:
It is the highest instantaneous current under forward bias condition that can flow
through the junction.
3) The Reverse Saturation Current, I0:
This is the small diode current in the reverse direction when reverse bias is applied.
It is independent of the magnitude of the reverse bias. I0 is of the order of 1µA (1nA) for
Ge (Si) diode.
4) Peak Inverse Voltage (PIV):
It is the maximum reverse voltage that can be applied to the PN-junction. If the
voltage across the junction exceeds PIV, under reverse bias condition, the junction gets
damaged.
5) Maximum Power Dissipation:
It is the maximum power that can be dissipated at the junction without damaging
the junction.
6) Reverse Recovery Time (trr):
It is defined as the time interval from the instant of current reversal from forward
to reverse condition until the diode has recovered to a specified extent either in terms of
the diode current (typically 1mA) or in terms of diode resistance(typically 400 k ). trr lies in
1ns to 1 s.
7) Capacitance Levels:
The capacitance offered by the junction under forward bias and reverse bias conditions.
8) Operating Temperature Range:
It is the range of temperature for which the PN-junction diode operates safely with out
getting damaged. Its typical value is ranging from -65o
C to +150o
C.
Breakdown Mechanisms in a diode:
When the diode is reverse biased for a small reverse voltage, then the diode current is
small and almost constant at I0. But when reverse voltage increases beyond certain value, large
diode current flows, this is called breakdown of diode, and corresponding voltage is called reverse
breakdown voltage of diode.
There are two distinct mechanisms due to which the break down may occur in the diode,
these are:
 Avalanche breakdown
 Zener break down
Avalanche Breakdown:
The avalanche breakdown occurs in lightly doped diodes. As the applied reverse biased
voltage is increased, the velocity and hence the kinetic energy (KE=1/2 mv2
) of thermally
generated charge carriers increases. If such charge carriers collide against an electron involved in
covalent bond. These collisions break its covalent bond and create new charge carriers. These
secondary particles are also accelerated and participates in collision that generate new electron
hole pairs. This phenomenon is known as “Avalanche Multiplication”.
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The multiplication factor due to the avalanche effect is given by
1
1
M n
V
VBD


 
 
 
 
Where M is carrier multiplication factor
N is empirical constant, for n-type silicon n=4 and For p-type n=2
V is applied reverse voltage
VBD is reverse breakdown voltage
Due to this avalanche effect, the junction is said to be in breakdown and the current starts
increasing rapidly.
The diodes having reverse breakdown voltage greater than 6V shows the avalanche
mechanism of breakdown.
Zener Breakdown:
 The zener breakdown occurs in heavily doped diodes.
 For heavily doped diodes, the depletion region width is small.
 Under reverse bias conditions, the electric field across the depletion layer is very intense.
Breaking of covalent bonds due to intense electric field across the narrow depletion region
and generating large number of electrons is called Zener effect.
 These generated electrons constitute a very large current and the mechanism is called
Zener breakdown.
 The diodes having reverse breakdown voltage less than 5v shows the Zener mechanism of
breakdown.
Temperature dependence of break down voltages:
 In heavily doped diodes the depletion region width is very small. The applied voltage
produces an electric field which is very intense. In such a case, if temperature increases,
valance electrons acquired high energy levels and it is easy for the applied voltage to pull
such electrons from covalent bonds to make them free. Thus for small voltage, at higher
temperature breakdown occurs.
 Thus the break down voltage decreases as the temperature increases for zener breakdown.
The zener breakdown has negative temperature coefficient.
 In lightly doped diodes, the width of depletion region is large and the field intensity is low.
The break down possibility is because of avalanche effect. In such a case if the temperature
increases, the vibration of atoms in a crystal increases the intrinsic holes and electrons
have less opportunity to impart sufficient energy between the collisions due to vibrations,
to start the carrier multiplication. Thus voltage must be increased to cause the break down
so at higher temperature, higher breakdown voltage is necessary.
 Thus the breakdown voltage increases as the temperature increases for avalanche break
down. The avalanche break down has positive temperature coefficient
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PN- Diode Applications:
An ideal PN junction diode is a two terminal polarity sensitivity device that has zero
resistance (diode conducts) when it is forward biased and infinite resistance (diode does not
conduct) when reverse biased. Due to this characteristic the diode finds a number of applications as
follows:
1) Rectifiers in DC power supplies.
2) Switch in digital logic circuits used in computers.
3) Clamping network used as dc restorer in TV receivers and voltage multipliers.
4) Clipping circuits used as wave shaping circuits used in computers, radars, radio and TV
receivers.
5) Demodulation detector circuits and
The same PN junction with different doping concentration finds special applications as follows:
1) Detectors in optical communication circuits.
2) Zener diodes in voltage regulators.
3) Varactor diodes in tuning sections of radio and TV receivers.
4) LED‟s in digital displays.
5) LASER Diodes in optical communications.
6) Tunnel diodes as a relaxation oscillator at microwave frequencies.
Special Diodes:
Zener Diode:
 Zener diode is a heavily doped diode, and is designed with adequate power dissipation
capabilities to operate in the reverse breakdown region.
 The operation of the zener diode is same as that of ordinary PN diode under forward biased
condition.
 In reverse biased condition, the diode carries reverse saturation current, till the reverse
voltage applied is less than the reverse breakdown voltage.
 When the reverse voltage exceeds the reverse breakdown voltage, the current through it
changes drastically but the voltage across it remains almost constant such a break down
region is a normal operation region is a normal operating region for a zener diode.
 The symbol of zener diode is shown in figure below:
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 The dynamic resistance of a zener diode is defined as the reciprocal of the slope of the
reverse characteristics in zener region.
Vzrz
Iz



= 1 / slope of reverse characteristics in zener region
 The dynamic resistance is very small, it is of he order of few tens of ohms.
Equivalent circuit of Zener diode:
+
 Vz
-
`
Zener Diode Practical equivalent Circuit Ideal equivalent circuit
Applications of zener diode:
The various applications of zener diode are,
 As a voltage regulating element in voltage regulators.
 In various protecting circuits.
 In zener limiters i.e., clipping circuits which are used to clip off the unwanted
portion of the voltage waveform.
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UNIT - III
RECTIFIERS, FILTERS AND REGULATORS
SYLLABUS:
Half wave rectifier, ripple factor, full wave rectifier, Harmonic components in a rectifier
circuit, Inductor filter, Capacitor filter, L- section filter, - section filter, Multiple L-
section and Multiple section filter, and comparison of various filter circuits in terms of
ripple factors, Simple circuit of a regulator using zener diode, Series and Shunt voltage
regulators
LECTURE PLAN
S. No. Topic to be covered
Periods
required
1 Introduction to Rectifiers, Half-wave Rectifier and its analysis 2
2 Full-wave Rectifier(Center tapped & Bridge) and its analysis 2
3 Introduction to Filters, Analysis of Inductor Filters 2
4 Analysis of Capacitor Filters 2
5
L - Section Filter, Pi-Section Filter
2
6 Multiple L-Section and Multiple Pi- Section Filters 1
7
Comparison of various rectifiers and filter circuits in terms of
ripple factors.
1
8 Regulator circuit using Zener diode 1
9 Series and shunt voltage regulators 1
Total
14
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Introduction:
For the operation of most of the electronics devices and circuits, a d.c. source is required.
So it is advantageous to convert domestic a.c. supply into d.c. voltages. The process of converting
a.c. voltage into d.c. voltage is called as rectification.This is achieved with i) Step-down
Transformer, ii) Rectifier, iii) Filter and iv) Voltage regulator circuits.
These elements constitute d.c. regulated power supply shown in the figure below.
Fig. Block diagram of Regulated D.C. Power Supply
The block diagram of a regulated D.C. power supply consists of step-down transformer, rectifier,
filter, voltage regulator and load.
An ideal regulated power supply is an electronics circuit designed to provide a
predetermined d.c. voltage Vo which is independent of the load current and variations in the input
voltage ad temperature.
If the output of a regulator circuit is a AC voltage then it is termed as voltage stabilizer,
whereas if the output is a DC voltage then it is termed as voltage regulator.
The elements of the regulated DC power supply are discussed as follows:
TRANSFORMER:
A transformer is a static device which transfers the energy from primary winding to
secondary winding through the mutual induction principle, without changing the frequency. The
transformer winding to which the supply source is connected is called the primary, while the
winding connected to the load is called secondary.
If N1,N2 are the number of turns of the primary and secondary of the transformer then
2
1
N
N
  is called the turns ratio of the transformer.
The different types of the transformers are
1) Step-Up Transformer
2) Step-Down Transformer
3) Centre-tapped Transformer
The voltage, current and impedance transformation ratios are related to the turns ratio of
the transformer by the following expressions.
Voltage transformation ratio : 2 2
1 1
V N
V N

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Current transformation ratio : 2 1
1 2
I N
I N

Impedance transformation ratio :
2
2
1
L
in
Z N
Z N
 
 
 

RECTIFIER:
Any electrical device which offers a low resistance to the current in one direction but a high
resistance to the current in the opposite direction is called rectifier. Such a device is capable of
converting a sinusoidal input waveform, whose average value is zero, into a unidirectional
waveform, with a non-zero average component.
A rectifier is a device which converts a.c. voltage (bi-directional) to pulsating d.c. voltage
(Uni-directional).
Important characteristics of a Rectifier Circuit:
1. Load currents: They are two types of output current. They are average or d.c. current
and RMS currents.
i) Average or DC current: The average current of a periodic function is
defined as the area of one cycle of the curve divided by the base.
It is expressed mathematically as
2
0
1
( )
2dcI id t



  ; where mI sini t
ii) Effective (or) R.M.S. current: The effective (or) R.M.S. current squared of a
periodic function of time is given by the area of one cycle of the curve which
represents the square of the function divided by the base.
It is expressed mathematically as
1
2
2
2
0
1 ( )
2rmsI i d t



 
 
 
 
 
2. Load Voltages: There are two types of output voltages. They are average or D.C. voltage
and R.M.S. voltage.
i) Average or DC Voltage: The average voltage of a periodic function is defined
as the areas of one cycle of the curve divided by the base.
It is expressed mathematically as
2
0
1
( )
2dcV Vd t



  ; Where m sinV V t
(or)
Ldc dc
V I R 
ii) Effective (or) R.M.S Voltage: The effective (or) R.M.S voltage squared of
a periodic function of time is given by the area of one cycle of the curve which
represents the square of the function divided by the base.
1
2 2
2
0
1 ( )
2rmsV V d t



 
 
  
 
  rms rms LV I R 
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3. Ripple Factor ( ) : It is defined as ration of R.M.S. value of a.c. component to the d.c.
component in the output is known as “Ripple Factor”.
'
rms
dc
V
V
 
W her e
2 2'
rms dcrmsV V V 
2
1rms
dc
V
V

 
 
 
 
 
4. Efficiency ( ) : It is the ratio of d.c output power to the a.c. input power. It
signifies, how efficiently the rectifier circuit converts a.c. power into d.c. power.
It is given by dc
ac
P
P
 
5. Peak Inverse Voltage (PIV): It is defined as the maximum reverse voltage that a
diode can withstand without destroying the junction.
6. Regulation: The variation of the d.c. output voltage as a function of d.c. load current is
called regulation. The percentage regulation is defined as
% Regulation = 100%no load full load
full load
V V
V
 



For an ideal power supply, % Regulation is zero.
Using one or more diodes in the circuit, following rectifier circuits can be designed.
1. Half - Wave Rectifier
2. Full – Wave Rectifier
3. Bridge Rectifier
HALF-WAVE RECTIFIER:
A Half – wave rectifier is one which converts a.c. voltage into a pulsating voltage using only
one half cycle of the applied a.c. voltage. The basic half-wave diode rectifier circuit along with its
input and output waveforms is shown in figure below.
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The half-wave rectifier circuit shown in above figure consists of a resistive load; a rectifying
element i.e., p-n junction diode and the source of a.c. voltage, all connected is series. The a.c.
voltage is applied to the rectifier circuit using step-down transformer.
The input to the rectifier circuit, m sinV V t Where Vm is the peak value of secondary a.c.
voltage
Operation:
For the positive half-cycle of input a.c. voltage, the diode D is forward biased and hence it
conducts. Now a current flows in the circuit and there is a voltage drop across RL. The waveform
of the diode current (or) load current is shown in figure.
For the negative half-cycle of input, the diode D is reverse biased and hence it does not
conduct. Now no current flows in the circuit i.e., i=0 and Vo=0. Thus for the negative half-cycle
no power is delivered to the load.
Analysis:
In the analysis of a HWR, the following parameters are to be analyzed.
i) DC output current ii) DC Output voltage
iii) R.M.S. Current iv) R.M.S. voltage
v) Rectifier Efficiency ( ) vi) Ripple factor ( )
vii) Regulation viii) Transformer Utilization Factor (TUF)
ix) Peak Factor (P)
Let a sinusoidal voltage Vi be applied to the input of the rectifier.
Then m sinV V t Where Vm is the maximum value of the secondary voltage.
Let the diode be idealized to piece-wise linear approximation with resistance Rf in the
forward direction i.e., in the ON state and Rr (=∞) in the reverse direction i.e., in the OFF state.
Now the current „i‟ in the diode (or) in the load resistance RL is given by
mI sini t for 0 t  
i=0 for 2t   
where mI m
Lf
V
R R


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i) Average (or) DC Output Current (Iav or Idc):
The average dc current Idc is given by
dc
I
2
0
1 ( )
2
id t



 
m
2
0
sin ( )
1 0 ( )
2
I td t d t



  

 
 
 
 
  
m 0
1 I ( cos )
2
t 

 
 
 
 
m
1 I ( 1 ( 1))
2
 
  
   
mI
 , = 0.318 mI
Substituting the value of mI , we get
 
I
Lf
m
dc
R R
V
 

If RL>>Rf then I m
dc
L
V
R
 = 0.318 m
L
V
R
ii) Average (or) DC Output Voltage (Vav or Vdc):
The average dc voltage is given by
Ldc dcV I R  =
mI
LR

 =
 Lf
m L
R R
V R
 
 Lf
m L
dc R R
V R
V
 
 
If RL>>Rf then
m
dc
V
V

 = 0.318 mI m
dc
V
V

 
iii) R.M.S. Output Current (Irms):
The value of the R.M.S. current is given by
rmsI
2
1
2
2
0
1 ( )
2
i d t



 
 
 
  
 
1
2
22
2
0
sin ( )
1 0 ( )
2
1I
2
.m
t d t d t



  
 
 
 
 
 
 
  
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1
22
0
1 cos ( )
2
I
2
m t d t

 

  
  
    
 
1
22
0
I 1( ) sin
4 2
m t t

 

    
  
    

1
2 2
sin0
I sin20
4 2
m 

     
    
 
1
2 2I
4
m
 
 
 
 
 mI
2

mI
2rmsI  (or)
 2 Lf
m
rms
R R
VI


iv) R.M.S. Output Voltage (Vrms):
R.M.S. voltage across the load is given by
rms rms LV I R  =
 2 Lf
m L
R R
V R

=
2 1 f
L
m
R
R
V
 
 
 
 

If RL >> Rf then
2
m
rms
V
V 
v) Rectifier efficiency ( ) :
The rectifier efficiency is defined as the ration of d.c. output power to the a.c. input power i.e.,
dc
ac
P
P
 
2
2
2
m L
Ldcdc
I R
I RP

 
   
2
2
4rms
m
L Lf fac
I
I R R R RP    
 
2
2 22
4 4m
m
L L
L fL f
dc
ac
R R
R RR R
P I
P I 

 
 
 
 
 

 
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2
1 0.406
11
4
ff
LL
RR
RR

 
 
 
 
 

 
%
40.6
1 f
L
R
R


 
Theoretically the maximum value of rectifier efficiency of a half-wave rectifier is 40.6%
when
f
L
R
R
= 0.
vi) Ripple Factor ( ) :
The ripple factor  is given by
2
1rms
dc
I
I

 
 
 
 
 (or)
2
1rms
dc
V
V

 
 
 
 

2
2
/
/ 1m
m
I
I 

 
 
 
 
  =
2
1
2
 
 
 
 = 1.21
1.21 
vii) Regulation:
The variation of d.c. output voltage as a function of d.c. load current is called regulation.
The variation of Vdc with Idc for a half-wave rectifier is obtained as follows:
mI /I m
dc
Lf
V
R R

 


But
Ldc dcV I R 
dc
V m L
Lf
RV
R R
 
 
 
 
 


1 fm
Lf
RV
R R
 
 
 
 
 
 

dc f
m RV I
 
dc dc f
mV RV I
  
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This result shows that Vdc equals
mV

at no load and that the dc voltage decreases linearly
with an increase in dc output current. The larger the magnitude of the diode forward resistance,
the greater is this decrease for a given current change.
viii) Transformer Utilization Factor (UTF):
The d.c. power to be delivered to the load in a rectifier circuit decides the rating of the
transformer used in the circuit. So, transformer utilization factor is defined as
( )
dc
ac rated
P
TUF
P
 
The factor which indicates how much is the utilization of the transformer in the circuit is called
Transformer Utilization Factor (TUF).
The a.c. power rating of transformer = Vrms Irms
The secondary voltage is purely sinusoidal hence its rms value is
1
2
times maximum while the
current is half sinusoidal hence its rms value is
1
2
of the maximum.
( )ac rated
P mI
22
mV
  mI
2 2
mV

The d.c. power delivered to the load
2
dc LI R m
2
I
LR

 
 
 

( )
dc
ac rated
P
TUF
P
 
m
2
I
LR

 
 
 

m
2 2
ImV

2
2
2
2 2I
I
m
m
L
L
R
R 
 

  mIm LV RQ
= 0.287
TUF 0.287
The value of TUF is low which shows that in half-wave circuit, the transformer is not fully
utilized.
If the transformer rating is 1 KVA (1000VA) then the half-wave rectifier can deliver 1000 X
0.287 = 287 watts to resistance load.
ix) Peak Inverse Voltage (PIV):
It is defined as the maximum reverse voltage that a diode can withstand without destroying
the junction. The peak inverse voltage across a diode is the peak of the negative half-cycle. For
half-wave rectifier, PIV is Vm.
x) Form factor (F):
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The Form Factor F is defined as
F = rms value / average value
Im/ 2
Im/
F


0.5Im
0.318Im
1.57F  
xi) Peak Factor (P):
The peak factor P is defined as
P= Peak Value / rms value
/ 2
m
m
V
V
 = 2 P = 2
Disadvantages of Half-Wave Rectifier:
1. The ripple factor is high.
2. The efficiency is low.
3. The Transformer Utilization factor is low.
Because of all these disadvantages, the half-wave rectifier circuit is normally not used as a
power rectifier circuit.
Problems from previous external question paper:
1. A diode whose internal resistance is 20Ω is to supply power to a 100Ω load from 110V(rms)
source pf supply. Calculate (a) peak load current (b) the dc load current (c) the ac load
current (d) the percentage regulation from no load to full load.
Solution:
Given a half-wave rectifier circuit Rf=20Ω, RL=100Ω
Given an ac source with rms voltage of 110V, therefore the maximum amplitude of
sinusoidal input is given by
Vm = 2 Vrms = 2 x 110 = 155.56V.
(a) Peak load current : Im
Vm
R R
Lf


155.56
120
Im  = 1.29A
(b) The dc load current : I
Im
dc 
 = 0.41A
(c) The ac load current : I
2
Im
rms  = 0.645A
(d) Vno-load :
Vm

=
155.56

= 49.51 V
Vfull-load :
Vm I R
dc f
 = 41.26 V
% Regulation = 100
V V
no load full load
V
full load

 


= 19.97%
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2. A diode has an internal resistance of 20Ω and 1000Ω load from 110V(rms) source pf
supply. Calculate (a) the efficiency of rectification (b) the percentage regulation from no
load to full load.
Solution:
Given a half-wave rectifier circuit Rf=20Ω, RL=1000Ω
Given an ac source with rms voltage of 110V, therefore the maximum amplitude of
sinusoidal input is given by
Vm = 2 Vrms = 2 x 110 = 155.56V.
(a) % Efficiency ( ) =
40.6
20
1
100

=
1.02
40.6
= 39.8%.
(b) Peak load current : Im
Vm
R R
Lf


=
155.56
1020
= 0.1525 A
= 152.5 mA
The dc load current : I
Im
dc 
 = 48.54 mA
Vno-load =
Vm

=
155.56

= 49.51 V
Vfull-load=
Vm I R
dc f
 = 49.51 – (48.54 x10-3
x 20)
= 49.51 – 0.97 = 48.54 V
% Regulation = 100
V V
no load full load
V
full load

 


=


49.51 48.54
100
48.54
= 1.94 %
3. An a.c. supply of 230V is applied to a half-wave rectifier circuit through transformer of
turns ration 5:1. Assume the diode is an ideal one. The load resistance is 300Ω.
Find (a) dc output voltage (b) PIV (c) maximum, and (d) average values of power
delivered to the load.
Solution: (a) The transformer secondary voltage = 230/5 = 46V.
Maximum value of secondary voltage, Vm = 2 x 46 = 65V.
Therefore, dc output voltage,
65VmV
dc  
  = 20.7 V
(b) PIV of a diode : Vm = 65V
(c) Maximum value of load current, Im
Vm
R
L
 =
65
300
= 0.217 A
Therefore, maximum value of power delivered to the load,
Pm = Im
2
x RL = (0.217)2
x 300 = 14.1W
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(d) The average value of load current,
20.7
I =
300
V
dc
dc R
L
 = 0.069A
Therefore, average value of power delivered to the load,
Pdc = Idc
2
x RL = (0.069)2
x 300 = 1.43W
FULL – WAVE RECTIFIER
A full-wave rectifier converts an ac voltage into a pulsating dc voltage using both half cycles
of the applied ac voltage. In order to rectify both the half cycles of ac input, two diodes are used in
this circuit. The diodes feed a common load RL with the help of a center-tap transformer.
A center-tap transformer is the one which produces two sinusoidal waveforms of same
magnitude and frequency but out of phase with respect to the ground in the secondary winding of
the transformer. The full wave rectifier is shown in the figure below.
Fig. Full-Wave Rectifier.
The individual diode currents and the load current waveforms are shown in figure below:
Fig. The input voltage, the individual diode currents and the load current waveforms.
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Operation:
During positive half of the input signal, anode of diode D1 becomes positive and at the
same time the anode of diode D2 becomes negative. Hence D1 conducts and D2 does not conduct.
The load current flows through D1 and the voltage drop across RL will be equal to the input voltage.
During the negative half cycle of the input, the anode of D1 becomes negative and the
anode of D2 becomes positive. Hence, D1 does not conduct and D2 conducts. The load current
flows through D2 and the voltage drop across RL will be equal to the input voltage.
It is noted that the load current flows in the both the half cycles of ac voltage and in the
same direction through the load resistance.
Analysis:
Let a sinusoidal voltage Vi be applied to the input of a rectifier. It is given by Vi=Vm sinωt
The current i1 though D1 and load resistor RL is given by
I sinm1
i t for 0 t  
0
1
i  for 2t    Where Im
Vm
R R
Lf


Similarly, the current i2 through diode D2 and load resistor RL is given by
2
0i  for 0 t  
I sinm2
i t for 2t   
Therefore, the total current flowing through RL is the sum of the two currents i1 and i2.
i.e., iL = i1 + i2.
i) Average (or) DC Output Current (Iav or Idc):
The average dc current Idc is given by
dc
I 1
2
0
1 ( )
2
i d t



  +
2
2
0
1 ( )
2
i d t


 
m
2
m
0
sin ( )
1 I sin ( )
2
I 0 0td t td t



   

 
 
 
 
    
mI
 +
mI

m2I
 = 0.318 mI
dc
I m2I

Substituting the value of mI , we get
 
2
I
Lf
m
dc
R R
V
 

This is double that of a Half-Wave Rectifier.
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ii) Average (or) DC Output Voltage (Vav or Vdc):
The dc output voltage is given by
Ldc dcV I R  =
2Im R
L

2 V Rm LV
dc R R
Lf

 

If RL>>Rf then
2 m
dc
V
V


iii) R.M.S. Output Current (Irms):
The value of the R.M.S. current is given by
rmsI
1
2 21 2 ( )
2 0
i d t
L



 
  
 
1
2 21 12 2( ) ( )
1 22 20
i d t i d t
 
 
  
 
   
 
1
2 21 12 2 2 2sin . ( ) sin . ( )
2 20
I t d t I t d t
m m
 
   
  
 
   
 
1
2 2 2I I 21 cos2 1 cos2
( ) ( )
2 2 2 20
t tm md t d t
  
 
  
 
    
         
 
  
1
2 2 22I Isin 2 sin 2
4 40
t tm mt t
t t
 
 
 
    
 
    
    
    
 
   
   
1
2 2 2I I
( 0) (0) (2 0) ( 0)
4 4
m m  
 
 
 
 
 
 
      
1
2 2 2I I
4 4
m m 
 
 
 
 
  
  
1
2 2I
2
4
m
 
 
  
 
 
Im
2

Im
2
Irms  (or)
2
VmIrms
R R
Lf
 
 
 


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iv) R.M.S. Output Voltage (Vrms):
R.M.S. voltage across the load is given by
rms rms LV I R  =
2
Vm R
L
R R
Lf
 
 
 


2 1
VmVrms R
f
R
L
 
 
 
 
 

If RL >> Rf then
2
VmVrms 
v) Rectifier efficiency ( ) :
The rectifier efficiency is defined as the ration of d.c. output power to the a.c. input power
i.e.,
P
dc
Pac
 
242
2
I R
LmP I R
Ldc dc 
 
2
2
2
I
mP I R R R Rac L Lrms f f
   
   
   
   
24 2
2 2
P I R
Ldc m
Pac I R R
Lm f

  
 
 
   

8
2
R
L
R R
L f
 
 
 
 
 


8
2 1
R
f
R
L

 
 
 
 


0.812
1
R
f
R
L


 81.2
%
1
R
f
R
L
 

Theoretically the maximum value of rectifier efficiency of a full-wave rectifier is 81.2%
when
f
L
R
R
= 0. Thus full-wave rectifier has efficiency twice that of half-wave rectifier.
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vi) Ripple Factor ( ) :
The ripple factor,  is given by
2
1
Irms
I
dc

 
 
 
 
   (or)
2
1
Vrms
V
dc

 
 
 
 
  
2
Im 1
2I2 m


 
 
 
 
    =
2
1
2 2
 
 
 
 = 0.48
0.48 
vii) Regulation:
The variation of Vdc with Idc for a full-wave rectifier is obtained as follows:
V
dc
I R
Ldc
 
2Im R
L

2ImI
dc 
 
 
 
Q
2V Rm L
R R
L f
  
 
 


2
1
RV fm
R R
Lf

 
 
 
  
 

2Vm I R
dc f
 
2VmV I R
dc dc f
  
The percentage regulation of the Full-wave rectifier is given by
% Regulation = 100
V V
no load full load
V
full load

 


=
2 2
100
2
V Vm m I R
dc f
Vm I R
dc f
 

 
 
 
 


= 100
I R
dc f
I R
Ldc

 % Regulation = 100
R
f
R
L

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viii) Transformer Utilization Factor (UTF):
The average TUF in full-wave rectifying circuit is determined by considering the primary and
secondary winding separately. There are two secondaries here. Each secondary is associated with
one diode. This is just similar to secondary of half-wave rectifier. Each secondary has TUF as
0.287.
TUF of primary = Pdc / Volt-Amp rating of primary
 TUF P =
2 .
Im .
2 2
I R
Ldc
Vm
=
2
Im2 .
Im
2
R
L
Vm

 
 
 
24I 2
.
2 2
Rm L
I R Rm Lf
  
 
 


8 1
2
1
R
f
R
L

 
 
 
 
 
 
 
 


If RL >>Rf then (TUF)p =
8
2
= 0.812.
 TUF av = Pdc / V-A rating of transformer
=
     
3
TUF p TUF s TUF s 
=
0.812 0.287 0.287
3
 
= 0.693
 TUF = 0.693
ix) Peak Inverse Voltage (PIV):
Peak Inverse Voltage is the maximum possible voltage across a diode when it is reverse
biased. Consider that diode D1 is in the forward biased i.e., conducting and diode D2 is reverse
biased i.e., non-conducting. In this case a voltage Vm is developed across the load resistor RL.
Now the voltage across diode D2 is the sum of the voltages across load resistor RL and voltage
across the lower half of transformer secondary Vm. Hence PIV of diode D2 = Vm + Vm = 2Vm.
Similarly PIV of diode D1 is 2Vm.
x) Form factor (F):
The Form Factor F is defined as F = rms value / average value
F =
Im/ 2
2Im/
=
0.707Im
0.63Im
= 1.12 F=1.12
xi) Peak Factor (P):
The peak factor P is defined as
P= Peak Value / rms value
/ 2
Im
Im
 = 2 = 1.414 P = 1.414
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Problems from previous External Question Paper:
4) A Full-Wave rectifier circuit is fed from a transformer having a center-tapped secondary
winding. The rms voltage from wither end of secondary to center tap is 30V. if the diode
forward resistance is 5Ω and that of the secondary is 10Ω for a load of 900Ω,
Calculate:
i) Power delivered to load,
ii) % regulation at full-load,
iii) Efficiency at full-load and
iv) TUF of secondary.
Solution: Given Vrms = 30V, Rf =5Ω, Rs=10Ω, RL=900Ω
But
2
VmVrms  30 2Vm   = 42.426 V.
Im
Vm
R R R
LSf

 
=
30 2
5 10 900 
= 46.36 mA.
2ImI
dc 
 =
2 46.36


= 29.5mA
i) Power delivered to the load =
2I R
Ldc
=  
2
329.5 10 900  = 0.783W
ii) % Regulation at full-load = 100
V V
no load full load
V
full load

 


2VmV
no load 


=
2 42.426


= 27.02 V.
V I R
Lfull load dc


= 29.5 x 10-3
x 900 = 26.5 V
% Regulation =
27.02 26.5
100
26.5

 = 1.96 %
iii) Efficiency of Rectification =
81.2
1
R R
Sf
R
L


=
15
900
81.2
1
= 79.8%
iv) TUF of secondary = DC power output / secondary ac rating
Transformer secondary rating = Vrms Irms =
46.36 330 10
2
  W
P
dc
=
2I R
Ldc
TUF =
0.783
46.36 330 10
2
 
= 0.796
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5) A Full-wave rectifier circuit uses two silicon diodes with a forward resistance of 20Ω each.
A dc voltmeter connected across the load of 1kΩ reads 55.4volts. Calculate
i) IRMS,
ii) Average voltage across each diode,
iii) Ripple factor, and
iv) Transformer secondary voltage rating.
Solution:
Given Rf =20Ω, RL=1kΩ, Vdc = 55.4V
For a FWR
2VmV
dc 

55.4
2
Vm

  = 86.9 V
Im
Vm
R R
Lf


=0.08519A
i) I
2
Im
rms  = 0.06024A
ii) V= 86.9/2 = 43.45V
iii) Ripple factor
2
1
Irms
I
dc

 
 
 
 
  , =0.05423A I
2
Im
rms  =0.06024A
0.48 
iv) Transformer secondary voltage rating: Vrms
2
Vm
86.9
2
 = 61.49 Volts.
6) A 230V, 60Hz voltage is applied to the primary of a 5:1 step down, center tapped
transformer used in the Full-wave rectifier having a load of 900Ω. If the diode resistance
and the secondary coil resistance together has a resistance of 100Ω. Determine:
i) dc voltage across the load,
ii) dc current flowing through the load,
iii) dc power delivered to the load, and
iv) ripple voltage and its frequency.
Solution: Given Vp(rms) = 230V
2
1
N
N
2
( )
( )
V
S rms
V
P rms

1
5

2
( )
230
V
S rms

( )
V
S rms
 = 23V
Given RL =900Ω, Rf + Rs =100Ω
Im
Vsm
R R R
LSf

 
=
2
( )
V
s rms
R R R
LSf
 
=
2 23
900 100


= 0.03252 Amp.
2ImI
dc 

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2ImI
dc 
  =
2 0.03252


= 0.0207 Amp.
i) VDC = IDC RL = 0.0207 X 100 = 18.6365 Volts.
ii) IDC = 0.0207 Amp.
iii) P
dc
=
2I R
Ldc
(or) VDC IDC = 0.3857 Watts.
iv) PIV = 2Vsm = 2 X 2 X 23 = 65.0538 Volts
v) Ripple factor = 0.482 =
( )
V
r rms
V
DC
Therefore, ripple voltage = Vr(rms) = 0.482 x 18.6365
= 8.9827 Volts.
Frequency of ripple = 2f = 2x60 = 120 Hz
Bridge Rectifier
The full-wave rectifier circuit requires a center tapped transformer where only one half of
the total ac voltage of the transformer secondary winding is utilized to convert into dc output. The
need of the center tapped transformer in a Full-wave rectifier is eliminated in the bridge rectifier.
The bridge rectifier circuit has four diodes connected to form a bridge. The ac input voltage us
applied to diagonally opposite ends of the bridge. The load resistance is connected between the
other two ends of the bridge. The bridge rectifier circuits and its waveforms are shown in figure.
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Fig. and waveforms
Operation:
For the positive half cycle of the input ac voltage diodes D1 and D3 conduct, whereas diodes
D2 and D4 do not conduct. The conducting diodes will be in series through the load resistance RL, so
the load current flows through the RL.
During the negative half cycle of the input ac voltage diodes D2 and D4 conduct, whereas
diodes D1 and D3 do not conduct.
The conducting diodes D2 and D4 will be in series through the load resistance RL and the
current flows through the RL, in the same direction as in the previous half cycle. Thus a
bidirectional wave is converted into a unidirectional wave.
Analysis:
The average values of output voltage and load current, the rms values of voltage and
current, the ripple factor and rectifier efficiency are the same as for as center tapped full-wave
rectifier.
Hence,
2 mV
V
dc 

2ImI
dc 
 Im
Vm
R R
Lf


m
2
V
Vrms  m
2
I
Irms 
Since the each half cycle two diodes conduct simultaneously
0.48 
81.2
2
1
R
f
R
L
 

The transformer utilization factor (TUF) of primary and secondary will be the same as there
is always through primary and secondary.
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TUF of secondary = Pdc / V-A rating of secondary
2I
dc
V Irms rms

2
2Im
2 2
R
L
V Im m

 
 
 
  
  
  
 = 0.812
TUF in case of secondary of primary of FWR is 0.812
 TUF av
   
2
TUF p TUF s

0.812 0.812
2

 = 0.812
TUF = 0.812
The reverse voltage appearing across the reverse biased diodes is 2Vm, but two diodes are
sharing it, therefore the PIV rating of the diodes is Vm.
Advantages of Bridge rectifier circuit:
1) No center-tapped transformer is required.
2) The TUF is considerably high.
3) PIV is reduced across the diode.
Disadvantages of Bridge rectifier circuit:
The only disadvantage of bridge rectifier is the use of four diodes as compared to two
diodes for center-tapped FWR. This reduces the output voltage.
Problems:
7. A bridge rectifier uses four identical diodes having forward resistance of 5Ω and the
secondary voltage of 30V(rms). Determine the dc output voltage for IDC=200mA and the
value of the ripple voltage.
Solution: Vs(rms)=30V, RS=5Ω, Rf=5Ω, IDC=200mA
Now IDC =
Im2

Im =
3200 10
2
 
= 0.3415 Amp.
But Im 2
Vsm
R R R
LS f

 
=
2
( )
2
V
s rms
R R R
LS f
 
0.3415 =
 
2 30
5 2 5 R
L

  
RL = 120.051Ω  120Ω
VDC =IDC RL = 200 x10-3
x120 = 24Volts
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Ripple factor =
( )
V
r rms
V
dc
For Bridge rectifier, ripple factor = 0.482
( )
V
r rms
 = rms value of ripple voltage
= Vdcx0.482
= 24x0.482
=11.568 Volts
8. In a bridge rectifier the transformer is connected to 220V, 60Hz mains and the turns ratio
of the step down transformer is 11:1. Assuming the diode to be ideal, find:
i) Idc
ii) voltage across the load
iii) PIV assume load resistance to be 1kΩ
Solution:
2
1
N
N
=
1
11
, Vp(rms) = 220V, f=60Hz, RL= 1kΩ
2
1
N
N
=
( )
( )
V
S rms
V
P rms
1
11
 =
( )
220
V
S rms

( )
V
S rms
=
220
11
= 20V
Vsm 2 ( )Vs rms
i) Im
Vsm
R
L
 =
28.2842
31 10
= 28.2842 mA
I
dc

2Im

 = 18 mA
ii) Vdc = Idc RL = 18x10-3
Xx10-3
= 18 Volts
iv) PIV = Vsm = 28.2842 Volts
Comparison of Rectifier circuits:
Sl.
No.
Parameter
Half-Wave
Rectifier
Full-Wave Rectifier Bridge Rectifier
1. Number of diodes 1 2 4
2. Average dc current, Idc
Im

2Im

2Im

3. Average dc voltage, Vdc
Vsm

2Vsm

2Vsm

4. RMS current, Irms
2
Im
2
Im
2
Im
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5. DC Power output, Pdc
2
2
I R
Lm

24
2
I R
Lm

24
2
I R
Lm

6. AC Power input, PAC
 2
4
I R R RL Sfm
   2
2
I R R RLSfm
    2 2
2
I R R RLSfm
  
7.
Max. rectifier efficiency
(η)
40.6% 81.2% 81.2%
8. Ripple factor (γ) 1.21 0.482 0.482
9. PIV Vm 2Vm 2Vm
10. TUF 0.287 0.693 0.812
11. Max. load current (Im)
Vsm
R R R
LS f
 
Vsm
R R R
LS f
  2
Vsm
R R R
LS f
 
The Harmonic components in Rectifier circuits:
An analytical representation of the output current wave in a rectifier is obtained by means
of a Fourier series. The result of such an analysis for the half-wave rectifier circuit leads to the
following expression for the current waveform.
  2,4,6.....
1 1 2 cos
I sinm 2 1 1K
t
i t
K K

  
 
 
  
  
 
The lowest angular frequency present in this expression is that of the primary source of the
a.c. power. Except for this single term of angular frequency (ω), all other terms in the above
expression are even harmonics of the power frequency.
We know that the full-wave circuit consists essentially of two half-wave circuits which are
so arranged that one circuit conducts during one half cycle and the second operates during the
second half cycle. That is, the currents are functionally related by the expression
( ) ( )
1 2
i i    .
Therefore the total load current is i=i1+i2.
The expression for the output current waveform of the full wave rectifier circuit is of the form
  2,4,6.....
2 4
Im
cos
1 1K
i
K t
K K 


 
 
 
 
 
 
In the above equation, we observe that the fundamental angular frequency (ω) has been
eliminated from the equation. The lowest frequency in the output is being 2ω, which is a second
harmonic term. This offers a definite advantage in the effectiveness of filtering of the output.
FILTERS
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The output of a half-wave (or) full-wave rectifier circuit is not pure d.c., but it contains
fluctuations (or) ripple, which are undesired. To minimize the ripple content in the output, filter
circuits are used. These circuits are connected between the rectifier and load. Ideally, the output of
the filter should be pure d.c. practically, the filter circuit will try to minimize the ripple at the
output, as far as possible. Basically, the ripple is ac, i.e., varying with time, while dc is a constant
w.r.t. time.
Hence in order to separate dc from ripple, the filter circuit should use components which
have widely different impedance for ac and dc. Two such components are inductance and
capacitance. Ideally, the inductance acts as a short circuit for dc, but it has large impedance for ac.
Similarly, the capacitor acts as open for dc if the value of capacitance is sufficiently large
enough. Hence, in a filter circuit, the inductance is always connected in series with the load, and
the capacitance is connected in parallel to the load.
Definition of a Filter:
Filter is an electronic circuit composed of a capacitor, inductor (or) combination of both and
connected between the rectifier and the load so as to convert pulsating dc to pure dc.
The different types of filters are:
1) Inductor Filter,
2) Capacitor Filter,
3) LC (or) L-Section Filter, and
4) CLC (or) ∏-section Filter.
Inductor Filter:
Half-Wave rectifier with series Inductor Filter:
The Inductor filter for half-wave rectifier is shown in figure below.
Fig. Series Inductor filter for HWR.
In this filter the inductor (choke) is connected in series with the load. The operation of the inductor
filter depends upon the property of the inductance to oppose any change of current that may flow
through it.
Expression for ripple factor:
For a half-wave rectifier, the output current is given by,
  
0
1 1 2 cos
I sinm 2 1 1K even
K
t
i t
K K

 
 
 
 
 
 
  
 
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I I 2I cos2 cos4m m msin .......
2 3 15
t t
i t
 
 
 
 
 
     …………… (1)
Neglecting the higher order terms, we have
Im VmI
dc R
L
 
  ……………… (2)
If I1 be the rms value of fundamental component of current, then
   2 2 2
1
2
Im
2 2 2 2
2 2
L
V Vm mI
dc R j L
L R j L


  


………….(3)
At operating frequency, the reactance offered by inductance „L‟ is very large compared to RL
(i.e., ωL >> RL) and hence RL can be neglected.
1 2 2
VmI
L
  …………..(4)
If I2 be rms value of second harmonic,
Then
3
2
2 2
ImI

  =
1
22 2 2
2
3 2 4
L
Vm
R L  
  

=
3 2
Vm
L
 R L
L
Q ……. (5)
If Iac be the rms value of all current components, then
2 2
1 2I I Iac  
Now,
I RV Iacac acL
V I R I
Ldc dc dc
   
2 2
2 2 2 2
V Vm m
L L
Vm
R
L
 

   
   
   


1 1
28 18
Vm
L
Vm
R
L
 



1 1
28 18
R
L
L

 
 
1.13R
L
L

1.13R
L
L
  …………(6)
Full-wave rectifier with series inductor filter:
A FWR with series inductor filter is shown in figure.
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FIG. FWR with series inductor filter.
The inductor offers high impedance to a.c. variations. The inductor blocks the a.c.
component and allows only t
he dc component to reach the load.
To analyze the inductor filter for a FWR, the Fourier series can be written as
2 4 1 1
cos2 cos6 .......
3 15O
V Vm mV t t 
 
 
  
    ………………..(1)
The dc component is
2Vm

Assuming the third and higher terms contribute little output voltage is
2 4
cos2
3O
V Vm mV t
 
  …………………(2)
For the sake of simplicity, the diode drop and diode resistance are neglected because they
introduce a little error. Thus for dc component, the current Im
Vm
R
L
 . For ac component, the
impedance of L and RL will be in series and is given by,
 
22
2LZ R L  , frequency of ac component = 2ω
=
2 2 2
4LR L
Thus for ac component
2 2 2
Im
4L
Vm
R L


The current flowing in a FWR is given by,
2 4
cos2
3
I Im mi t
 
  ……………..(3)
Substituting the value of Im for dc and ac equation (3), we get,
 2 2 2
2 4
cos 2
3 4L
V Vm mi t
R R LL
 
  
  

…………….(4)
Where Ф is the angle by which the load current lags behind the voltage. This is given by
21tan
L
R
L


 
 
 
 
 …………….(5)
Expression for Ripple Factor:
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,Ir rms
I
dc
 
From equation (4),
2VmI
dc R
L

 ,
2 2 2
4
,
3 2 4L
VmIr rms
R L 


2 2 2
1
3 2
4
4
2
L
Vm
R L
Vm
R
L
 




g
2 2
2
2 1
3 2 4
1
L
L
R


 
 
 
 


 g
If
2 2
2
4
L
L
R

>>1, then
1
3 2
R
L
L


 g = 0.236
R
L
L

.
3 2
R
L
L


  ……………….. (6)
The expression shows that ripple varies inversely as the magnitude of the inductance, Also,
the ripple is smaller for smaller values of RL i.e., for high currents.
When R
L
 the value of  is given by
2
3 2
  = 0.471 (close to the value 0.482 of
rectifier). Thus the inductor filter should be used when RL is consistently small.
Problems:
9. A full-wave rectifier with a load resistance of 15kΩ uses an inductor filter of 15H. The peak
value of the applied voltage is 250V and the frequency is 50 cycles/second. Calculate the
dc load current, ripple factor and dc output voltage.
Solution: The rectified output voltage across load resistance RL up to second harmonic is
2 2
cosO
V Vm mV t
 
 
Therefore, DC component of output voltage is given by
2VmV
dc 

2V Vdc mI
dc R R
L L

  
2 250
315 10


 
= 10.6 x 10-3
A = 10.6 mA
Vdc = Idc RL = (2.12x10-3
) (15x103
) = 31.8 V.
Peak value of ripple voltage =
4
3
Vm

41
32
VmVac 
 
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Now
 
22
41
32
2L
Vm
Iac
R L




g
 
22
2 2
3 2L
Vm
R L 


   
23
2 1.414 250
3 3.14 15 10 4 3.14 50 15
 

     
= 4.24x10-3
A = 4.24 mA
So, ripple factor,
Iac
I
dc
  =
4.24
10.6
mA
mA
= 0.4
10. A dc voltage of 380 volt with a peak ripple voltage not exceeding 7volt is required to supply
a 500Ω load. Find out if only inductor is used for filtering purpose in full-wave rectifier
circuit,
i) inductance required and
ii) input voltage required, if transformer ratio is 1:1.
Solution:
i) Given that peak ripple = 7V
Therefore, 7= 2 Vrms
7
2
Vrms  = 4.95V
Now
Vrms
V
dc
 
4.95
380
 = 0.013
In case of inductor filter
1
3 2
R
L
L



1
3 2
R
LL

 
1
1335
R
LL

   (f=50Hz)
500
1335 0.013
L 

= 28.8 Henry
ii)
2VmV
dc 
 = 0.636Vm
0.636
V
dcVm 
380
0.636
 = 597.4 V
This is maximum voltage on half secondary. So, the voltage across complete secondary =
2x 597.4 = 1195V
 Input voltage = 1195V because turns ratio is 1:1.
Capacitor Filter:
Half-wave rectifier wit capacitor filter:
The half-wave rectifier with capacitor input filter is shown in figure below:
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Fig. HWR with capacitor filter.
The filter uses a single capacitor connected in parallel with the load RL. In order to minimize
the ripple in the output, the capacitor C used in the filter circuit is quite large of the order of tens of
microfarads.
The operation of the capacitor filter depends upon the fact that the capacitor stores energy
during the conduction period and delivers this energy to the load during non-conduction period.
Operation:
During, the positive quarter cycle of the ac input signal, the diode D is forward biased and
hence it conducts. This quickly charges the capacitor C to peak value of input voltage Vm.
Practically the capacitor charge (Vm-Vγ) due to diode forward voltage drop.
When the input starts decreasing below its peak value, the capacitor remains charged at Vm
and the ideal diode gets reverse biased. This is because the capacitor voltage which is cathode
voltage of diode becomes more positive than anode.
Therefore, during the entire negative half cycle and some part of the next positive half
cycle, capacitor discharges through RL. The discharging of capacitor is decided by RLC, time
constant which is very large and hence the capacitor discharge very little from Vm.
In the next positive half cycle, when the input signal becomes more than the capacitor
voltage, he diode becomes forward biased and charges the capacitor C back to Vm. The output
waveform is shown in figure below:
Fig. HWR output with capacitor filter.
The discharging if the capacitor is from A to B, the diode remains non-conducting. The
diode conducts only from B to C and the capacitor charges.
Expression for Ripple factor:
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Let, T = time period of the ac input voltage
T1 = time for which the diode is non conducting.
T2 = time for which diode is conducting.
<
Let Vr be the peak to peak value of the ripple voltage which is assumed to be triangular
waveform. It is known mathematically that the rms value of such a triangular waveform is
'
2 3
VrVrms 
During the time interval T1, the capacitor C is discharging through the load resistance RL.
Therefore the charge lost is Q= C Vr
But,
dQ
i
dt

1
0
T
Q idt   = Idc .T1
As integration gives average (or) dc value,
Hence Idc .T1 = C . Vr
1
I T
dcVr C
 
But T1+T2 = T Normally, T1>>T2,
1 2 1 1
T T T T T    
I T
dcVr C

 
I
dc
f C


1
T
f
 
 
 
 
But
V
dcI
dc R
L
 ,
2
VrV Vmdc



  ,
2
I
dcVm fc



 
V
dcVr fCR
L
 
Ripple factor,
'Vrms
V
dc
 
2 3
Vr
V
dc
 
 2 3
V
dc
fCR V
L dc


1
2 3 fCR
L
 
The product of CRL is the time constant of the filter circuit.
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Surge current in Half-wave rectifier using capacitor filter:
Fig. Surge current in HWR using capacitor filter
In half-wave rectifier, the diode is forward biased only for short period of time and conducts
only during this time interval to charge the filter capacitance. The instant at which the diode gets
forward biased, the capacitor instantaneously acts as short circuit and a surge current flow through
a diode.
When the diode is non-conducting, the capacitor discharges through load resistance RL.
Thus total amount of charge that flows through conducting diode (or) diodes to recharge the
capacitor must be equal to the amount of charge lost during the period when the diode (or) diodes
are non-conducting and capacitor is discharging through load resistance RL.
It can be seen that conduction period T1 is very small compared to time period T, for the
diode. Let, Idc = average dc current
Ip(surge) = peak value of the surge current.
Assume the current pulse to be rectangular assuming peak surge current flows for the
entire conduction period of diode which is T1.
Then Q (discharge) = Q (charge)
,
1( )
I T I T
dc P surge
 
( )
1
T
I I
P surge dc T
 
 
 
 
 
As T1 << T, it can be observed that Ip(surge) can be many times larger than the average dc
current supplied to the load.
Problem from previous External examinations:
10. A HWR circuit has filter capacitor of 1200μF and is connected to a load of 400Ω. The
rectifier is connected to a 50Hz, 120V rms source. It takes 2msec for the capacitor to
recharge during each cycle. Calculate the minimum value of the repetitive surge current
for which the diode should be rated.
Solution:
Given C=1200μF, RL=400Ω, f=50Hz, Vrms=120V
Conduction period of the diode, T1=1ms
2
( )
V Vsm S rms
  = 2 120  V
2
I
dcV Vsmdc fC
 
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
2
V
dcV Vsmdc fCR
L
 
1
1
2
VsmV
dc
fCR
L
 

120 2
1
1
62 50 1200 10 400


   
= 3.46 V
V
dcI
dc R
L
 
3.46
400
 =8.658mA
Now IdcT = Ip(surge)T1
( )
1
T
I I
P surge dc T
 
 
 
 
 =8.658mA x
1
350 10
( )
I
P surge
  0.17316 A
Full-wave rectifier with capacitor filter:
The full-wave rectifier with capacitor filter is shown in the figure below:
Fig. Full-wave rectifier with capacitor filter
Operation:
During the positive quarter cycle of the ac input signal, the diode D1 is forward biased, the
capacitor C gets charges through forward bias diode D1 to the peak value of input voltage Vm.
In the next quarter cycle from
2

to  the capacitor starts discharging through RL,
because once the capacitor gets charges to Vm, the diode D1 gets reverse biased and stops
conducting, so during the period from
2

to  the capacitor C supplies the load current.
In the next quarter half cycle, that is,  to
3
2

of the rectified output voltage, if the input
voltage exceeds the capacitor voltage, making D2 forward biased, this charges the capacitor back
to Vm.
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In the next quarter half cycle, that is, from
3
2

to 2 , the diode gets reverse biased and
the capacitor supplies the load current.
In FWR, as the time required by the capacitor to charge is very small and it discharges very
little due to large time constant, hence ripple in the output gets reduced considerably. The output
waveform is shown in figure below:
Fig. FWR output with capacitor filter.
Expression for Ripple factor:
Let, T = time period of the ac input voltage
2
T
= half of the time period
T1 = time for which diode is conducting
T2 = time for which diode is non-conducting
During time T1, capacitor gets charged and this process is quick. During time T2, capacitor
gets discharged through RL. As time constant RLC is very large, discharging process is very slow
and hence T2>>T1.
Let Vr be the peak to peak value of ripple voltage, which is assumed to be triangular as
shown in the figure below:
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Fig. Triangular approximation of ripple
It is known mathematically that the rms value of such a triangular waveform is,
2 3
VrVrms 
During the time interval T2, the capacitor C is discharging through the load resistance RL.
The charge lost is, Q = CVr But
dQ
i
dt

2
2
0
DC
T
Q idt I T  
As integration gives average (or) dc value, hence Idc .T2 = C . Vr
2I T
dcVr C
  But
1 2 2
T
T T 
Normally, T2 >> T1,
1 2 1 2
T
T T T    where
1
T
f

2
DCI T
Vr C
 
 
 
 
2
DCI T
C


2
I
DC
fC

But
DC
DC
V
I
R
L
 ,
2
DCV
Vr fCR
L
  = peak to peak ripple voltage
Ripple factor,
Vrms
V
dc

2 1
2 3
V
dc
fCR
L
V
dc
 
2 3
VrVrms
 
 
 
 
Ripple factor
1
34 fCR
L

L-Section Filter (or) LC Filter:
The series inductor filter and shunt capacitor filter are not much efficient to provide low
ripple at all loads. The capacitor filter has low ripple at heavy loads while inductor filter at small
loads. A combination of these two filters may be selected to make the ripple independent of load
resistance. The resulting filter is called L-Section filter (or) LC filter (or) Choke input filter. This
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name is due to the fact that the inductor and capacitor are connected as an inverted L. A full-wave
rectifier with choke input filter is shown in figure below:
Fig. Full-wave rectifier with choke input filter.
The action of choke input filter is like a low pass filter. The capacitor shunting the load
bypasses the harmonic currents because it offers very low reactance to a.c. ripple current while it
appears as an open circuit to dc current.
On the other hand the inductor offers high impedance to the harmonic terms. In this way,
most of the ripple voltage is eliminated from the load voltage.
Regulation:
The output voltage of the rectifier is given by,
2 4
cos2
3
V Vm m t
 
  
The dc voltage at no load condition is
2VmV
dc 

The dc voltage on load is
2VmV I R
dc dc
 
Where R R R R
C Sf
  
, ,R R R
C Sf
are resistances of diode, choke an secondary winding.
Ripple Factor:
The main aim of the filter is to suppress the harmonic components. So the reactance of the
choke must be large as compared with the combined parallel impedance of capacitor and resistor.
The parallel impedance of capacitor and resistor can be made small by making the
reactance of the capacitor much smaller than the resistance of the load. Now the ripple current
which has passed through L will not develop much ripple voltage across RL because the reactance
of C at the ripple frequency is very small as compared with RL.
Thus for LC filter, XL >> XC at 2ω = 4Πf and RL >> XC
Under these conditions, the a.c. current through L is determined primarily by XL= 2ωL (the
reactance of the inductor at second harmonic frequency). The rms value of the ripple current is
4 1
.
( ) 3 2
VmI
r rms X
L

22
3 2
Vm
X
L

 
 
 
  2
3
V
dcX
L

Always it was stated that XC is small as compared with RL, but it is not zero. The a.c.
voltage across the load (the ripple voltage) is the voltage across the capacitor.
Hence
   
V I Xr rms r rms C
 
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2
3
V X
CdcX
L
  
 
  

We know that ripple factor  is given by
 
Vr rms
V
dc
 
2
3
X
C
X
L

But
1
2
X
C C
 and XL = 2ωL
 
2 1
3 2 2L C 
   2
1
6 2 LC

1
26 2 LC


 
This shows that ω is independent of RL.
The necessity of Bleeder Resistance RB:
The basic requirement of this filter circuit is that the current through the choke must be
continuous and not interrupted. An interrupted current through the choke may develop a large
back e.m.f which may be in excess of PIV rating of the diodes and/or maximum voltage rating of
the capacitor C. Thus this back e.m.f is harmful to the diodes and capacitor. To eliminate the back
e.m.f. developed across the choke, the current through it must be maintained continuous. This is
assured by connecting a bleeder resistance, RB across the output terminals.
The full-wave rectifier with LC filter and bleeder resistance is shown in the figure below:
Fig. filter with Bleeder resistance
We know,
2
DC
C
VsmI
R R


where RC is choke terminal resistance , R is R R
B L
P
4
2 3 2
VsmI
m L 

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Thus IDC is seen to depend on load resistance R R RB L
  P while I2m does not. I2m is
constant, independent of RL. The second harmonic terminal I2m is superimposed on IDC, as shown in
figure. If the load resistance is increased, IDC will decrease, but I2m will not.
If the load resistance is still further increased, a stage may come where IDC may become
less than I2m. In such situation, for a certain period of time in each cycle, the net current in the
circuit will be zero. In other words, the current will be interrupted and not continuous. This
interruption of current, producing large back emf is harmful to both the diodes and filter capacitor
C. To avoid such situation, certain minimum load current has to be drawn. For this purpose, the
bleeder resistance RB is so selected that it draws, a minimum current through choke.
The condition is IDC ≥ I2m
2
DC
C
VsmI
R R


≥
4
2 3 2
VsmI
m L 

3CR R L   Usually RC << R, then 3R L
Since R = R RB LP , considering the worst case that the load resistance RL is not
connected, then R=RB 3R L
B
 
6R fL
B
   2 f Q
If f=50Hz then 943R L
B
 Practically, RB is selected to be equal to 900L.
Critical Inductance:
We have assumed that the current flows through the circuit all the times. For this, the
value of inductance L must be kept above certain minimum value which is called critical
Inductance. This value of inductance depends on load resistance RL and supply frequency ω.
The required value of critical inductance for 50Hz supply frequency is
943C
R
LL 
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Problem from previous External examination:
12. A full-wave rectifier supplies a load requiring 300V at 200mA. Calculate the transformer
secondary voltage for
i) a capacitor input filter using a capacitor of 10μF.
ii) a choke input filter using a choke of 10H and a capacitance of 10μF.
Neglect the resistance of choke.
Solution:
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Multiple L-Section filters:
The number of L-sections i.e., LC circuits can be connected one after another to obtain
multiple L-section filter. It gives excellent filtering and smooth dc output voltage. The figure below
shows multiple L-section filter.
Fig. Multiple L-sections.
For two section LC filter, the ripple factor is given by
2 1 2. .
3
1 2
X X
C C
X X
L L
 
CLC Filter (or) Π – section Filter:
This is capacitor input filter followed by a L-section filter. The ripple rejection capability of
a Π-section filter is very good. The full-wave rectifier with Π-section filter is shown in the figure.
Fig. Π-section Filter.
It consists of an inductance L with a dc winding resistance as RC and two capacitors C1 and
C2. The filter circuit is fed from fill wave rectifier. Generally two capacitors are selected equal.
The rectifier output is given to the capacitor c1. This capacitor offers very low reactance to
the ac component but blocks dc component. Hence capacitor C1 bypasses most of the ac
component. The dc component then reaches to the choke L. The choke L offers very high
reactance to dc. So it blocks ac component and does not allow it to reach to load while it allows dc
component to pass through it. The capacitor C2 now allows to pass remaining ac component and
almost pure dc component reaches to the load. The circuit looks like a Π, hence called Π-Filter.
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Ripple Factor:
The Fourier analysis of a triangular wave is given by
sin 4 sin6
sin ....
2 3
V t trV t
dc
 
 

 
 
 
    ……………(1)
In case of full wave rectifier with capacitor filter, we have proved that
12 2
I I
dc dcV
fC fC    1
C C here  ……………(2)
The rms second harmonic voltage is
  2
VrVr rms  ………….(3)
Substituting the value of Vr from equation (2) in equation (3), we get
  1
1
2 .
2 2
I
dcV I XCr rms dcfC
  …………(4)
Where
1
1 1
1 1
2 4
XC
C fC 
  = reactance of C1 at second harmonic frequency.
The voltage Vr(rms) is impressed on L-section.
Now, the ripple voltage V‟r(rms) can be obtained by multiplying Vr(rms) by 2XC
XL
i.e.,
   ' 1
XC
V Vr r rms Xrms L
 
(or)  ' 22 .
1
XC
V I XCr dc Xrms L
 …………(5)
 'Vr rms
V
dc
 
22 .
1
XC
I XC
dc X
L
V
dc

2. .
1 2
.
XC XC
R X
L L
 
1I
dc
V R
Ldc
 
 
 
 
Q
2. .
1 2
.
XC XC
R X
L L
 
Here all reactances are calculated at second harmonic frequency. Substituting the values,
we get
2
38
1 2
C C LR
L

 
At f= 50Hz,
5700
1 2
LC C R
L
 
Where C1 and C2 are in μF, L in henrys and RL in ohms.
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Multiple Π-Section Filter:
To obtain almost pure dc to the load, more Π-sections may be used one after another. Such
a filter using more than one Π-section is called multiple Π-section filter. The figure shows multiple
Π-section filters.
Fig. Multiple Π-section Filter.
The ripple factor of two section Π-filter is given by
11 12 222. . .
1 2
X X X
C C C
R X X
L
 
Problems:
14. Design a CLC (or) Π-section filter for Vdc=10V, IL=200mA and γ=2%
Solution:
V
dcR
L I
L

10
3200 10


= 50Ω
5700
1 2
LC C R
L
 
5700
0.02
1 2
LC C R
L
 
114
1 2
LC C

If we assume L=10H and C1=C2=C, we have
114
0.02
2LC
 
11.4
2C

C2
= 750 570 = 24μF
Voltage Regulators:
A voltage regulator is an electronic device which produces constant output voltage
irrespective of variations in the input voltage and load variations.
A voltage regulator is an electronic circuit that produces a stable dc voltage independent of
the load current, temperature and ac line voltage variations.
Factors determining the stability:
The output voltage VO depends on the input unregulated dc voltage Vin, load current IL and
temperature T. Hence the change in output voltage of power supply can be expressed as follows:
O O O
O
V V V
V V I Tin LV I Tin L
  
      
  
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V L TO OV S V R I S Tin      
Where the three coefficients are defined as
Input regulation factor,
; 0
0
OV
SV V TV inin


   
Output resistance,
; 0
0
O
O
V
R
V TI inL


   
Temperature coefficient,
; 0
0
OV
ST V IT Lin


   
Smaller the value of the three coefficients, better the regulation of power supply.
Load Regulation:
Load regulation is expressed as
Load regulation =
V V
no load full load
V
no load

 

(or)
Load regulation =
V V
no load full load
V
full load

 

Where Vno-load is the output voltage at zero load current and Vfull-load is the output voltage at
related load current. This is usually denoted in percentage.
Zener diode voltage regulator:
Fig. Zener Regulator.
Zener voltage regulator is shown in figure above, in which a zener diode is connected in
parallel to the load resistance RL. The resistance RS is a current limiting resistor.
Vi, RS and RL fixed:
The analysis can be carried out into two steps.
i) Determining the state of the zener diode by removing it from the network and
calculating the voltage across the resulting open circuit.
R ViLV Vo R RLS
 

if V ≥ VZ the zener diode is „ON‟
if V < VZ the zener diode is „OFF‟.
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ii) Substitute the appropriate equivalent circuit and solve for the desired unknowns.
V VZO 
I I IZ R L 
VZIL RL

VRIR RS

V V ViR Z 
P V IZ Z Z
Problem:
For the zener diode network of below figure determine VO, VR, VZ and PZ. Repeat the same
with RL=3kΩ
Solution:
To find the diode status, replace the diode by open circuit and by finding the voltage across
the open circuit.
16 1.2
1 1.2
V k
Vo k
 

 
16 1.2
2.2
Vo

 = 8.72 Volts
,V Vo Z  the zener diode is in „OFF‟ state 0IZ 
8.72
1.2
VLIL R kL
  = 7.27 mA
16 7.27
1
V V VoiRIR R R k
 
  

= 8.72 mA
With RL = 3KΩ:
16 3
4
Vo

 = 12Volts.
VO > VZ  The zener diode is „ON‟.
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The equivalent circuit is replacing the zener by its equivalent voltage, to determine all the
parameters are shown below.
16 3
4
VL

 = 12 Volts
Zener is ON
10V V Vo Z  
10
3.33
3
VZI mAL R kL
  

16 10 6
6
1 1
V V ViR ZI mAR R R k k
 
    
 
I I IR Z L 
I I IZ R L  = 6-3.33 = 2.667 mA
.P V IZ Z Z = 10x2.667 = 2.66 mW.
Fixed Vi, R and variable RL:
R ViLV Vo Z R R
S
 

Solving for RL
min
R Vi ZR
L V Vi Z


max
min
VZIL R
L

Once the diode is in „ON‟ state
V V ViR Z 
VRIR R
 I I IZ R L 
min
I I IR ZML
  max
min
VZRL I
L

Problem:
For the network shown below, determine the range of RL and IL that will result in VL being
maintained at 10V.
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Solution:
. 1 10 10
0.25
min 50 10 40
RV k V kZR k
L V Vi Z
 
    
 
10
40max 0.25
min
VZI mAL R k
L
  
V V ViR Z 
50 10 40VR   
40
40
1
VRI mAR R k
  

min
I I IR ZML
 
= 40-32 = 8mA
10
1.25max 8
min
VZR kL I mA
L
   
Fixed R, RL and variable Vi:
R ViLV Vo Z R RL
 

 
min
R R VL ZV
i RL


maxI I IR ZM L 
VZIZ RL

max maxV V Vi R Z 
 .max maxV I RR R
Problem:
Determine the range of values of Vi, that will maintain the zener diode of figure below is in
the „ON‟ state.
Solution:
Vimin = 23.67V Vimax = 36.87V
 
min
R R VL ZV
i RL


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 220 1200 20
23.67
1200
V

 
max maxV V Vi R Z 
 maxI R VR Z 
 I I R VZM L Z  
 
20
60 220 20
1.2
mA
k
 
 
 
  
=36.87 Volts
Basic Voltage Regulator:
The basic voltage regulator in its simplest form consists of,
i) Voltage reference, VR
ii) Error amplifier
iii) Feedback network
iv) Active series (or) shunt control element.
The voltage reference generally a voltage level which is applied to the comparator circuit,
which is generally error amplifier. The second input to the error amplifier is obtained through
feedback network. Generally using the potential divider, the feedback signal is derived by sampling
the output voltage. The error amplifier converts the difference between the output sample and the
reference voltage into an error signal. This error signal in turn controls the active element of the
regulator circuit, in order to compensate the change in the output voltage. Such an active element
is generally a transistor. Thus the output voltage of the regulator is maintained constant.
Types of voltage Regulators:
There are two types of voltage regulators available namely,
i) Shunt voltage regulator
ii) Series voltage regulator
Each type provides a constant dc output voltage which is regulated.
Shunt Voltage Regulator:
The heart of any voltage regulator circuit is a control element.
If such a control element is connected in shunt with the load, the regulator circuit is called
shunt voltage regulator.
The figure shows the block diagram of shunt voltage regulator circuit.
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Fig. Block diagram of shunt voltage regulator.
The unregulated input voltage Vin, tries to provide the load current. But part of the current
is taken by the control element, to maintain the constant voltage across the load.
If there is any change in the load voltage, the sampling circuit provides a feedback signal to
the comparator circuit.
The comparator circuit compares the feedback signal with the reference voltage and
generates a control signal which decides the amount of current required to be shunted to keep the
load voltage constant.
For example, if load voltage increases then comparator circuit decides the control signal
based on the feedback information, which draws increased shunt current Ish value.
Due to this, the load current IL deceases and hence the load voltage decreases to its
normal.
Thus control element maintains the constant output voltage by shunting the current; hence
the regulator circuit is called voltage shunt regulator circuit.
Series Voltage Regulator:
If in a voltage regulator circuit, the control element is connected in series with the load, the
circuit is called series voltage regulator circuit.
Figure shows the block diagram of series voltage regulator circuit.
The unregulated dc voltage is the input to the circuit.
Fig. Block diagram of series voltage regulator.
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The control element controls the amount of the input voltage that gets to the output. The
sampling circuit provides the necessary feedback signal. The comparator circuit compares the
feedback with the reference voltage to generate the appropriate control signal.
For example, if the load voltage tries to increase, the comparator generates a control signal
based on the feedback information. This control signal causes the control element to decrease the
amount of the output voltage. Thus the output voltage is maintained constant.
Thus, the control element which regulates the load voltage, based on the control signal is in
series with the load and hence the circuit is called series voltage regulator circuit.
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Comparison of Shunt and Series voltage regulators:
Sl.
No.
Shunt Regulator Series Regulator
1.
The control element is in parallel with
the load.
The control element is in series with
the load.
2.
Only small current passes through the
control element which is required to be
diverted to keep output constant
The entire load current IL always
passes through the control element.
3.
Any change in output voltage is
compensated by changing the current
Ish through the control element as per
the control signal.
Any change in output voltage is
compensated by adjusting the voltage
across the control element as per the
control signal.
4.
The control element is low current,
high voltage rating component.
The control element is high current,
low voltage rating component.
5. The regulation is poor. The regulation is good.
6. Efficiency depends on the load current.
Efficiency depends on the output
voltage.
7.
Not suitable for varying load
conditions. Preferred for fixed voltage
applications.
Preferred for fixed as well as variable.
8. Simple to design.
Complicated to design as compared to
shunt regulators.
9.
Examples: Zener Shunt regulators,
transistorized shunt regulator etc.,
Examples: Series feedback type
regulator, series regulator with pre-
regulator and feedback limiting etc.,
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UNIT III – SPECIAL SEMICONDUCTORS
SYLLABUS
SPECIAL SEMICONDUCTOR DEVICES: Principle of operation, characteristics and applications of tunnel diode,
varactor diode, UJT, photo diode, LED, LCD, SCR.
<,
LECTURE PLAN
S.
No.
Topics to be covered
No. of
Periods
1 Characteristics of Tunnel Diode with the help of Energy band diagrams 1
2 Varacter Diode, Photo Diode 1
3 LED, LCD 1
4 SCR 1
5 Photo Diode 1
TOTAL 5
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Varactor Diode:
 We know that the transition capacitance c(t) is given by c(t)=

A
 In both alloy junction diode and grown junction diode as the magnitude of the reverse bias
increases, the width „w‟ of the transition region increases, and the junction capacitance c(t)
reduces.
 The voltage- variable nature of transition capacitance of reverse-biased pn- junction may
be utilized in several applications such as
1) In voltage tuning of an LC resonant.
2) Self balancing bridge circuits.
3) In parametric amplifiers etc.
4) FM radio and TV receivers, AFC circuits.
5) Used in adjustable band pass filters.
 This special diode is made especially for the above applications which are biased on the
voltage- variable capacitance are called “Varactor diode” or “Varicap” or “Voltacap”.
 Varactor diode symbol and circuit models are shown below.
Rs: Body series resistance.
C(t): Barrier capacitance.
rR : Reverse diode resistance.
 Typically, at a reverse bias of 4v,
C(t)= 20pF, R(s)=8.5 ohms, R(r)>1M (usually neglected).
Tunnel diode:
 A normal pn-junction has an impurity concentration of about 1 part in 10^8. With this
amount of doping, the width of depletion layer, which constitutes the potential barrier of
the junction, is of the order of 5 microns (5x10-4
cm).
 If the concentration of impurity atoms is greatly increased, say 1 part in 103
the device
characteristics are completely changed. The new diode was announced in 1958 by Leo
Esaki. This diode is called „Tunnel diode‟ or „Esaki diode‟.
 The barrier potential VB is related with the width of the depletion region with the following
equation.
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q NAV . ²B 2


B2V
² .
q NA


 
 From the above equation the width of the barrier varies inversely as the square root of
impurity concentration.
 As the depletion width decreases there is a large probability that an electron will penetrate
through the barrier. This quantum mechanical behavior is referred to as tunneling and
hence these high impurity density pn-junction devices are called Tunnel diodes. This
phenomenon is called as „tunneling‟.
Energy band structure of heavily doped pn-junction diode under open circuited
conditions:
In the energy band structure for the lightly doped pn-diode, the Fermi level Ef lies inside
the forbidden energy gap. In the heavily doped pn-diode Ef lies out side the forbidden band.
We know that, Ef = Ec – KT ln(Nc/ND)
For a lightly doped semiconductor, ND<Nc, So that
Ncln
ND
 
 
 
 
is a positive number. Hence Ef
< Ec, and the Fermi level lies inside the forbidden band.
For a heavily doped semiconductor donor concentrations are more so that, ND> Nc and is
Ncln
ND
 
 
 
 
a negative number. Hence Ef > Ec, and the Fermi level lies outside the forbidden band.
Similarly,
NvE E KT ln .vf NA
 
 
 
 
 
For heavily doped p-region, NA> NV, and the Fermi-level lies in the Fermi-level lies in the
valance band.
The energy band structure in a heavily doped pn-diode under open circuited condition is
shown in the figure.
We have
N NVCE KT lnG 2ni

 
 
 
 
N ND AE KT lno 2ni

 
 
 
 
Comparing above two equations for heavily doped pn-diode we find that EO>EG. Therefore,
the contact difference of potential energy EO exceeds the forbidden energy gap voltage EG.
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Fig. energy band in a heavily doped pn-diode under open circuited condition.
The Fermi level Ef in the p-side is at the same energy as the Fermi level Ef in the n-side.
Note that there are no filled states on one side of the junction which are at the same energy as
empty allowed states on the other side. Hence there can be no flow of charge in either direction
across the junction, and the current is zero for an open circuited diode.
The volt-ampere characteristic:
If a reverse bias voltage is applied to the tunnel diode, the height of the barrier is increased
above the open-circuit value EO. Hence the n-side levels must shift downward with respect to the
p-side levels as shown in the figure below.
Fig. Under applied reverse bias
We now observe that there are some energy states in the valance band of the p-side which
lie at the same level as allowed empty states in the conduction band of the n-side. Hence these
electrons will tunnel from the p to the n-side, giving rise to a reverse diode current. As the
magnitude of the reverse bias increase, causing the reverse current to increase.
Consider if a forward bias is applied to the diode so that the potential barrier is decreased
below Eo. Hence the n-side levels must shift upward with respect to those on the p-side.
The energy band diagrams for a heavily doped under forward bias conditions are shown in
figure below.
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Fig. As the bias is increased, the band structure changes progressively from (a) to (d).
From fig (a) we can observe that the electrons will tunnel from the n to the p material giving rise to
the forward current. As the forward bias is increased further, the maximum number of electrons
can leave from occupied states on the right side of the junction, and tunnel through the barrier to
the empty states on the left side of the junction giving rise to the peak current Ip.
If still more forward bias is applied, fig© is obtained and the tunneling current decreases.
Finally if the forward bias is larger there is no9 empty allowed states on one side of the junction at
the same energy as occupied states on the other side, the tunneling current must drop to zero.
The v-I characteristics of tunnel diode is shown in fig.
Fig.-I Characteristics of a tunnel diode.
The tunnel diode exhibits a negative resistance characteristics between peak current Ip and
valley current Iv. The tunnel diode is excellent conductor in the reverse bias conditions.
By applying small forward bias voltage to the tunnel diode the current increases and
reaches to the maximum level. The maximum for small forward bias voltage is called as „peak
current (Ip)‟.The corresponding voltage to the peak current is called „peak voltage (Vp)‟.
If forward bias voltage is increased beyond the peak voltage the current starts decreasing
and reaches to the maximum level. This minimum value of the current is called as “valley current
(Iv)”. The corresponding voltage to the valley current is called as “valley voltage (Vv)”.
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If forward bias voltage is increased beyond valley voltage it exhibits the same
characteristics as ordinary diode.
The tunnel diode symbol and small-signal model are shown in fig. below.
Applications of Tunnel diode:
1. It is used as a very high speed switch, since tunneling takes place at the speed of light.
2. It is used as a high frequency oscillator.
Light Emitting Diode (LED):
The LED is an optical diode which emits light when forward biased, by a phenomenon called
electroluminescence. The LEDs use the materials like Gallium Arsenide (GaAs), Gallium Arsenide
Phospide (GaAsP) or Gallium Phospide (GaP). These are the mixtures of elements Ga,As,P.
The symbol of LED is shown in figure below:
When an LED is forward biased, the electrons and holes move towards the junction and
recombination takes place. As a result of recombination, the electrons lying in the conduction bands
of n-region fall into the holes lying in the valance band of p-region.
The difference of energy between the conduction band and the valance band is radiated in
the form of light energy. The energy released in the form of light depends on the energy
corresponding to the forbidden gap. This determines the wavelength of the emitted light.
The wavelength determines the color of the light and also determines whether the light is
visible or invisible (infrared).
The color of the emitted light depends on the type of material used.
Gallium Arsenide (GaAs) --- Infrared radiation (invisible)
Gallium Phospide (GaP) --- Red or Green
Gallium Arsenide Phospide (GaAsP) --- Red or Yellow.
The brightness of the emitted light is directly proportional to the forward bias current.
Output characteristics of LED:
The amount of power output translated into light is directly proportional to the forward
current If. More the forward current If, the greater is the output light.
The graph of forward current and output light in mW is shown in the figure below. This is
called output characteristics for LED.
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Fig. Typical output characteristics for LED.
Fig. Process of electro luminescence
Advantages of LEDs:
1. LEDs are small in size.
2. LEDs are fast operating devices.
3. LEDsare light in weight.
4. LEDs are available in various colors.
5. The LEDs have long life.
6. The LEDs are cheap and readily available.
7. LEDs are easy to interface with various other electronic circuits.
Disadvantages of LEDs:
1. Needs large power for the operation.
2. The characteristics are affected by the temperature.
Applications of LEDs:
The LEDs are used in all kinds of visual displays i.e., seven segment displays and alpha
numeric displays. Such displays are commonly used in multimeter, calculator, watches etc.
LEDs are also use din optical devices such as optocouplers. They are also used in burglar
alarm systems.
Liquid Crystal Displays:
A liquid crystal is a material that will flow like a liquid but whose molecular structure has
some properties normally associated with solids. Therefore the liquid crystals have been called the
“forth state of matter” after solids, liquids and gases.
Unlike LEDs and other electroluminescent devices, LCDs do not generate light energy but
simply alter or control the existing light to make selected areas appear bright or dark.
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There are two major types of LCDs.
1. Dynamic scattering LCDs.
2. Field effect LCDs.
Dynamic scattering LCDs:
Fig. Construction of LCDs.
In the Dynamic scattering methods, the molecules of the liquid crystal acquire a random
orientation by virtue of an externally applied electric potential. As, a result, light passing through
the material is reflected in many different directions and has a bright, frosty appearance as it
emerges.
Dynamic scattering type LCD operates in “transmissive mode”. In transmissive mode, he
light is allowed to fall on one side glass sheet and the ray‟s passes through the liquid crystals
(transmittive liquid crystal cells) and transmits to the glass sheet of other side.
The Dynamic scattering type LCD is shown in figure below.
Fig. Dynamic scattering type LCD in transmissive mode.
Field effect LCDs:
In the field effect method, the molecules are oriented in such a way that they alter the
polarization of light passing through the material. Polarization filter are used to absorb or pass the
light, depending on the polarization it has been given, so light is visible only in those regions where
it can emerge from the filter.
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The field effect type LCD operates in both “transmissive” and “reflective” modes. To operate
in reflective mode, a reflecting mirror is placed on one side of the glass sheet.
The field effect LCD is shown in the figure below:
Fig. Twisted nematic field effect LCD based on light absorption
Operating in transmissive mode
Fig. Twisted nematic field effect LCD based on light absorption
Operating in reflective mode.
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Materials used to form the electrodes are stannic oxide (SnO2) and Indium Oxide (In2O3).
Advantages of LCDs:
a. The voltages required are small.
b. They have low power consumption
c. They are economical.
Disadvantages of LCDs:
1. LCDs are very slow devices, the turn on and off times are quite large.
Typically turn on time is of the order of few milliseconds while the turn-off is ten milli
seconds.
2. Life time is limited to 50000 hrs due to chemical degradation.
3. They occupy large area.
Applications of LCDs:
1. LCDs are used for display of numeric and alpha numeric character in dot matrix and
segment display.
2. Used in pocket calculators, wrist watches and other portable digital devices.
Photodiode:
The photodiode is a device that operates in reverse diode. The photodiode has a small
transparent window that allows light to strike one surface of the pn-junction, keeping the remaining
sides unilluminated.
The symbol of photodiode is shown in figure below.
A photodiode differs from a rectifier diode in that when its pn-junction is exposed to light,
the reverse current increases with the light intensity. When there is no incident light the reverse
current, I  , is almost negligible and is called the dark current. An increase in the amount of light
intensity, expressed as irradiance (mW/cm2
), produces an increase in the reverse current.
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Typically, the reverse current is approximately 1.4 μA at a Reverse bias voltage of 10V with
an irradiance of 0.5 mWcm².
Therefore RR=VR/I  = 10v/1.4μa = 7.14MΩ
At 20 mW/cm², the current is approximately 55 μa at VR=10v.
Therefore, RR= VR/ I  = 10v/55 μa = 182KΩ
Hence the photodiode can be used as a variable-resistance device controlled by light
intensity.
The volt-ampere characteristics of photodiode are shown in figure.
Fig. V-I characteristics of photo diode.
Advantages of Photo diodes:
1. It can be used as variable-resistance device.
2. Highly sensitive to the light.
3. The speed of operation is very high.
Disadvantages of Photo diodes:
1. The dark current is temperature dependent.
Applications of photodiode:
1) Photodiodes are commonly used in alarm systems and counting systems.
2) Used in demodulators.
3) Used in encoders.
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4) Used in light detectors.
5) Used in optical communication systems.
UNIJUNCTION TRANSISTOR:
Uni Junction Transistor (UJT) is a three terminal semi conductor switching device. As it has
only one PN junction and three leads, it is commonly called as Uni Junction Transistor.
The three terminals are: Emitter (E), Base1 (B1) and Base2 (B2).
Construction and Symbol:
The basic structure and symbol of UJT is shown in figure below.
It consists of a lightly doped n-type silicon bar with a heavily doped p-type material alloyed
to its one side closer to B2 for producing single PN junction.
Fig. UJT (a) Basic structure (b) Circuit symbol
Here the emitter leg is drawn at an angle to the vertical and the arrow indicates the
direction of the conventional current.
Operation of UJT:
The inter base resistance between B2 and B1 of the silicon bar is, RBB=RB1+ RB2.
With emitter terminal open, if voltage VBB is applied between the two bases, a voltage
gradient is established along the n-type bar.
The voltage drop across RB1 is given by
1V VBB , where the intrinsic stand-off ratio
1
1 2
R
B
R RB B
 

. The typical value of  ranges from 0.56 to 0.75.
This voltage V1 reverse biases the PN-junction and emitter current is cut-off. But a small
leakage current flows from B2 to emitter due to minority carriers. The equivalent circuit of UJT is
shown in figure below.
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Fig. UJT equivalent circuit.
If a negative voltage is applied to the emitter, PN-junction remains reverse biased and the
emitter current is cut-of. The device is now in the „OFF‟ state.
If a positive voltage VE is applied to the emitter, the PN-junction will remain reverse biased
so long as VE is less than V1. If VE exceeds V1 by the cut-in voltage vγ, the diode becomes forward
biased. Under this condition, holes are injected into n-type bar. These holes are repelled by the
terminal B2 and are attracted by the terminal B1. Accumulations of holes in E to B1 region reduce
the resistance in this section and hence emitter current IE is increased and is limited by VE. The
device is now in the „ON‟ state.
Characteristics of UJT:
Figure below shows the input characteristics of UJT.
Here, up to the peak point P, the diode is reverse biased and hence, the region to the left
of the peak point is called cut-off region.
At P, the peak voltage V V VP BB   , the diode starts conducting and holes are
injected into n-layer. Hence, resistance decreases thereby decreasing VE for the increase in IE. SO
there is a negative resistance region from peak point P to valley point V.
After the valley point, the device is driven into saturation and behaves like a conventional
forward biased PN-junction diode. The region to the right of the valley point is called saturation
region. In the valley point, the resistance is changes from negative to positive. The resistance
remains positive in the saturation region.
Due to the negative resistance property, a UJT can be employed in a variety of applications,
viz., a saw-tooth wave generator, pulse generator, switching, timing and phase control circuits.
UJT Relaxation Oscillator:
The Relaxation oscillator using UJT which is meant for generating saw-tooth waveform is
shown in figure below:
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Fig: UJT Relaxation Oscillator.
It consists of a UJT and a capacitor CE which is charged through RE as the supply voltage VBB is
switched ON.
The voltage across the capacitor increases exponentially and when the capacitor voltage
reach the peak point voltage VP, the UJT starts conducting and the capacitor voltage is discharged
rapidly through EB1 and R1.
After the peak point voltage of UJT is reached, it provides negative resistance to the
discharge path which is useful in the working of the relaxation oscillator. As the capacitor voltage
reaches zero, the device then cuts off and capacitor CE starts to charge again. This cycle is
repeated continuously generating a saw-tooth waveform across CE.
The inclusion of external resistors R2 and R1 in series with B2 and B1 provides spike
waveforms. When the UJT fires, the sudden surge of current through B1 causes drop across R1,
which provides positive going spikes.
Also, at the time of firing, fall of VEB1 causes I2 to increase rapidly which generates negative
going spikes across R2. By changing the values of capacitance CE (or) resistance RE, frequency of
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the output waveform can be changed as desired, since these values control the time constant RECE
of the capacitor changing circuit.
Frequency of oscillations:
The time period and hence the frequency of the saw-tooth wave can be calculated as
follows. Assuming that the capacitor is initially uncharged, the voltage VC across the capacitor prior
to breakdown is given by
/
1
t R C
E EV V eBBC
 
  
 

 
Where RECE = charging time constant of resistor-capacitor circuit, and t= time from the
commencement of the waveform. The discharge of the capacitor occurs when VC is equal to the
peak-point voltage VP, i.e,
/
1
t R C
E EV V V eP BB BB
 
  
 

  
/
1
t R C
E Ee

  
/
1
t R C
E Ee 

 
1
log
1
t R C eE E 
 
 
 
 

1
2.303 log
10 1
R CE E 
 
 
 


If the discharge time of the capacitor is neglected, then t=T, the period of the wave.
Therefore, frequency of oscillations of saw-tooth wave,
1 1
1
2.3 log
10 1
f
T
R CE E 
 
 
 
 

SCR (SILICON CONTROLLED RECTIFIER)
The basic structure and circuit symbol of SCR is shown in figure below.
It is a four layer three terminal device in which the end p-layer acts as anode, the end n-
layer acts as anode, the end n-layer acts as cathode and p-layer nearer to cathode acts as gate.
As leakage current in silicon is very small compared to germanium, SCR‟s are made of
silicon and not germanium.
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(a) Basic Structure (b) Circuit symbol
Fig, Basic structure and circuit symbol of SCR.
Operation of SCR:
The operation of SCR is divided into two categories,
i) When gate is open:
Consider that the anode is positive with respect to cathode and gate is open.
The junctions J1 and J3 are forward biased and junctions J2 is reverse biased. There is
depletion region around J2 and only leakage current flows which is negligibly small. Practically the
SCR is said to be „OFF‟. This is called forward blocking state of SCR and voltage applied to anode
and cathode with anode positive is called forward voltage. This is shown in figure (a) below.
(a) J1, J3 Forward biased.
J2 Reverse biased.
With gate open, if cathode is made positive with respect to anode, the junctions J1, J3
become reverse biased and J2 forward biased. Still the current flowing is leakage current, which
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can be neglected as it is very small. The voltage applied to make cathode positive is called reverse
voltage and SCR is said to be in reverse blocking state. This is shown in the figure (b) below.
(a) J1, J3 Reverse biased.
J2 Forward biased.
Fig. Operation of SCR when gate is open (a), (b).
2. When gate is closed:
Consider that the voltage is applied between gate and cathode when the SCR is in forward
blocking state. The gate is made positive with respect to the cathode. The electrons from n-type
cathode, which are majority in number, cross the junction J3 to reach to positive of battery.
While holes from p-type move towards the negative of battery. This constitutes the gate
current. This current increases the anode current as some of the electrons cross junction J2. As
anode current increases, more electrons cross the junction J2 and the anode current further
increases. Due to regenerative action, within short time, the junction J2 breaks and SCR conducts
heavily.
The connections are shown in the figure. The resistance R is required to limit the current.
Once the SCR conducts, the gate loses its control.
Fig. Operation of SCR when gate is closed.
Characteristics of SCR:
The characteristics are divided into two sections:
i) Forward characteristics
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ii) Reverse characteristics
i) Forward characteristics:
It shows a forward blocking region, when IG=0. It also shows that when forward voltage
increases up to VBO, the SCR turns ON and high current results.
It also shows that, if gate bias is used then as gate current increases, less voltage is
required to turn ON the SCR.
If the forward current falls below the level of the holding current IH, then depletion region
begins to develop around J2 and device goes into the forward blocking region.
When SCR is turned on from OFF state, the resulting forward current is called latching
current IL. The latching current is slightly higher than the holding current
ii) Reverse characteristics:
If the anode to cathode voltage is reversed, then the device enters into the reverse
blocking region. The current is negligibly small and practically neglected.
If the reverse voltage is increases, similar to the diode, at a particular value avalanche
breakdown occurs and a large current flows through the device. This is called reverse breakdown
and the voltage at which this happens is called reverse breakdown voltage
Fig. Characteristics of SCR.
Two Transistor Analogy:
The easiest way to understand how SCR works it ot visualize it separately into two halves,
as shown in the figure. The left half is a p-n-p transistor and right half is n-p-n transistor. This is
also called two transistor model of SCR.
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The collector current of T1 becomes base current of T2 and collector current of T2 becomes
base current of T1.
Fig, Two transistor model of SCR.
Mathematical Analysis:
Let IC1 and IC2 are collector currents, IE1 and IE2 are emitter currents while IB1 and IB2 are
base currents of transistors T1 and T2.
Let both the transistors are operating in active region.
From transistor analysis we can write,
1 1 1
I IE I
C CO
  and
2 2 2
I IE I
C CO
 
Where ICO = Reverse current (or) leakage current.
And
1





Now, IE2 = IC2 + IB2
IA = Anode current = IE1
IK = Cathode current = IE2
IG = Gate current
Now, IK = IA + IG
2 2 2
I I I I I
E A G C B
    
But IB2 = IC1 + IG
2 1
I I I I I
A G C C G
    
Substituting IC1 and IC2,
1 1 1 2 2 2
I IE I IE I
A CO CO
     
 2 1 1 2
I I I I I I
A A G A CO CO
      
2 1 2 1 2
I I I I I I
A A A G CO CO
       
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 
2 1 2
1 21
G CO COI I I
I
A

 
 
 
 
In blocking state 1 and 2 are small. Thus IA is small.
As 1 2  approaches unit, the SCR is ready to enter into conduction. Thus due to
positive gate current, the regenerative action takes place and SCR conducts.
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UNIT-IV
TRANSISTOR
SYLLABUS:
BIPOLAR JUNCTION TRANSISTORS: Introduction, transistor construction, transistor
operation, transistor current components, transistor as an amplifier, common base
configuration, common emitter configuration, common collector configuration, limits of
operation, transistor specifications.
LECTURE PLAN
S. No. Topic to be covered
Periods
required
1
Transistor Construction, Different types of Transistors, Principle of
operation of npn and pnp transistors.
1
2 Transistor Current components, Current parameters 1
3 Input and Output characteristics of Transistor in CB configuration 1
4 Input and Output characteristics of Transistor in CE configuration 1
5 Input and Output characteristics of Transistor in CC configuration 1
6
Relation between α, β, γ and Typical transistor junction voltage values,
Applications of BJT
1
Total 6
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TRANSISTOR AND FET CHARACTERISTICS
The transistor was invented in 1947 by John Bardeen, Walter Brattain and William Shockley at Bell
Laboratory in America.
A transistor is a semiconductor device, commonly used as an Amplifier or an electrically
Controlled Switch.
There are two types of transistors:
1) Unipolar Junction Transistor
2) Bipolar Junction Transistor
In Unipolar transistor, the current conduction is only due to one type of carriers i.e., majority
charge carriers. The current conduction in bipolar transistor is because of both the types of charge
carriers i.e., holes and electrons. Hence it is called as Bipolar Junction Transistor and it is referred
to as BJT.
BJT is a semiconductor device in which one type of semiconductor material is sand witched
between two opposite types of semiconductor i.e., an n-type semiconductor is sandwiched between
two p-type semiconductors or a p-type semiconductor is sandwiched between two n-type
semiconductor. Hence the BJTs are of two types.
They are:
1) n-p-n Transistor
2) p-n-p Transistor
The two types of BJTs are shown in the figure below.
The arrow head represents the conventional current direction from p to n.
Transistor has three terminals.
1) Emitter
2) Base
3) Collector
Transistor has two p-n junctions. They are:
1) Emitter-Base Junction
2) Collector-Base Junction
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Emitter: Emitter is heavily doped because it is to emit the charge carriers.
Base: The charge carriers emitted by the emitter should reach collector passing through
the base. Hence base should be very thin and to avoid recombination, and to
provide more collector current base is lightly doped.
Collector: Collector has to collect the most of charge carriers emitted by the emitter. Hence
the area of cross section of collector is more compared to emitter and it is
moderately doped.
Transistor can be operated in three regions.
1) Active region.
2) Saturation region.
3) Cut-Off region.
Active Region: For the transistor to operate in active region base to emitter junction is
forward biased and collector to base junction is reverse biased.
Saturation Region: Transistor to be operated in saturation region if both the junctions i.e.,
collector to base junction and base to emitter junction are forward biased.
Cut-Off Region: For the transistor to operate in cut-off region both the junctions i.e., base
to emitter junction and collector to base junction are reverse biased.
Transistor can be used as
1) Amplifier 2) Switch
For the transistor to act as an amplifier, it should be operated in active region. For the
transistor to act as a switch, it should be operated in saturation region for ON state, and cut-off
region for OFF state.
Transistor Operation:
Working of a n-p-n transistor:
The n-p-n transistor with base to emitter junction forward biased and collector base
junction reverse biased is as shown in figure.
As the base to emitter junction is forward biased the majority carriers emitted by the n-
type emitter i.e., electrons have a tendency to flow towards the base which constitutes the emitter
current IE.
As the base is p-type there is chance of recombination of electrons emitted by the emitter
with the holes in the p-type base. But as the base is very thin and lightly doped only few electrons
emitted by the n-type emitter less than 5% combines with the holes in the p-type base, the
remaining more than 95% electrons emitted by the n-type emitter cross over into the collector
region constitute the collector current.
The current distributions are as shown in fig
IE = IB + IC
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Working of a p-n-p transistor:
The p-n-p transistor with base to emitter junction is forward biased and collector to base
junction reverse biased is as show in figure.
As the base to emitter junction is forward biased the majority carriers emitted by the p-
type emitter i.e., holes have a tendency to flow towards the base which constitutes the emitter
current IE.
As the base is n-type there is a chance of recombination of holes emitted by the emitter
with the electrons in the n-type base. But as the base us very thin and lightly doped only few
electrons less than 5% combine with the holes emitted by the p-type emitter, the remaining 95%
charge carriers cross over into the collector region to constitute the collector current.
The current distributions are shown in figure.
IE = IB + IC
Current components in a transistor:
The figure below shows the various current components which flow across the forward-
biased emitter junction and reverse-biased collector junction in P-N-P transistor.
Figure. Current components in a transistor with forward-biased emitter and reverse-biased
collector junctions.
The emitter current consists of the following two parts:
1) Hole current IpE constituted by holes (holes crossing from emitter into base).
2) Electron current InE constituted by electrons (electrons crossing from base into the
emitter).
Therefore, Total emitter current IE = IpE (majority)+ InE (Minority)
,
The holes crossing the emitter base junction JE and reaching the collector base junction JC
constitutes collector current IpC.
Not all the holes crossing the emitter base junction JE reach collector base junction JC
because some of them combine with the electrons in the n-type base.
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Since base width is very small, most of the holes cross the collector base junction JC and
very few recombine, constituting the base current (IpE – IpC).
When the emitter is open-circuited, IE=0, and hence IpC=0. Under this condition, the base
and collector together current IC equals the reverse saturation current ICO, which consists of the
following two parts: IPCO caused by holes moving across IC from N-region to P-region.
InCO caused by electrons moving across IC from P-region to N-region. ICO = InCO + IpCO
In general, IC = InC + IpC
Thus for a P-N-P transistor, IE = IB + IC
Transistor circuit configurations:
Following are the three types of transistor circuit configurations:
1) Common-Base (CB)
2) Common-Emitter (CE)
3) Common-Collector (CC)
Here the term „Common‟ is used to denote the transistor lead which is common to the input
and output circuits. The common terminal is generally grounded.
It should be remembered that regardless the circuit configuration, the emitter is always
forward-biased while the collector is always reverse-biased.
Fig. Common – Base configuration
Fig. Common – emitter configuration
Fig. Common – Collector configuration
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Common – Base (CB) configurations:
In this configuration, the input signal is applied between emitter and base while the output
is taken from collector and base. As base is common to input and output circuits, hence the name
common-base configuration. Figure show the common-base P-N-P transistor circuit.
Fig. Common – base PNP transistor amplifier.
Current Amplification Factor ( ) :
When no signal is applied, then the ratio of the collector current to the emitter current is
called dc alpha ( dc) of a transistor.
dc
I
C
I
E


 ,…………… (1) (Negative sign signifies that IE flows into transistor
while IC flows out of it).
„ ‟ of a transistor is a measure of the quality of a transistor. Higher is the value of „ ‟, better is
the transistor in the sense that collector current approaches the emitter current.
By considering only magnitudes of the currents, IC =  IE and hence IB = IE - IC
Therefore, IB = IE - IE = IE(1- ) …………. (2)
When signal is applied, the ratio of change in collector current to the change in emitter
current at constant collector-base voltage is defined as current amplification factor,
dc
I
C
I
E
  
V
V …………… (3)
For all practical purposes,
dc
 = ac = and practical values in commercial transistors
range from 0.9 to 0.99.
Total Collector Current:
The total collector current consists of the following two parts:
i)  IE , current due to majority carriers
ii) ICBO, current due to minority carriers
 Total collector current IC =  IE + ICBO ………… (4)
The collector current can also be expressed as IC =  (IB+IC) + ICBO (Q IE = IB + IC)
(1 ) BC CBO
I I I    
1
1 1
I I IBC CBO

 
   
   
   
 
 
 …. (5)
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Common-Emitter (CE) configuration:
In this configuration, the input signal is applied between base and emitter and the output is
taken from collector and emitter. As emitter is common to input and output circuits, hence the
name common emitter configuration.
Figure shows the common-emitter P-N-P transistor circuit.
Fig. Common-Emitter PNP transistor amplifier.
Current Amplification Factor (β):
When no signal is applied, then the ratio of collector current to the base current is called dc
beta ( )
dc
 of a transistor.
I
C
dc IB
   ………………. (1)
When signal is applied, the ratio of change in collector current to the change in base
current is defined as base current amplification factor. Thus,
I
C
dc IB
  
V
V
…………..(2)
From equation (1), I IBC

Almost in all transistors, the base current is less than 5% of the emitter current. Due to
this fact, „β‟ ranges from 20 to 500. Hence this configuration is frequently used when appreciable
current gain as well as voltage gain is required.
Total Collector Current:
,
The Total collector current IC =  IB + ICEO ………… (3)
Where ICEO is the leakage current.
But, we have,
1
1 1
I I IBC CBO

 
   
   
   
 
 
………….(4)
Comparing equations (3) and (4), we get
1





and
1
1
I I
CEO CBO


...........(5)
Relation between  and  :
We know that
I
C
IE
  and
I
C
IB
 
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I I IE B C
  (or) I I IB E C
 
Now
1
1
I
C
I IC E
II I CE C
IE



  
 

……………. (6)
(1 )     (or) (1 )   
1


 

….………… (7)
It can be seen that
11
1


 

……………. (8)
Common – Collector (CC) Configuration:
In this configuration, the input signal is applied between base and collector and the output
is taken from the emitter. As collector is common to input and output circuits, hence the name
common collector configuration. Figure shows the common collector PNP transistor circuit.
Fig. Common collector PNP transistor amplifier.
Current Amplification Factor ( ):
When no signal is applied, then the ratio of emitter current to the base current is called as
dc gamma ( dc) of the transistor.
IE
dc IB
   …………… (1)
When signal is applied, then the ratio of change in emitter current to the change in base
current is known as current amplification factor „ ‟.
IE
ac IB
  
V
V
……………..(2)
This configuration provides the same current gain as common emitter circuit as
I I
E C
V V but the voltage gain is always less than one.
Total Emitter Current:
We know that I I IE B C
  Also IC =  IE + ICBO
IE = IB + ( IE + ICBO)
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(1 )E B CBO
I I I   
1 1
II CBOBIE  
 
 

(or) (1 ) (1 )I I IE B CBO
     ……………… (3)
1
1
1


 
  
 
Q
Relation between  and :
We know that
IE
IB
  and
I
C
IB
 
Also I I IB E C
 
Now
1 1
1
1
IE
II I CE C
IE

  
 


1
1




Q ……………………. (4)
Relation between  and  :
We know that 1
1
1


 

Q From equation (4), 1
1
1


 

……………………. (5)
Characteristics of Common-Base Circuit:
The circuit diagram for determining the static characteristic curves of an NPN transistor in
the common base configuration is shown in fig. below.
Fig. Circuit to determine CB static characteristics.
Input Characteristics:
To determine the input characteristics, the collector-base voltage VCB is kept constant at
zero volts and the emitter current IE is increased from zero in suitable equal steps by increasing
VEB. This is repeated for higher fixed values of VCB. A curve is drawn between emitter current IE
and emitter-base voltage VEB at constant collector-base voltage VCB.
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The input characteristics thus obtained are shown in figure below.
Fig. CB Input characteristics.
Early effect (or) Base – Width modulation:
As the collector voltage VCC is made to increase the reverse bias, the space charge width
between collector and base tends to increase, with the result that the effective width of the base
decreases. This dependency of base-width on collector-to-emitter voltage is known as Early effect
(or) Base-Width modulation.
Thus decrease in effective base width has following consequences:
i. Due to Early effect, the base width reduces, there is a less chance of
recombination of holes with electrons in base region and hence base current IB
decreases.
ii. As IB decreases, the collector current IC increases.
iii. As base width reduces the emitter current IE increases for small emitter to base
voltage.
iv. As collector current increases, common base current gain ( ) increases.
Punch Through (or) Reach Through:
When reverse bias voltage increases more, the depletion region moves towards emitter
junction and effective base width reduces to zero. This causes breakdown in the transistor. This
condition is called “Punch Through” condition.
Output Characteristics:
To determine the output characteristics, the emitter current IE is kept constant at a suitable
value by adjusting the emitter-base voltage VEB. Then VCB is increased in suitable equal steps and
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the collector current IC is noted for each value of IE. Now the curves of IC versus VCB are plotted for
constant values of IE and the output characteristics thus obtained is shown in figure below.
Fig. CB Output characteristics
From the characteristics, it is seen that for a constant value of IE, IC is independent of VCB
and the curves are parallel to the axis of VCB. Further, IC flows even when VCB is equal to zero. As
the emitter-base junction is forward biased, the majority carriers, i.e., electrons, from the emitter
are injected into the base region. Due to the action of the internal potential barrier at the reverse
biased collector-base junction, they flow to the collector region and give rise to IC even when VCB is
equal to zero.
Transistor Parameters:
The slope of the CB characteristics will give the following four transistor parameters. Since
these parameters have different dimensions, they are commonly known as common base hybrid
parameters (or) h-parameters.
i) Input Impedance (hib):
It is defined as the ratio of change in (input) emitter to base voltage to the change
in (input) emitter current with the (output) collector to base voltage kept constant.
Therefore,
VEBh
ib IE



, VCB constant
It is the slope of CB input characteristics curve.
The typical value of hib ranges from 20Ω to 50Ω.
ii) Output Admittance (hob):
It is defined as the ratio of change in the (output) collector current to the
corresponding change in the (output) collector-base voltage, keeping the (input) emitter
current IE constant. Therefore,
I
Ch
ob V
CB



, IE constant
It is the slope of CB output characteristics IC versus VCB.
The typical value of this parameter is of the order of 0.1 to 10µmhos.
iii) Forward Current Gain (hfb):
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It is defined as a ratio of the change in the (output) collector current to the
corresponding change in the (input) emitter current keeping the (output) collector voltage
VCB constant. Hence,
I
Ch
fb IE



, VCB constant
It is the slope of IC versus IE curve. Its typical value varies from 0.9 to 1.0.
iv) Reverse Voltage Gain (hrb):
It is defined as a ratio of the change in the (input) emitter voltage and the
corresponding change in (output) collector voltage with constant (input) emitter current, IE.
Hence,
VEBh
rb V
CB



, IE constant.
It is the slope of VEB versus VCB curve. Its typical value is of the order of 10-5
to 10-4
.
Characteristics of Common-Emitter Circuit:
The circuit diagram for determining the static characteristic curves of the an N-P-N
transistor in the common emitter configuration is shown in figure below.
Fig. Circuit to determine CE Static characteristics.
Input Characteristics:
To determine the input characteristics, the collector to emitter voltage is kept constant at
zero volts and base current is increased from zero in equal steps by increasing VBE in the circuit.
The value of VBE is noted for each setting of IB. This procedure is repeated for higher fixed values
of VCE, and the curves of IB versus VBE are drawn.
The input characteristics thus obtained are shown in figure below.
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Fig. CE Input Characteristics.
When VCE=0 , the emitter-base junction is forward biased and he junction behaves as a
forward biased diode. When VCE is increased, the width of the depletion region at the reverse
biased collector-base junction will increase. Hence he effective width of the base will decrease.
This effect causes a decrease in the base current IB. Hence, to get the same value of IB as that for
VCE=0, VBE should be increased. Therefore, the curve shifts to the right as VCE increases.
Output Characteristics:
To determine the output characteristics, the base current IB is kept constant at a suitable
value by adjusting base-emitter voltage, VBE. The magnitude of collector-emitter voltage VCE is
increased in suitable equal steps from zero and the collector current IC is noted for each setting of
VCE. Now the curves of IC versus VCE are plotted for different constant values of IB. The output
characteristics thus obtained are shown in figure below.
Fig. CE Output characteristics
The output characteristics of common emitter configuration consist of three regions: Active,
Saturation and Cut-off regions.
Active Region: The region where the curves are approximately horizontal is the “Active”
region of the CE configuration. In the active region, the collector junction is
reverse biased. As VCE is increased, reverse bias increase. This causes
depletion region to spread more in base than in collector, reducing the
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changes of recombination in the base. This increase the value of
dc .
This Early effect causes collector current to rise more sharply with
increasing VCE in the active region of output characteristics of CE transistor.
Saturation Region: If VCE is reduced to a small value such as 0.2V, then collector-base junction
becomes forward biased, since the emitter-base junction is already forward
biased by 0.7V. The input junction in CE configuration is base to emitter
junction, which is always forward biased to operate transistor in active
region. Thus input characteristics of CE configuration are similar to forward
characteristics of p-n junction diode. When both the junctions are forwards
biased, the transistor operates in the saturation region, which is indicated
on the output characteristics. The saturation value of VCE, designated
( )VCE Sat
, usually ranges between 0.1V to 0.3V.
Cut-Off Region: When the input base current is made equal to zero, the collector current is
the reverse leakage current ICEO. Accordingly, in order to cut off the
transistor, it is not enough to reduce IB=0. Instead, it is necessary to
reverse bias the emitter junction slightly. We shall define cut off as the
condition where the collector current is equal to the reverse saturation
current ICO and the emitter current is zero.
Transistor Parameters:
The slope of the CE characteristics will give the following four transistor parameters. Since
these parameters have different dimensions, they are commonly known as Common emitter hybrid
parameters (or) h-parameters.
i) Input Impedance (hib):
It is defined as the ratio of change in (input) base voltage to the change in (input)
base current with the (output) collector voltage (VCE), kept constant. Therefore,
VBEhie IB



, ∆VCE constant
It is the slope of CB input characteristics IB versus VBE.
The typical value of hie ranges from 500Ω to 2000Ω.
ii) Output Admittance (hoe):
It is defined as the ratio of change in the (output) collector current to the
corresponding change in the (output) collector voltage. With the (input) base current IB
kept constant. Therefore,
I
Choe V
CE



, IB constant
It is the slope of CE output characteristics IC versus VCE.
The typical value of this parameter is of the order of 0.1 to 10µmhos.
iii) Forward Current Gain (hfe):
It is defined as a ratio of the change in the (output) collector current to the
corresponding change in the (input) base current keeping the (output) collector voltage VCE
constant. Hence,
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I
Ch
fe IB



, VCE constant
It is the slope of IC versus IB curve.
Its typical value varies from 20 to 200.
iv) Reverse Voltage Gain (hre):
It is defined as a ratio of the change in the (input) base voltage and the
corresponding change in (output) collector voltage with constant (input) base current, IB.
Hence,
VBEhre V
CE



, IE constant.
It is the slope of VBE versus VCE curve.
Its typical value is of the order of 10-5
to 10-4
.
Characteristics of common collector circuit:
The circuit diagram for determining the static characteristics of an N-P-N transistor in the
common collector configuration is shown in fig. below.
Fig. Circuit to determine CC static characteristics.
Input Characteristics:
To determine the input characteristic, VEC is kept at a suitable fixed value. The base-
collector voltage VBC is increased in equal steps and the corresponding increase in IB is noted. This
is repeated for different fixed values of VEC. Plots of VBC versus IB for different values of VEC shown
in figure are the input characteristics.
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Fig. CC Input Characteristics.
Output Characteristics:
The output characteristics shown in figure below are the same as those of the common
emitter configuration.
Fig. CC output characteristics.
Comparison:
Table: A comparison of CB, CE and CC configurations
Property CB CE CC
Input Resistance
Low
(About 100Ω)
Moderate
(About 750Ω)
High
(About 750kΩ)
Output Resistance
High
(About 450kΩ)
Moderate
(About 45kΩ)
Low
(About 25Ω)
Current Gain 1 High High
Voltage Gain About 150 About 500 Less than 1
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Phase Shift between
input and output
voltages
0o
(or) 360o
180o
0o
(or) 360o
Applications
For high frequency
circuits
For Audio frequency
circuits
For impedance
matching
Problem:
1 A Germanium transistor used in a complementary symmetry amplifier has ICBO=10µA at
27o
C and hfe=50.
(a) find IC when IB=0.25mA and
(b) Assuming hfe does not increase with temperature; find the value of new collector
current, if the transistor‟s temperature rises to 50o
C.
Solution:
Given data: ICBO = 10µA and hfe (=β) = 50
a) IC = βIB+(1+β)ICBO
= 50x(0.25x10-3
)+(1+50)x(10x10-6
)A
=13.01mA
b) I‟CBO (β=50) = ICBO x 2(T
2
-T
1
)/10
= 10 X 2(50-27)/10
= 10 x 22.3
µA
= 49.2µA
IC at 50o
C is
IC= βIB+(1+β)I‟CBO
= 50x(0.25x10-3
)+(1+50)x(49.2x10-6
)
=15.01 mA
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UNIT-IV
FET CHARACTERISTICS
SYLLABUS:
FIELD EFFECT TRANSISTORS: Junction Field Effect Transistor (JFET) - principle of operation, volt
ampere characteristics, advantages of JFET over BJT, Introduction to MOSFETs - depletion and
enhancement type MOSFETs, operation and volt-ampere characteristics.
LECTURE PLAN
S. No. Topic to be covered
Periods
required
1
Construction of JFET, Principle of operation of JFET(Both n-channel and
p-channel)
2
2 Small signal model of JFET 1
3
MOSFET Construction, Operation and Characteristics of Enhancement
and Depletion Modes.
2
4 Introduction to SCR 1
5 Introduction to UJT 1
6 Problems 1
Total 8
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FIELD EFFECT TRANSISTOR
Introduction:
The filed effect transistor (abbreviated as FET) is a three terminal uni-polar semiconductor
device in which current is controlled by an electric field. As current conduction is only by majority
carriers, FET is said to be a uni-polar device.
Based on the construction, the FET can be classified into two types as:
a) Junction Field Effect Transistor (JFET)
b) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or
Insulated Gate Field Effect Transistor (IGFET)
Depending upon the majority carriers, JFET has been classified into two types, namely,
(1) N-Channel JFET with electrons as the majority carriers, and
(2) P-Channel JFET with holes as the majority carriers.
Construction of N-Channel JFET:
It consists of a N-type bar which is made of Silicon. Ohmic contacts (terminals), made at
the two ends of the bar, are called Source and Drain.
Source (S) : This terminal is connected to the negative pole of the battery. Electronics which
are the majority carriers in the N-type bar enter the bar through this terminal.
Drain (D) : This terminal is connected to the positive pole of the battery. The majority carriers
leave the bar through this terminal.
Gate (G) : Heavily doped P-type silicon is diffused on both sides of the N-type silicon bar by
which PN junctions are formed. These layers are joined together are called Gate
(G).
Channel : The region BC of the N-type bar between the depletion regions is called the
Channel. Majority carriers move from the source to drain when a potential
difference VDS is applied between the source and drain.
FIG. JFET construction
Structure and symbol of n-channel JFET:
The structure and symbol of n-channel JFET are shown in figure below.
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The electrons enter the channel through the terminal called ‘source’ and leave through the
terminal called ‘drain’. The terminals taken out from heavily doped electrodes of p-type material
are called ‘gates’. Usually, these electrodes are connected together and only one terminal is taken
out, which is called ‘gate.
Structure and Symbol of P-Channel JFET:
The structure and symbol of P-Channel JFET is shown in the figure. The device could be made of P-
type bar with two N-type gates as shown in the figure. Then this will be P-Channel JFET is similar;
the only difference being that in N-Channel JFET the current is carried by the electrons while in P-
Channel JFET, it is carried by holes.
Operation of N-Channel JFET:
The operation of N-Channel JFET can be understood with the help of figure below.
Fig. Operation of FET.
Before considering the operation, let us consider that how the depletion layers are formed.
Let us first suppose that the gate has been reverse-biased by gate battery VGG and the drain
battery VDD is not connected.
When VGS=0 and VDS=0:
When no voltage is applied between drain and source, and gate and source, the thickness
of the depletion regions round the P-N junction is uniform as shown in figure below.
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When VDS=0 and VGS is decreased from zero:
In this case, the P-N junctions are reverse-biased and hence the thickness of the depletion
region increases. As VGS is decreased from zero, the reverse bias voltage across the P-N junction is
increased and hence, the thickness of the depletion region in the channel increases until the two
depletion regions make contact with each other. In this condition, the channel is said to be cut-off.
The value of VGS which is required to cut-off the channel is called the cut-off voltage VC.
When VGS=0 and VDS is increased from zero:
Drain is positive with respect to the source. Now the majority carriers (electrons) flow
through the N-Channel from source to drain. Therefore the conventional current ID flows from
drain to source. The magnitude of the current will depend upon the following factors:
1. The conductivity of the channel.
2. The length of the channel.
3. The cross sectional area ‘A’ of the channel.
4. The magnitude of the applied voltage VDS.
Thus the channel acts as a resistor of resistance ‘R’ is given by,
L
R =
A

DS DS
D
V AV
I = =
R ρL
Where ‘ρ’ is the resistivity of the channel. As VDS increases, the reverse voltage across the
P-N junction increase and hence the thickness of the depletion region also increases. Therefore,
the channel is wedge shaped as shown in fig. below.
As VDS is increase, at a certain value VP of VDS, the cross sectional area of the channel
becomes minimum. At this voltage, the channel is said to be pinched off and the drain voltage VP
is called the pinch-off voltage.
As a result of the decreasing cross-section of the channel with the increase of VDS, the
following results are obtained.
Fig. Drain characteristics.
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i) As VDS is increased from zero, ID increases linearly along OP, this region from VDS=0 to
VDS=VP is called the ohmic region. In this region, the FET acts as a voltage variable resistor
(VVR) or voltage dependent resistor (VDR).
ii) When VDS=VP, ID becomes maximum. When VDS is increased beyond VP, the length of the
pinch-off (or) saturation region increases. Hence, there is no further increase of ID.
iii) At a certain voltage corresponding to the point B, ID suddenly increases. This effect is due
to the Avalanche multiplication of electrons caused by breaking of covalent bonds of silicon
atoms in the depletion region between the gate and the drain. The drain voltage at which
the breakdown occurs is denoted by BVDGO.
When VGS is negative and VDS is increased:
When the gate is maintained at a negative voltage less than the negative cut-off voltage,
the reverse voltage across the junction is further increased. Hence for a negative value of VGS, the
curve of ID versus VDS is similar to that for VGS=0, but the values of VP and BVDGO are lower.
The drain current ID is controlled by the electric field that extends into the channel due to
reverse biased voltage applied to the gate, hence, this device has been given the name Field Effect
Transistor.
Characteristics Parameters of the JFET:
In a JFET, the drain current ID depends upon the drain voltage VDS and the gate voltage
VGS. Any one of these variables may be fixed and the relation between the other two is
determined. These relations are determined by the three parameters which defined below.
1) Mutual Conductance (or) transconductance, gm:
It is the slope of the transfer characteristic curves, and is defined by,
DS
IDgm
VDS V
 
 
 
 
=
ID
VGS


, VDS held constant
2) Drain resistance, rd :
It is the reciprocal of the slope of the drain characteristics and is defined as,
GS
VDSr
d ID V
 
 
  
=
VDS
ID


, VGS held constant
The reciprocal of rd is called the drain conductance. It is denoted gd (or) gm.
3) Amplification Factor, µ:
It is defined by,
D
V
DS
VGS I

 
 
 
 
 =
V
DS
V
GS


 , ID held constant.
Relationship among FET parameters:
As ID on VDS and VGS, the functional equation can be expressed as
ID = f (VDS, VGS) D
GS DS
I ID DI V V
DS GSV VDS GSV V
    
       
    
   
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D
GS DS
VI II DSD D
V V V VGS DS GS GSV V
      
      
        
     
If ID is constant, then DI
VGS


=0
Therefore, we have 0
GS DS
VI IDSD D
V V VDS GS GSV V
      
      
       
     
1
0 ( ) gmr
d

 
 
 
 
   
Hence, r gmd
  
g rm d
 
Expression for Saturation Drain Current:
2
1 GS
DS DSS
P
V
I I
V
 
 
 
 
 
IDS = saturation Drain Current.
IDSS = the value of IDS when VGS=0.
VP = the pinch-off voltage.
Comparison of JEFT and BJT
1. FET operation depends only on the flow of majority carriers – holes for p-channel FET’s and
electrons for N-channel FET’s. Therefore, they are called Uni-Polar devices. Bipolar
transistor (BJT) operation depends on both minority and majority current devices.
2. As FET has no junctions and the conduction is through an N-type (or) P-type semiconductor
material, FET is less noisy than BJT.
3. As the input circuit of FET is reverse biased, FET exhibits a much higher input impedance
(in the order of 100MΩ) and lower output impedance and there will be a high degree of
isolation between input and output. So, FET can acts as an excellent buffer amplifier but
the BJT has low input impedance because its input circuit is forwards biased.
4. FET is a voltage controlled device, i.e., voltage at the input terminal controls the output
current, whereas BJT is a current controlled device, i.e., the input current controls the
output current.
5. FET’s are much easier to fabricate and are particularly suitable for IC’s because they occupy
less space than BJT’s.
6. The performance of BJT is degraded by neutron radiation because of the reduction in
minority-carrier life time, whereas FET can tolerate a much higher level of radiation since
they do not rely on minority carriers for their operation.
7. The performance of FET is relatively unaffected by ambient temperature changes. As it has
a negative temperature co-efficient at high current levels, it prevents the FET from thermal
breakdown. The BJT has a positive temperature co-efficient at high current levels which
leads to thermal breakdown.
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8. Since FET does not suffer from minority carrier storage effects, it has higher switching
speeds and cut-off frequencies. BJT suffers from minority carrier storage effects and
therefore has lower switching speed and cut-off frequencies.
9. FET amplifiers have low gain bandwidth product due to the junction capacitive effects and
produce more signal distortion except for small signal operation.
10. BJT‘s are cheaper to produce than FET’s.
Comparison of N-channel with P-Channel FET’s
1. In an N-channel JFET the current carriers are electrons, whereas the current carriers are
holes in a P-channel JFET.
2. Mobility of electrons is large in N-channel JFET, mobility of holes is poor in P-channel JFET.
3. The input noise is less in N-channel JFET than that of P-channel JFET.
4. The transconductance is larger in N-channel JFET than that of P-channel JFET.
Applications of JFET
1. FET is used as a buffer in measuring instruments, receivers since it has high input
impedance and low output impedance.
2. FET’s are used in Radio Frequency amplifiers in FM (Frequency Mode) tuners and
communication equipment for the low noise level.
3. Since the input capacitance is low, FET’s are used in cascade amplifiers in measuring and
test equipments.
4. Since the device is voltage controlled, it is used as voltage variable resistor in operational
amplifiers and tone controls
5. FET’s are used in mixer circuits in FM and TV receivers, and communication equipments
because inter modulation distortion is low.
6. It is used in oscillator circuits because frequency drift is low.
7. As the coupling capacitor is small, FET’s are used in low frequency amplifiers in hearing aids
and inductive transducers.
8. FET’s are used in digital circuits in computers, LSD and a memory circuit because of it is
small size.
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
MOSFET is the common term for the Insulated Gate Field Effect Transistor (IGFET).
There are two basic forms of MOSFET, they are:
i) Enhancement MOSFET and
ii) Depletion MOSFET
Principle:
By applying a transverse electric field across an insulator, deposited on the semi conducting
material, the thickness and hence the resistance of conducting channel of a semi conducting
material can be controlled.
In depletion MOSFET, the controlling electric field reduces the number of majority carriers
available for conduction, whereas in the enhancement MOSFET, application of electric field causes
an increase in the majority carrier density in the conducting regions of the transistor.
Enhancement MOSFET
Construction:
The construction of an N-channel enhancement MOSFET is shown in figure (a) below and
the circuit symbols for an N-Channel and a P-channel enhancement MOSFET are shown in figures
(b) and (c) respectively. As there is no continuous channel in an enhancement MOSFET, this
condition is represented by the broken line in the symbols.
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(a)
(b) N-Channel (c) P-Channel
Fig. (a) N-Channel Enhancement MOSFET
(b) and (c) Circuit symbols for enhancement MOSFET
Two highly doped N+
regions are diffused in a lightly doped substrate of p-type silicon. One
N+
region is called the source S and the other one is called the drain D. They are separated by 1
milli (10-3
inch). A thin insulating layer of SiO2 is grown over the surface of the structure and holes
are cut into the oxide layer, allowing contact with source and drain. Then a thin layer of metal
aluminum is formed over the layer of SiO2. Thus metal layer covers the entire channel region and
it forms the gate G.
The metal area of the gate, in conjunction with the insulating oxide layer of SiO2 and the
semi conductor channel forms a parallel plate capacitor. This device is called the insulated gate
FET because of the insulating layer of SiO2. This layer gives extremely high input impedance for
the MOSFET.
Operation:
If the substrate is grounded and a positive voltage is applied at the gate, the positive
charge on G induces an equal negative charge on the substrate side between the sourced drain
regions. Thus, an electric field is produced between the source and drain regions. The direction of
the electric field is perpendicular to the plates of the capacitor through the oxide. .
The negative charge of electrons which are minority carriers in the p-type substrate forms
an inversion layer. As the positive voltage on the gate increases, the induced negative charge in
the semi conductor increases. Hence, the conductivity increases and current flows from source to
drain through the induced channel. Thus the drain current is enhanced by the positive gate voltage
as shown in figure below.
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(b)
(a)
Fig V-I (or) drain characteristics of MOSFET.
(a) n-channel enhancement MOSFET
(b) p-channel enhancement MOSFET
(c) (d)
Fig Transfer characteristics of MOSFET.
(a) n-channel enhancement MOSFET
(b) p-channel enhancement MOSFET
Depletion MOSFET:
Construction:
The construction of an N-channel where an N-channel is diffused between the source and
drain to the basic structure of MOSFET. The circuit symbols for an N-channel and P-channel
depletion MOSFET are shown in figure (b) and (c) respectively.
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Fig (a) N-channel depletion MOSFET.
(b) and (b) N-channel & P-channel circuit symbols.
When VGS=0 and the drain D at a positive potential with respect to the source, the
electrons (majority carriers) flow through the n-channel from source to drain. Therefore, the
conventional current ID flows through the channel from drain to source.
If gate voltage is made negative, positive charge consisting of holes is induced in the
channel through SiO2 of the gate-channel capacitor. The introduction of the positive charge causes
depletion of mobile electrons in the channel. Thus a depletion region is produced in the channel.
The shape of the depletion region depends on VGS and VDS. Hence the channel will be wedge
shaped as shown in figure.
When VDS is increased, ID increases and it becomes practically constant at a certain value
of VDS, called the pinch-off voltage. The drain current ID almost gets saturated beyond the pinch-
off voltage.
The depletion MOSFET may also be operated in an enhancement mode: It is only necessary
to apply a positive gate voltage so that negative charges are induced into the n-type channel.
Hence, the conductivity of the channel increases and ID increases. As the depletion MOSFET can be
operated with bipolar input signals irrespective of doping of the channel, it is also called as dual
mode MOSFET.
Fig: Drain characteristics of MOSFET.
(a) n-channel depletion MOSFET (b) p-channel depletion MOSFET
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Fig: Transfer characteristics of MOSFET.
(a) n-channel depletion MOSFET
(b) p-channel depletion MOSFET
Comparison of MOSFET with JFET
i) In enhancement and depletion types of MOSFET, the transverse electric field induced across
an insulating layer deposited on the semi conductor material controls the conductivity of
the channel. In the JFET the transverse electric field across the reverse biased PN-junction
controls the conductivity of the channel.
ii) The gate leakage current in a MOSFET is of the order of 10-12
A. Hence the input resistance
of a MOSFET is very high in the order of 1010
to 1015
Ω. The gate leakage current of a JFET
is of the order of 10-9
A and its input resistance is of the order of 108
Ω.
iii) The output characteristics of the JFET are flatter than those of the MOSFET and hence, the
drain resistance of a JFET (0.1 to 1MΩ) is much higher than that of a MOSFET (1 to 50KΩ).
iv) JFET’s are operated only in the depletion mode. The depletion type MOSFET may be
operated in both depletion and enhancement mode.
v) Comparing to JFET, MOSFET’s are easier to fabricate.
vi) MOSFET is very susceptible to over load voltage and needs special handling during
installation. It gets damaged easily if it is not properly handled.
vii) MOSFET has zero off set voltage. As it is a symmetrical device, the source and drain can
be interchanged. These two properties are very useful in analog signal switching.
viii) Special digital CMOS circuits are available which involve near-zero power dissipation and
very low voltage and current requirements. This makes them most suitable for portable
systems.
MOSFET’s are widely used in digital VLSI circuits than JFET’s because of their advantage.
Comparison of N-channel with P-channel MOSFET’s:
1. The p-channel enhancement MOSFET is very popular because it is much easier and cheaper
to produce than the n-channel device.
2. The hole mobility is nearly 2.5 times lowe than the electron mobility. Thus, a p-channel
MOSFET occupies a larger area than an n-channel MOSFET having the same ID rating.
3. The drain resistance of p-channel MOSFET is three times higher than that for an identical n-
channel MOSFET.
4. The n-channel MOSFET has the higher packing density which makes it faster in switching
applications due to the smaller junction areas and lower inherent capacitances.
5. The n-channel MOSFET is smaller for the same complexity than p-channel device.
6. Due to the positively charged contaminants, the n-channel MOSFET may turn ON
prematurely. Whereas p-channel device will not be affected.
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UNIJUNCTION TRANSISTOR:
Uni Junction Transistor (UJT) is a three terminal semi conductor switching device. As it has
only one PN junction and three leads, it is commonly called as Uni Junction Transistor.
The three terminals are: Emitter (E), Base1 (B1) and Base2 (B2).
Construction and Symbol:
The basic structure and symbol of UJT is shown in figure below.
It consists of a lightly doped n-type silicon bar with a heavily doped p-type material alloyed
to its one side closer to B2 for producing single PN junction.
Fig. UJT (a) Basic structure (b) Circuit symbol
Here the emitter leg is drawn at an angle to the vertical and the arrow indicates the
direction of the conventional current.
Operation of UJT:
The inter base resistance between B2 and B1 of the silicon bar is, RBB=RB1+ RB2.
With emitter terminal open, if voltage VBB is applied between the two bases, a voltage
gradient is established along the n-type bar.
The voltage drop across RB1 is given by
1V VBB , where the intrinsic stand-off ratio
1
1 2
R
B
R RB B
 

. The typical value of  ranges from 0.56 to 0.75.
This voltage V1 reverse biases the PN-junction and emitter current is cut-off. But a small
leakage current flows from B2 to emitter due to minority carriers. The equivalent circuit of UJT is
shown in figure below.
Fig. UJT equivalent circuit.
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If a negative voltage is applied to the emitter, PN-junction remains reverse biased and the
emitter current is cut-of. The device is now in the ‘OFF’ state.
If a positive voltage VE is applied to the emitter, the PN-junction will remain reverse biased
so long as VE is less than V1. If VE exceeds V1 by the cut-in voltage vγ, the diode becomes forward
biased. Under this condition, holes are injected into n-type bar. These holes are repelled by the
terminal B2 and are attracted by the terminal B1. Accumulations of holes in E to B1 region reduce
the resistance in this section and hence emitter current IE is increased and is limited by VE. The
device is now in the ‘ON’ state.
Characteristics of UJT:
Figure below shows the input characteristics of UJT.
Here, up to the peak point P, the diode is reverse biased and hence, the region to the left
of the peak point is called cut-off region.
At P, the peak voltage V V VP BB   , the diode starts conducting and holes are
injected into n-layer. Hence, resistance decreases thereby decreasing VE for the increase in IE. SO
there is a negative resistance region from peak point P to valley point V.
After the valley point, the device is driven into saturation and behaves like a conventional
forward biased PN-junction diode. The region to the right of the valley point is called saturation
region. In the valley point, the resistance is changes from negative to positive. The resistance
remains positive in the saturation region.
Due to the negative resistance property, a UJT can be employed in a variety of applications,
viz., a saw-tooth wave generator, pulse generator, switching, timing and phase control circuits.
UJT Relaxation Oscillator:
The Relaxation oscillator using UJT which is meant for generating saw-tooth waveform is
shown in figure below:
Fig: UJT Relaxation Oscillator.
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It consists of a UJT and a capacitor CE which is charged through RE as the supply voltage VBB is
switched ON.
The voltage across the capacitor increases exponentially and when the capacitor voltage
reach the peak point voltage VP, the UJT starts conducting and the capacitor voltage is discharged
rapidly through EB1 and R1.
After the peak point voltage of UJT is reached, it provides negative resistance to the
discharge path which is useful in the working of the relaxation oscillator. As the capacitor voltage
reaches zero, the device then cuts off and capacitor CE starts to charge again. This cycle is
repeated continuously generating a saw-tooth waveform across CE.
The inclusion of external resistors R2 and R1 in series with B2 and B1 provides spike
waveforms. When the UJT fires, the sudden surge of current through B1 causes drop across R1,
which provides positive going spikes.
Also, at the time of firing, fall of VEB1 causes I2 to increase rapidly which generates negative
going spikes across R2. By changing the values of capacitance CE (or) resistance RE, frequency of
the output waveform can be changed as desired, since these values control the time constant RECE
of the capacitor changing circuit.
Frequency of oscillations:
The time period and hence the frequency of the saw-tooth wave can be calculated as
follows. Assuming that the capacitor is initially uncharged, the voltage VC across the capacitor prior
to breakdown is given by
/
1
t R C
E EV V eBBC
 
  
 

 
Where RECE = charging time constant of resistor-capacitor circuit, and t= time from the
commencement of the waveform. The discharge of the capacitor occurs when VC is equal to the
peak-point voltage VP, i.e,
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/
1
t R C
E EV V V eP BB BB
 
  
 

  
/
1
t R C
E Ee

  
/
1
t R C
E Ee 

 
1
log
1
t R C eE E 
 
 
 
 

1
2.303 log
10 1
R CE E 
 
 
 


If the discharge time of the capacitor is neglected, then t=T, the period of the wave.
Therefore, frequency of oscillations of saw-tooth wave,
1 1
1
2.3 log
10 1
f
T
R CE E 
 
 
 
 

SCR (SILICON CONTROLLED RECTIFIER)
The basic structure and circuit symbol of SCR is shown in figure below.
It is a four layer three terminal device in which the end p-layer acts as anode, the end n-
layer acts as anode, the end n-layer acts as cathode and p-layer nearer to cathode acts as gate.
As leakage current in silicon is very small compared to germanium, SCR’s are made of
silicon and not germanium.
(a) Basic Structure (b) Circuit symbol
Fig, Basic structure and circuit symbol of SCR.
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Operation of SCR:
The operation of SCR is divided into two categories,
i) When gate is open:
Consider that the anode is positive with respect to cathode and gate is open.
The junctions J1 and J3 are forward biased and junctions J2 is reverse biased. There is
depletion region around J2 and only leakage current flows which is negligibly small. Practically the
SCR is said to be ‘OFF’. This is called forward blocking state of SCR and voltage applied to anode
and cathode with anode positive is called forward voltage. This is shown in figure (a) below.
(a) J1, J3 Forward biased.
J2 Reverse biased.
With gate open, if cathode is made positive with respect to anode, the junctions J1, J3
become reverse biased and J2 forward biased. Still the current flowing is leakage current, which
can be neglected as it is very small. The voltage applied to make cathode positive is called reverse
voltage and SCR is said to be in reverse blocking state. This is shown in the figure (b) below.
(a) J1, J3 Reverse biased.
J2 Forward biased.
Fig. Operation of SCR when gate is open (a), (b).
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2. When gate is closed:
Consider that the voltage is applied between gate and cathode when the SCR is in forward
blocking state. The gate is made positive with respect to the cathode. The electrons from n-type
cathode, which are majority in number, cross the junction J3 to reach to positive of battery.
While holes from p-type move towards the negative of battery. This constitutes the gate
current. This current increases the anode current as some of the electrons cross junction J2. As
anode current increases, more electrons cross the junction J2 and the anode current further
increases. Due to regenerative action, within short time, the junction J2 breaks and SCR conducts
heavily.
The connections are shown in the figure. The resistance R is required to limit the current.
Once the SCR conducts, the gate loses its control.
Fig. Operation of SCR when gate is closed.
Characteristics of SCR:
The characteristics are divided into two sections:
i) Forward characteristics
ii) Reverse characteristics
i) Forward characteristics:
It shows a forward blocking region, when IG=0. It also shows that when forward voltage
increases up to VBO, the SCR turns ON and high current results.
It also shows that, if gate bias is used then as gate current increases, less voltage is
required to turn ON the SCR.
If the forward current falls below the level of the holding current IH, then depletion region
begins to develop around J2 and device goes into the forward blocking region.
When SCR is turned on from OFF state, the resulting forward current is called latching
current IL. The latching current is slightly higher than the holding current
ii) Reverse characteristics:
If the anode to cathode voltage is reversed, then the device enters into the reverse
blocking region. The current is negligibly small and practically neglected.
If the reverse voltage is increases, similar to the diode, at a particular value avalanche
breakdown occurs and a large current flows through the device. This is called reverse breakdown
and the voltage at which this happens is called reverse breakdown voltage
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Fig. Characteristics of SCR.
Two Transistor Analogy:
The easiest way to understand how SCR works it ot visualize it separately into two halves,
as shown in the figure. The left half is a p-n-p transistor and right half is n-p-n transistor. This is
also called two transistor model of SCR.
The collector current of T1 becomes base current of T2 and collector current of T2 becomes
base current of T1.
Fig, Two transistor model of SCR.
Mathematical Analysis:
Let IC1 and IC2 are collector currents, IE1 and IE2 are emitter currents while IB1 and IB2 are
base currents of transistors T1 and T2.
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Let both the transistors are operating in active region.
From transistor analysis we can write,
1 1 1
I IE I
C CO
  and
2 2 2
I IE I
C CO
 
Where ICO = Reverse current (or) leakage current.
And
1





Now, IE2 = IC2 + IB2
IA = Anode current = IE1
IK = Cathode current = IE2
IG = Gate current
Now, IK = IA + IG
2 2 2
I I I I I
E A G C B
    
But IB2 = IC1 + IG
2 1
I I I I I
A G C C G
    
Substituting IC1 and IC2,
1 1 1 2 2 2
I IE I IE I
A CO CO
     
 2 1 1 2
I I I I I I
A A G A CO CO
      
2 1 2 1 2
I I I I I I
A A A G CO CO
       
 
2 1 2
1 21
G CO COI I I
I
A

 
 
 
 
In blocking state 1 and 2 are small. Thus IA is small.
As 1 2  approaches unit, the SCR is ready to enter into conduction. Thus due to
positive gate current, the regenerative action takes place and SCR conducts.
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UNIT-V
BIASING AND STABILISATION
SYLLABUS:
BJT BIASING: Need for biasing, operating point, load line analysis, bias stabilization
techniques: fixed bias, collector to base bias, self-bias, stabilization against variations in
Ico, VBE and  for the self bias circuit, bias compensation techniques, thermal runaway and
thermal stability.
FET BIASING: Biasing techniques: fixed bias, source self-bias, voltage divider bias.
LECTURE PLAN
S. No. Topic to be covered
Periods
required
1
Introduction to Biasing, Operating Point, DC Equivalent Model,
Criterion for fixing operating point.
2
2 Fixed Bias, Analysis and related problems 1
3 Collector to Base Bias, Analysis and related problems 1
4 Self Bias, Analysis and related problems 1
5 Calculation of Stabilization factors s, s', s" 1
6
Compensation techniques against variation in Vbe, Ico.Thermal
runaway and thermal stability.
1
7 Related Problems 1
Total
08
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UNIT-V
BIASING & STABILIZATION
Introduction:
The basic function transistor is to do amplification. The process of raising the strength of a
weak signal without any change in its shape is known as faithful amplification.
For faithful amplification, the following three conditions must be satisfied:
i) The emitter-base junction should be forward biased,
ii) The collector-base junction should be reverse biased.
iii) Three should be proper zero signal collector current.
The proper flow of zero signal collector current (proper operating point of a transistor) and
the maintenance of proper collector-emitter voltage during the passage of signal is known as
„transistor biasing‟.
When a transistor is not properly biased, it work inefficiently and produces distortion in the
output signal. Hence a transistor is to be biased correctly. A transistor is biased either with the
help of battery (or) associating a circuit with the transistor. The latter method is generally
employed. The circuit used with the transistor is known as biasing circuit.
In order to produce distortion-free output in amplifier circuits, the supply voltages and
resistances in the circuit must be suitably chose. These voltages and resistances establish a set of
d.c. voltage VCEQ and current ICQ to operate the transistor in the active region. These voltages and
currents are called quiescent values which determine the operating point (or) Q-Point for the
transistor.
The process of giving proper supply voltages and resistances for obtaining the desired Q-
Point is called biasing.
DC Load Line:
Consider common emitter configuration circuit shown in figure below:
In transistor circuit analysis generally it is required to determine the value of IC for any
desired value of VCE. From the load line method, we can determine the value of IC for any desired
value of VCE. The output characteristics of CE configuration is shown in figure below:
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By applying KVL to the collector circuit
0V I R VC C C CE   
V I R V
CC C C CE
  
V V I R
CE CC C C
  
If the bias voltage VBB is such that the transistor is not conducting then IC=0 and VCE= VCC.
Therefore, when IC=0, VCE= VCC this point is plotted on the output characteristics as point A.
If VCE=0 then
0 V I R
CC C C
 
VCCIC RC
 
Therefore, VCE=0,
VCCIC RC
 this point is plotted on the output characteristics as point B.
The line drawn through these points is straight line „d.c load line‟.
The d.c. load line is plot of IC versus VCE for a given value of RC and a given level of VCC.
Hence from the load line we can determine the IC for any desired value of VCE.
Operating Point (or) Quiescent Point:
In designing a circuit, a point on the load line is selected as the dc bias point (or) quiescent
point. The Q-Point specifies the collector current IC and collector to emitter voltage VCE that exists
when no input signal is applied.
The dc bias point (or) quiescent point is the point on the load line which represents the
current in a transistor and the voltage across it when no signal is applied. The zero signal values of
IC ad VCE are known as the operating point.
Biasing:
The process of giving proper supply voltages and resistances for obtaining the desired Q-
point is called „biasing‟.
How to choose the operating point on DC load line:
The transistor acts as an amplifier when it is operated in active region. After the d.c.
conditions are established in the circuit, when an a.c. signal is applied to the input, the base
current varies according to te amplitude of the signal and causes IC to vary consequently producing
an output voltage variation. This can be seen from output characterizes.
Fig. Operating point near saturation region gives clipping at the positive peak.
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Consider point A which is very near to the saturation point, even though the base current is
varying sinusoidally the output current and output voltage is seen to be clipped at the positive
peaks. This results in distortion of the signal.
Consider point B which is very near to the cut-off region. The output signal is now clipped
at the negative peak. Hence this two is not a suitable operating point.
Fig. Operating point near cut-off region given clipping at the negative peak.
Consider point C which is the mid point of the DC load line then the output signal will not
be distorted.
Fig. Operating point at the centre of active region is most suitable.
A good amplifier amplifies signals without introducing distortion. Thus always the operating
point is chosen as the mid point of the DC load line.
Stabilization:
The maintenance of operating point stable is known as „Stabilization’.
There are two factors which are responsible for shifting the operating point. They are:
i) The transistor parameters are temperature dependent.
ii) When a transistor is replaced by another of same type, there is a wide spread in
the values of transistor parameters.
So, stabilization of the operating point is necessary due to the following reasons:
i) Temperature dependence of IC.
ii) Individual variations and
iii) Thermal runaway.
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Temperature dependence of IC:
The instability of IC is principally caused by the following three sources:
i) The ICO doubles for every 10o
C rise in temperature.
ii) Increase of β with increase of temperature.
iii) The VBE decreases about 2.5mV per o
C increase in temperature.
Individual variations:
When a transistor is replaced by another transistor of the same type, the values of β and
VBE are not exactly the same. Hence the operating point is changed. So it is necessary to stabilize
the operating point irrespective of individual variations in transistors parameters.
Thermal Runaway:
Depending upon the construction of a transistor, the collector junction can withstand
maximum temperature. The range of temperature lies between 60o
C to 100o
C for „Ge‟ transistor
and 150o
C to 225o
C for „Si‟ transistor. If the temperature increases beyond this range then the
transistor burns out. The increase in the collector junction temperature is due to thermal runaway.
When a collector current flows in a transistor, it is heated i.e., its temperature increases. If
no stabilization is done, the collector leakage current also increases. This further increases the
transistor temperature. Consequently, there is a further increase in collector leakage current. The
action becomes cumulative and the transistor may ultimately burn out. The self-destruction of an
unstabilized transistor is known as thermal runaway.
The following two techniques are used for stabilization.
1) Stabilization techniques:
The technique consists in the use of a resistive biasing circuit which permits such a
variation of base current IB as to maintain IC almost constant in spite of ICO, β and VBE.
2) Compensation techniques:
In this technique, temperature sensitive devices such as diodes, thermistors and
sensistors etc., are used. Such devices produce compensating voltages and current in such
a way that the operating points maintained stable.
Stability factors:
Since there are three variables which are temperature dependent, we can define three
stability factors as below:
i) S: The stability factor „S‟ is defined as the ration of change of collector current IC with
respect to the reverse saturation current ICO, keeping β and VBE constant
i.e.,
I I
C CS
I I
CO CO
 
 
 
VBE, β constant
ii) S’: The stability factor S‟ is defined as the rate of change of IC with respect to VBE,
keeping ICO and β constant i.e.,
' I I
C CS
V VBE BE
 
 
 
ICO, β constant
iii) S’’: The stability factor S‟‟ is defined as the rate of change of IC with respect to β,
keeping ICO and VBE constant i.e.,
' I I
C CS
 
 
 
 
ICO, VBE constant
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Ideally, stability factor should be perfectly zero to keep operating point stable.
Practically, stability factor should have the value as minimum as possible.
Derivation of Stability Factor (S):
For a common emitter configuration collector current is given as,
I I IBC CEO
 
 1I I IBC CO
     ………….. (1)
Differentiating equation (1) w.r.t. IC keeping β constant, we get
 1 1
II COB
I I
C C
 

  
 
 1 1
II COB
I I
C C
 

   
 
1
1
I
C
II BCO
I
C


 
 



1
1
IB
I
C
S 


 



………… (2)
To obtain S’ and S’’:
In standard equation of IC, replace IB in terms of VBE to get S‟.
Differentiating equation of IC w.r.t. β after replacing IB in terms of VBE to get S‟‟.
Methods of Biasing:
Some of the methods used for providing bias for a transistor are as follows:
1) Fixed bias (or) base resistor method.
2) Collector to base bias (or) biasing with feedback resistor.
3) Voltage divider bias.
1). Fixed bias (or) base resistor method:
A CE amplifier used fixed bias circuit is shown in figure below:
Fig. Fixed bias circuit.
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In this method, a high resistance RB is connected between positive terminal of supply VCC
and base of the transistor. Here the required zero signal base current flows through RB and is
provided by VCC.
In figure, the base-emitter junction is forward biased because the base is positive w.r.t.
emitter. By a proper selection of RB, the required zero signal base current (and hence IC=βIB) can
be made to flow.
Circuit Analysis:
Base Circuit:
Consider the base-emitter circuit loop of the above figure.
Writing KVL to the loop, we obtain
0V I R VB B BECC   
V I R VB B BECC  
V VBECCIB RB

 
But I I IBC CEO 
As ICEO is very small, I IBC 
V VBECCIC RB


 
 
 
 
 
 β, VCC, VBE are constant for a transistor  IC depends on RB.
Choose suitable value of RB to get constant IC in active region.
 V VBECC
RB IC

  (or)
VCCRB IC

  V VBE CCQ
Collector Circuit:
Consider the collector-emitter circuit loop of the circuit.
Writing KVL to the collector circuit, we get
0V I R VB BCC CE   
V V I RCE CC C C  
Stability factor S:
The stability factor S is given by,
1
1
IB
I
C
S 






We have
V VBECCIB RB

 = constant 0
IB
IC

 

1S   
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If β=100 then S=101. This shows that IC changes 101 times as much as any changes in
ICO. Thus IC is dependent upon ICO and temperature.
The value of S is high and has very poor stability.
Stability factor S’:
We have  1I I IBC CO
   
But
V VBECCIB RB


 1
V VBECCI IC CORB
 

   
 
 
 
 
Differentiating the above equation w.r.t. IC,
We get 1
VBE
R IB C
 
 

'S
R
B

  
Stability factor S’’:
We have  1I I IBC CO
   
Differentiating the above equation w.r.t. β,
We get
IC I IB CO

 

'' I
CS

  (Q ICO is very small &
ICIB 
 )
Problem:
1) Figure below shows a silicon transistor with β=100 and biased by base resistor method.
Determine the operating point.
Solution:
Given VCC=10V, VBE=0.7V (Silicon transistor), β=100, RB=930kΩ.
Applying KVL to base-emitter loop,
V VBECCV V I R IBE B B BCC RB

   
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10 0.7
100
3930 10
1
V VBECCI IBC RB
mA 
 
   

   
       
Applying KVL to collector-emitter loop,
V V I R V V I RCC CE C C CE CC C C    
 3 310 1 10 4 10 6VCE V      
Operating point is (6V, 1mA)
2. For the following circuit shown in figure below, find the operating point.
Solution:
DC equivalent of above circuit is shown below.
KVL to base-emitter loop is
  0V I R V I I RB B BE B ECC C     
I R I R I R V VB B B E B B BECC   
 1
V VBECCIB R RB E


 
 
20 0.7
3430 51 10
40.1IB A

  
 
2.01I IBC mA 
KVL to collector-emitter loop is
0V I R V I RECC C C CE C    
 V V I R RECE CC C C   
3 320 2.01 10 (2 1) 10VCE
     =20-6.03 = 13.97V
 Operating point is Q (13.97V, 2.01mA)
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Advantages of fixed bias circuit:
1. This is a simple circuit which uses very few components.
2. The operating point can be fixed anywhere in the active region of the characteristics by
simply changing the values of RB. Thus, it provides maximum flexibility in the design.
Disadvantages of fixed bias circuit:
1. With the rise in temperature the operating point if not stable.
2. When the transistor is replaced by another with different value of β, the operating point
with shift i.e., the stabilization of operating point is very poor in fixed bias circuit.
Because of these disadvantages, fixed bias circuit required some modifications. In the modified
circuit, RB is connected between collector and base. Hence the circuit is called „collector to base‟
bias circuit.
2). Collector to Base bias (or) Biasing with feedback resistor:
A CE amplifier using collector to base bias circuit is shown in the figure. In this method, the
biasing resistor is connected between the collector and the base of the transistor.
Fig. Collector–to–Base bias circuit.
Circuit Analysis:
Base Circuit:
Consider the base-emitter circuit, applying the KVL to the circuit we get,
  0V I I R I R VB B B BECC C C    
 V I R R I R VB B BECC C C C    
V V I RBECC C CIB R RBC
 
 

…………….. (1)
But IC = βIB
 V I R VBECC C C
IC R RBC
  
 

…………….. (2)
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Collector circuit:
Consider the collector-emitter circuit, applying the KVL to the circuit we get
  0V I I R VBCC C C CE    
 V V I I RBCE CC C C    ……………. (3)
Stability factor S:
The stability factor S is given by,
1
1
IB
I
C
S 






We have
V V I RBECC C CIB R RB C
 


= constant
Differentiating the above equation w.r.t. IC we get
RI CB
I R RBC C

 
 
1
1
S
RC
R RBC



 


……………… (4)
The stability factor S is smaller than the value obtained by fixed bias circuit. Also „S‟ can be
made smaller by making RB small (or) RC large.
Stability factor S’:
We have
 V V I RBECC C C
IC R RBC
  


Differentiating the above equation w.r.t. IC,
We get 1
RV CBE
R R I R RB BC C C



  
  
1
R VC BE
R R R R IB BC C C



  
  
R R R VBC C BE
R R R R IB BC C C
   
 
  
 
'
1
S
R R
B C


  
 
………………….. (5)
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Stability factor S’’:
We have
 V V I RBECC C C
IC R RBC
  


Differentiating the above equation w.r.t. β,
We get
I V V R IBEC CC C CICR R R RB BC C

 
  
  
   
 
 
 
1
I R V V I RBEC C CC C C
R R R RB BC C


  
  
  
 
 
  
 1
IC R R V V I RB BEC CC C C


    

 
 
 
''
1
V V I RBECC C CS
R RB C
 
 
 
 
 
''
1
I R RBC CS
R RB C


 
 
……………… (6)
Problems:
3. An N-P-N transistor with β=50 is used in a CE circuit with VCC=10V, RC=2kΩ. The bias is
obtained by connecting a 100kΩ resistance from collector to base. Assume VBE=0.7V. Find
i) the quiescent point and
ii) Stability factor „S‟
Solution:
i) Applying KVL to the base circuit,
 V I I R I R VB B B BECC C C  
 V I R R I R VB B BECC C C C    
V V I RBECC C CIB R RBC
 
 

 V V I RBECC C C
IC R RBC
  
 

 350 10 0.7 2 10
3102 10
IC
IC
  
 

2.3CI mA 
Applying KVL to the collector circuit,
 V I I R VBCC C C CE   V V I I RBCE CC C C  
 6 3 310 46 10 2.3 10 2 10       
5.308V VCE  The quiescent point is (5.308V, 2.3mA)
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ii) Stability factor, S:
1
1
S
RC
R RBC






51
25.75
320 10
1 50
3102 10
S
 
 
 
 
  



4. A transistor with β=45 is used with collector to base resistor RB biasing with quiescent value of
5V for VCE. If VCC=24V, RC=10kΩ, RE=270Ω, find the value of RB.
Solution:
Applying KVL to collector and emitter loop, we have
0V I R V I RE ECC C C CE   
 V V I R I I RB ECC CE C C C    
 1V V R R IE BCC CE C      
 
 1
V VBECCIB R REC 

 
 
24 5
45 10 50 0.27


  
=0.041 mA
Further, 0V I R I R V I RB B BE E ECC C C    
 1V V R I I R R IBE B B B E BCC C       `
24 0.7 45 10 50 0.27I RB B       
  23.3 450 12.420.041 RB    
 
105.87BR K  
3). Voltage Divider Bias (Or) Self-Bias (Or) Emitter Bias:
The voltage divider bias circuit is shown in figure.
Fig. Voltage divider bias circuit.
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In this method, the biasing is provided by three resistors R1, R2 and RE. The resistors R1
and R2 acts as a potential divider giving a fixed voltage to the base.
If collector current increases due to change in temperature (or) change in β, the emitter
current IE also increases and the voltage drop across RE increases, reducing the voltage difference
between base and emitter (VBE).
Due to reduction in VBE, base current IB and hence collector current IC is also reduces.
Therefore, we can say that negative feedback exists in the emitter bias circuit. This reduction in
collector current IC components for the original change in IC.
Circuit Analysis:
Let current flows through R1. As the base current IB is very small, the current flowing
through R2 can also be taken as I.
The calculation of collector current IC is as follows:
The current „I‟ flowing through R1 (or) R2 is given by
1 2
VCCI
R R


…………………… (1)
The voltage V2 developed across R2 is given by,
2 2
1 2
VCCV R
R R


 
 
 
 
………….……. (2)
Base Circuit:
Applying KVL to the base circuit, we have
2V V V V I RBE E BE E E    2V V I RBE EC    I IE CQ
2V VBEIC RE

  …………….. (3)
Hence IC is almost independent of transistor parameters and hence good stabilization is
ensured.
Collector Circuit:
Applying KVL to the collector circuit, we have
V I R V I RE ECC C C CE   V I R V I RECC C C CE C     I IE CQ
 V V I R RECE CC C C    ………………. (4)
Circuit analysis using Thevenin’s Theorem:
The Thevenin equivalent circuit of voltage-divider bias is as shown below:
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Fig. Simplified equivalent circuit.
From above figure we have,
2
2
1 2
R
V V VCCTh R R
 

 
 
 
 
………………… (5)
1 2
1 2
1 2
R R
R R RTh R R
 

P ………………… (6)
Applying KVL to the base-emitter circuit, we have
 V I R V I I RB BE B ECTh Th    ……………….. (7)
Applying KVL to the collector-emitter circuit, we have
 V V I R RECE CC C C    I IBC Q
………….…….. (8)
From equation (8), we have
V VCC CEIC R REC

 

Substituting this value of IC in equation (7), we have
V VCC CEV I R V R IB BE E BTh Th R REC

   

 
 
  
(or)
R V R VE ECC CEV I R V R IB BE E BTh Th R R R RE EC C
    
 
From equation (9) we can calculate the value of collector voltage VCE for each value of IB.
Stability factor (S):
For determining stability factor „S‟ for voltage divider bias, consider the Thevenin‟s
equivalent circuit.
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Hence, Thevenin‟s equivalent voltage VTh is given by
2
1 2
R
V VCCTh R R


and the R1 and R2 are replaced by RB which is the parallel combination of R1 and R2.
1 2
1 2
R R
RB R R
 

Applying KVL to the base circuit, we get  V I R V I I RB B BE B ECTh    
Differentiating w.r.t. IC and considering VBE to be independent of IC we get,
 0
I IB BR R RB E EI IC C
 
   
 
 
IB R R RE B EIC

   

I RB E
I R RE BC
 
 
 
We have already seen the generalized expression for stability factor „S‟ given by
1
1
S
IB
IC







Substituting value of
IB
IC


in the above equation, we get
1
1
S
RE
R RE B



 


 
 
 
 
     
 
1 1
1
R R R RE B E BS
R R R R RB E E B E
 
 
   
  
   
 
1
1
1
RB
RES
RB
RE



 
 
 
 
 
 
  
 
The ratio
RB
RE
controls value of stability factor „S‟.
If 1
RB
RE
 then above equation reduces to  
1
1 1
1
S 

  

 
 
 
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Practically 0
RB
RE
 But to have better stability factor „S‟, we have to keep ration
RB
RE
as
small as possible.
Stability factor „S‟ for voltage divider bias (or) self bias is less as compared to other biasing
circuits studied. So, this circuit is most commonly used.
Stability factor (S’):
Stability factor S‟ is given by '
ICS
VBE



ICO, β constant
It is the variation of IC with VBE when ICO and β are considered constant.
We know that,  1I I IBC CO   
 1I IC COIB


 

and  V I R V I I RB B BE B ECTh    
 V V R R I R IBE E B B E CTh   
By substituting IB in the above equation, we get
 
 1I IC COV V R R R IBE E B E CTh


 
   
 
  
 
    1R R I R R IE B E BC COV R IE CTh

 
  
  
    11 R R IR R I E BE B COCV VBE Th

 
  
   
 
 
Differentiating the above equation w.r.t VBE with ICO and β constant, we get
 1
1 0 0
IR R CB E
VBE


 
  

 
 
  
 1
IC
V R RBE B E


 
 
  
 1
'S
R RB E



 
 
Stability Factor S’’:
Stability factor S‟‟ is given by ''
ICS




ICO, VBE constant
We have,
    11 R RR R I E BB E CV V IBE COTh

 
  
  
  
   
 
 
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 1
'
R R IB E CV VTh


 
  
 
 
Where
  
 
1
'
R RE BV I R R IE BCO CO


 
  
 
 
 
 
 1 Q
Therefore, we write the above equation in terms of IC, we get
 1
'V V VBETh
IC R RB E


 

 
 
 
Differentiating above equation w.r.t. taking V‟ independent of β, we get,
  
 
1 '
2
1
'R R V V V V V V RI B E BE BE ETh ThC
R RB E
 


      


 
 
 
 
 
Multiplying numerator and denominator by (1+β) we get,
   
     
1
1 1 1
'R R V V VI B E BEThC
R R R RB E B E

   
   

        
   
 
   1 1
'S V V VBETh
R RB E 
 

   
 
  
 
1
1
R RB ES
R RB E


 

 
  
 
    
Q
Multiplying numerator and denominator by β, we get
 
     11 1
'V V V SI I SBEThC C
R RB E

    
 
 
    
 
 
 1
'V V VBETh
IC R RB E


 

 
 
 
  
  
Q
 1
"
I I SC CS
  


 
  where
1
1
S
RE
R RE B






 
 
 
 
.
Problems:
5. For the circuit shown in figure, determine the value of IC and VCE. Assume VBE=0.7V and
β=100
Solution:
35 101 10
3 310 10 5 101 2
3.33
R
V VB CCR R
V

   
   
We know that 3.33 0.7 2.63V V VE B BE V    
and
2.63
500
5.26
V VEIE RE
mA  
We know that
32.63 10
52.08
1 101
IEI AB 


  

and IC=βIB=100x52.08x10-6
= 5.208mA
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Applying KVL to the collector circuit we get
0V I R V I RE ECC C C CE  
V V I R I RE ECE CC C C    =10-5.208x10-3
x1x103
- 5.26x10-3
x500
2.162V V
CE
 
6. In the circuit shown, if IC=2mA and VCE=3V, Calculate R1 and R3.
Solution:
From collector circuit,
15 = ICR3 + VCE + IER4
= 2 x1 0 - 3
xR3 + 3 + (1 + β )I B x5 0 0
32 10312 2 10 101 5003 100
R
      
5.495
3
R k  
From Base circuit, 2
2
1 2
R
V VCCR R


310 10
152 310 101
V
R

  
 
But,  0.6 0.6 12 4 4V V V I R I RBE E E B      
32 10
0.6 101 500 1.612 100
V V

     
31 10
1.61 15
310 101R

  
 
3 310 10 93.17 101R     
83.171R k  
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7. For the circuit shown below, calculate VE, IE, IC and VC. Assume VBE=0.7V.
Solution:
From Base circuit,
4 0.7V V VBE E E   
3.3V VE 
3.3I RE E 
3.3
1
33.3 10
I mAE  

But IE=IB+IC = (1+β)IB
Assume β=100,
1
0.0099
101
mA
I mAB  
IC=βIB = 100x0.0099mA = 0.99mA
From Collector circuit,
10 100 0.99 4.7 5.347V I R mA KC C C V      
Bias Compensation Techniques:
The biasing circuits provide stability of operating point in case variations in the transistor
parameters such as ICO, VBE and β.
The stabilization techniques refer to the use of resistive biasing circuits which permit IB to
vary so as to keep IC relatively constant.
On the other hand, compensation techniques refer to the use of temperature sensitive
devices such as diodes, transistors, thermistors, sensistors etc., to compensate for the variation in
currents. Sometimes for excellent bias and thermal stabilization, both stabilization as well as
compensation techniques are used.
The following are some compensation techniques:
1) Diode compensation for instability due to VBE variation.
2) Diode compensation for instability due to ICO variation.
3) Thermistor compensation.
4) Sensistor compensation.
1) Diode compensation for instability due to VBE variation:
For germanium transistor, changes in ICO with temperature contribute more serious
problem than for silicon transistor.
On the other hand, in a silicon transistor, the changes of VBE with temperature possesses
significantly to the changes in IC.
A diode may be used as compensation element for variation in VBE (or) ICO.
The figure below shows the circuit of self bias stabilization technique with a diode
compensation for VBE. The Thevenin‟s equivalent circuit is shown in figure.
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Fig. Self bias with stabilization and compensation Fig. Thevenin‟s equivalent circuit
The diode D used here is of the same material and type as the transistor. Hence the
voltage VD across the diode has same temperature coefficient (-2.5mV/o
C) as VBE of the transistor.
The diode D is forward biased by the source VDD and resistor RD.
Applying KVL to the base circuit, we get
0V I R V I R VB BE E E DTh Th     
 V V V I R R I IBE D B E E CTh Th      …………………. (1)
But  1I I IBC CO    ………………... (2)
From equation (1), we get
 V V V R I R R IBE D E E BCTh Th    
Substituting the value of IB from equation (2), we get
 
 1I IC COV V V R I R RBE D E ECTh Th


 
    
 
  
 
       1V V V R I R R I I R RBE D E E EC C COTh Th Th          
        1 1V V V I R R I R RBE D E ECO CTh Th Th          
     
 
1
1
V V V I R RBE D ECOTh Th
IC R RETh
 

    
 
 
…………… (3)
Since variation in VBE with temperature is the same as the variation in VD with temperature,
hence the quantity (VBE-VD) remains constant in equation (3). So the current IC remains constant
in spite of the variation in VBE.
2) Diode compensation for instability due to ICO variation:
Consider the transistor amplifier circuit with diode D used for compensation of variation in
ICO. The diode D and the transistor are of the same type and same material.
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In this circuit diode is kept in reverse biased condition.
The reverse saturation current IO of the diode will increase with temperature at the same as
the transistor collector saturation current ICO.
From figure
V V VBECC CCI
R R

  = constant.
The diode D is reverse biased by VBE. So the current through D is the reverse saturation
current IO. Now base current IB=I-IO
But  1I I IBC CO   
   1I I I IC O CO     
If β>>1, I I I IC O CO    
In the above expression, I is almost constant and if IO of diode D and ICO of transistor track
each other over the operating temperature range, then IC remains constant.
3) Thermistor Compensation:
This method of transistor compensation uses temperature sensitive resistive elements,
thermistor rather than diodes (or) transistors:
It has a negative temperature coefficient, its resistance decreases exponentially with
increasing temperature as shown in the figure.
Slope of this curve
RT
T



RT
T


is the temperature coefficient for thermistor, and
the slope is negative. So we can say that thermistor
has negative temperature coefficient of resistance.
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Figure below shows thermistor compensation technique.
As shown in figure, R2 is replaced by thermistor RT in self bias circuit.
Fig. Thermistor compensation technique.
With increase in temperature, RT decreases. Hence voltage drop across it also decreases.
This voltage drop is nothing but the voltage at the base with respect to ground. Hence, VBE
decreases which reduces IB. This behavior will tend to offset the increase in collector current with
temperature.
We know,  1I I IBC CO   
In this equation, there is increase in ICBO and decreases in IB which keeps IC almost
constant.
Consider another thermistor compensation technique shown in figure. Here, thermistor is
connected between emitter and VCC to minimize the increase in collector current due to change in
ICO, VBE (or) β with temperature.
Fig. Thermistor compensation technique.
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IC increase with temperature and RT decreases with increase in temperature. Therefore,
current flowing through RE increases, which increases the voltage drop across it. Emitter to Base
junction is forward biased. But due to increase in voltage drop across RE, emitter is made more
positive, which reduces the forward bias voltage VBE. Hence, base current reduces.
IC is given by,  1I I IBC CO   
As ICBO increases with temperature, IB decreases and hence IC remain fairly constant.
4) Sensistor Compensation:
This method of transistor compensation uses sensistor, which is temperature sensitive
resistive element.
Sensistor has a positive temperature coefficient, i.e., its resistance increases exponentially
with increasing temperature.
Slope of this curve
RT
T



RT
T


is the temperature coefficient for sensistor, and the
slope is positive.
So we can say that sensistor has positive temperature
coefficient of resistance.
As shown in figure R1 is replaced by sensistor RT in self bias
circuit.
As temperature increases, RT increases which decreases the current flowing through it. Hence
current through R2 decreases which reduces the voltage drop across it.
Fig. Sensistor compensation technique.
As voltage drop across R2 decreases, IB decreases. It means, when ICBO increases with
increase in temperature, IB reduces due to variation in VBE, maintaining IC fairly constant.
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Thermal Runaway:
The collector current for the CE circuit is given by
 1I I IBC CO   
The three variables in the equation, β, IB and ICO increase with rise in temperature. In
particular, the reverse saturation current (or) leakage current ICO changes greatly with
temperature. Specifically, it doubles for every 10o
C rise in temperature.
The collector current IC causes the collector-base junction temperature to rise which, in
turn, increase ICO, as a result IC increase still further, which will further rise the temperature at the
collector-base junction. This process is cumulative and it is referred to as self heating.
The excess heat produced at the collector-base junction may even burn and destroy the
transistor. This situation is called “Thermal Runaway” of the transistor.
Thermal Resistance:
Transistor is a temperature dependent device.
In order to keep the temperature within the limits, the heat generated must be dissipated
to the surroundings.
Most of the heat within the transistor is produced at the collector junction.
If the temperature exceeds the permissible limit, the junction is destroyed.
For Silicon transistor, the temperature is in the range 150o
C to 225o
C.
For Germanium, it is between 60o
C to 100o
C.
Let TA
o
C be the ambient temperature i.e., the temperature of surroundings air around
transistor and Tj
o
C, the temperature of collector-base junction of the transistor.
Let PD be the power in watt dissipated at the collector junction.
The steady state temperature rise at the collector junction is proportional to the power
dissipated at the junction. It is given by
T T T Pj DA     Where θ = constant of proportionality
The θ, which is constant of proportionality, is referred to as thermal resistance.
T Tj A
PD



The unit of θ, the thermal resistance, is o
C/watt.
The typical values of θ for various transistors vary from 0.2o
C/watt for a high power
transistor to 1000 o
C/watt for a low power transistor.
Heat Sink:
As power transistors handle large currents, they always heat up during operation.
The metal sheet that helps to dissipate the additional heat from the transistor is known as
heat sink. The heat sink avoids the undesirable thermal effect such as thermal runaway.
The ability of heat sink depends on the material used, volume, area, shape, constant
between case and sink and movement of air around the sink.
The condition for Thermal Stability:
As we know, the thermal runaway may even burn and destroy the transistor, it is necessary
to avoid thermal runaway.
The required condition to avoid thermal runaway is that the rate at which heat is released
at the collector junction must not exceed the rate at which the heat can be dissipated. It is given
by
P PC D
T Tj j
 

 
………………(1)
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But we know, from thermal resistance
T T Pj DA   …………….. (2)
Differentiating equation (2) w.r.t. Tj we get
1
PD
Tj




1PD
Tj 

 

………………. (3)
Substituting equation (3) in equation (1), we get
1PD
Tj 

 

……………… (4)
This condition must be satisfied to prevent thermal runaway.
By proper design of biasing circuit it is possible to ensure that the transistor cannot
runaway below a specified ambient temperature (or) even under any condition.
Let us consider voltage divider bias circuit for the analysis.
Fig. Voltage divider bias circuit.
From fig., PC = heat generated at the collector junction.
= DC power input to the circuit – the power lost as I2
R
in RC and RE.
If we consider I IEC  we get
 2P V I I R REC CC C C C   ……………….. (6)
Differentiating equation (6) w.r.t IC we get
 2
PC V I R RECC C CIC

  

……………….. (7)
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From equation (4)
1
.
P IC C
I TjC 
 

 
……………….. (8)
In the above equation
IC
Tj


can be written as
' "
I I VC CO BES S S
T T T Tj j j j
   
  
   
………………. (9)
Since junction temperature affects collector current by affecting ICO, VBE, and β. But as we
are doing analysis for thermal runaway the affect of ICO dominates. Thus we can write
I IC COS
T Tj j
 

 
…………………….. (10)
As the reverse saturation current for both Silicon and Germanium increases about 7
percent per o
C, we can write
0.07
ICO ICOTj



……………………. (11)
Substituting equation (11) in equation (10), we get
0.07
IC S ICOTj

 

……………………. (12)
Substituting equations (7) and (12) in equation (8), we get
     1
2 0.07V I R R S IECC C C CO 
   
 
………………….. (13)
As S, ICO and θ are positive; we see that the inequality in equation (13) is always satisfied
provided that the quantity in the square bracket is negative.
 2V I R RECC C C  
 2
VCC I R REC C   ……………….. (14)
Applying KVL to the collector circuit of voltage divider bias circuit we get,
 V V I R RECE CC C C    I IEC Q
 I R R V VEC C CC CE   
Substituting the value of  I R REC C  in equation (14), we get
2
VCC V VCC CE  
2
VCCV VCC CE  
2
VCCVCE 
Thus if
2
VCCVCE  , the stability is ensured.

Edc notes

  • 1.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 1 UNIT-1 ELECTRON DYNAMICS AND CRO SYLLABUS: Motion of charged particles in electric and magnetic fields. Simple problems involving electric and magnetic fields only. Electrostatic and magnetic focusing. Principles of CRT, deflection sensitivity (Electrostatic and magnetic deflection), Parallel Electric and Magnetic fields, Perpendicular Electric and Magnetic fields. LECTURE PLAN S. No. Topic to be covered Periods required 1 Introduction to Coulomb's Law, Electric field intensity, Potential, Potential Energy. 1 2 Motion of charged particles in electric field. 3 3 Simple problems involving electric field. 1 4 CRO, Principle of CRT, Electrostatic and Magnetic Focusing 2 5 Electrostatic Deflection Sensitivity, Simple problems involving electrostatic deflection sensitivity. 1 6 Motion of charged particles in magnetic fields. 1 7 Simple problems involving magnetic field. 1 8 Magnetic Deflection Sensitivity, Simple problems involving magnetic deflection sensitivity. 1 9 Comparison between deflection methods, Current Density, Charge density and their relation. Related Problems 1 10 Motion of electron in (i) Parallel electric and magnetic fields and (ii) Perpendicular electric and magnetic fields. 3 Total 15
  • 2.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 2 Introduction: Electronics has been defined as the branch of science & Technology which relates the conduction of current through vacuum (or) gas (or) semiconductor material. An electronic device is that in which electrons flow through a vacuum (or) gas (or) semiconductor. The Operation of an electronic device depends upon the motion of electrons under the influence of electric and Magnetic fields. The behavior of an electron under the influence of these fields is termed as electron ballistics. The charge of an electron is 1.602 x 10-19 coulombs. The mass of an electron is 9.1 x 10-31 kg. Force: From coulomb‟s law F  Q1 Q2 F  ² 1 R  F  2 21 R QQ F = 2 0 21 4 R QQ  Where 0 is the permittivity of free space. 0 = 8.854 x 10-12 farad/m Electric field intensity (E): The electric field intensity is defined as the force on a unit positive charge. The unit of electric field intensity is volt/meter. The force on charged particles in an electric field: The force on a unit positive charge at any point in an electric field is the electric field intensity at that point. The force (F) on a positive charge „q‟ in an electric field of intensity „E‟ is given by F = E.q ………… (1) The resulting force F being in the direction of electric field. F in Newton‟s E in V/m q in coulombs. In order to calculate the path of a charged particle in an electric field, the force given by eqn (1) must be related to the mass and acceleration of the particle by Newton‟s second Law of motion. F = EQ = ma = m dt d ………… (2) Where m = mass, Kg a = acceleration, m/sec²  = Velocity, m/sec. The solution of above eqn. (2) subject to appropriate initial conditions gives the path of the particle resulting from the action of the electric forces. If the magnitude of the charge on the electron is „e‟, the force on an electron in the field is F = -eE The minus sign denotes that the force is in the direction opposite to the field.
  • 3.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 3 The eV unit of Energy: A unit of work or energy, called the electron volt (eV), is defined as follows: 1 eV = 1.60 x 10-19 Joules Potential: The amount of work done in moving a unit positive charge „Q‟ from infinity to the required point is called “Potential”. Electric potential is scalar quantity. The work done against the field in carrying a unit positive charge from the point x0 to the point „x‟ by definition is the potential „V‟. dw = -F. dl dw = -EQ. dl w = - Q  x x dlE 0 .  x x dlE Q w 0 .  x x dlEV 0 . Dividing w by Q gives the potential energy per unit charge. Relationship between field intensity and potential: By definition, V = -  x x dlE 0 . = - E (x – x0) E = d V xx V     0 In general, the field intensity may vary with the distance, the correct eqn. is dx dv Ex  The Minus sign shows that the electric field is directed from the region of higher potential to the region of Lower Potential. Constant Electric Field: Suppose that an electron is situated between the two plates of a parallel – plate capacitor as shown in fig. below. And the distance b/w the plate is small compared with the dimensions of the plates. A difference of potential is applied between the two plates then the direction of electric field is shown in fig. below Y d E 0 X + - Z Fig. The one – dimensional electric field b/w the plates of a parallel plate capacitor
  • 4.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 4 If the distance b/w the plates is small compared with the dimensions of the plates, the electric field may be considered to be uniform, and the lines of force pointing along the negative x – direction. i.e., the only field that is present is along the x direction. To know the motion of electron between plates having initial velocity  ox along the electric field E and the initial position of the electron is „x0‟ along the x-axis. Since there is no force along the y or z directions the particle will not move along these directions. i.e., the only possible motion is one – dimensional and the electron moves along the x-direction. By applying the Newton‟s Law to the x-direction. F = max eE = max ax = m eE ……… (1) Where E is the magnitude of electric field. From the above eqn. we came to know that the electron will move with a constant acceleration in a uniform electric field. The velocity and displacement can be calculated by the below expressions.  x =  0x + ax.t x = x0 +  0xt+ 2 1 axt² Provided that ax = const. independent of time. Problem 1: An electron starts at rest on one plate of a plane – parallel capacitor whose plates are 5 cm apart. The applied voltage is zero at the instant the electron is released, and it increases linearly from zero to 10V in 0.1 µ sec. a) If the opposite plate is positive, what speed will the electron attain in 50 n sec ? b) Where will it be at the end of this time? c) With what speed will the electron strike the positive plate. V10v (0.1 µsec, 10V) d=5cm a) (0,0) 0.1µsec - + y = mx v =  t v= sec1.0 10 µ t E = d v v= 7 10 10  t E = 27 10510 10   t E = 2  10+9 t E = 2  109 t v/m ax = dt d x f = max
  • 5.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 5 ax = m f  ax = m eE m f dt d x   f = eE ax = 19 9 31 .602 10 2 10 9.1 10 eE t m         ax = (1.76  1011 ) (2  109 t) ax = 3.52  1020 t m/sec² By integrating the above eqn. we obtain the speed.  t xx dta 0 .   t x dtt 0 20 1052.3 =3.52 x 1020 . 1 02 ²       t = ² 2 1052.3 20 t   x = 1.76 x 1020 t² At t = 50n sec. x = 1.76 x 1020 x [50 x 10-9 ]² = 1.76 x 25 x 10² x = 1.76 x 25 x 104 x = 4.40 x 105 m/sec b) Integration of x with respect to t, subject to the condition that x = 0 when t = 0 yields x =   tt x dttdt 0 20 0 ²1076.1 x = 1.76  1020  1 03 ³       t = 5.87  1019 t³ At t = 50 n sec x = 5.87  1019  [50  10-9 ]³ x = 5.87  1019  53  10-24 = 7.32  10-3 m x = 0.732 cm c) To find the speed with which the electron strikes the positive plate, we first find the time„t‟ it takes to reach that + plate.  t = 3 1 19 1087.5      x T = sec1046.9 1087.5 05.0 8 3 1 19       Hence x 1.76  1020 t² = 1.76  1020 (9.46  10-8 ]² = 1.58  106 m/sec
  • 6.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 6 Problem from previous external Question paper Problem 2 Two parallel plates of a capacitor are separated by 4 cms. An electron is at rest initially at the bottom plate. Voltage is applied b/w the plates, which increases linearly from 0v to 8v in 0.1m sec. If the Top plate is +ve, determine. i) The speed of electron in 40n sec. ii) The distance traversed by the electron in 40 n sec. Solution: d = 4 cm = 4  10-2 m V = t t 43 10 8 101.0 8    E = tt t d V 6 624 102 10 2 1010 2      v/m i) a = m eE m F dt d   a = (1.76  1011 )  2  106 t a = 3.52  1017 t m/sec²  t dta 0 . = 3.52  1017  2 ²t  = 1.76  1017 t²  = 1.376  1017 (40  10-9 )²= 1.76  16  101  10-1 = 1.76 x 160 m/sec. ii)  t dtx 0  =   t t 0 217 1076.1 dt x = 1.76  1017 3 ³t = 5.87  1016 t³ = 5.87  1016 [ 40  10-9 ]3 m Motion of electron with zero initial velocity in an electric field: From Newton‟s second Law F = max ……… (1) F = -eEx ……… (2) ax = dt d x ……… (3) Substituting eqns. (2) or (3) in eqn. (1) - eEx = m. dt d x ……….. (4) By multiplying with „dx‟ both L.H.S & R.H.S -eEx dx = m dx dt d x .  -eExdx= m.d x.  x  x dt dx  Taking integration on both sides
  • 7.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 7    x x xx x x xx ddE m e 00   x x xx dV m e 0 .    x x xx VdE 0  x x x V m e 0 2 ²          ²² 2 1 0xxV m e   ……… (5) m eV xx 22 0   Where 0x is the initial velocity of the charged particle. If 00 x  x Then the above eqn. becomes as ² 2 1 V m e m eV2 ²  m eV2  The above eqn. is used to calculate the speed of electron, if the electron starts at rest. Transit time of an Electron: Consider that an electron starts with an initial velocity x0 from one plate of a parallel plate capacitor and strikes the second plate with a velocity of f m/s, Where f = Final velocity with which electron strikes the plate. Then m eV xf 22 0   Let t = time of transit from cathode to anode. t = speedaverage platesbetweenseparation Now d = distance traveled = separation of plates Average speed = 2 velocityfinalvelocityinitial  = 2 vox fv Therefore t = 2 vox fv d  => t = fv d oxv 2
  • 8.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 8 Two Dimensional Motion: Motion of electron with initial velocity in an electric field: Consider a parallel-plate capacitor with uniform electric field between the plates. If the electron enters the region between the two plates with an initial velocity x0 in the + x direction as shown in figure below. Fig. Two dimensional electronic motion in a uniform electric field. From the above fig. the electric field E is in the direction of –y axis. The motion of particle to be investigated, subject to the initial conditions. xx 0  at x = 0 y = 0 at y = 0 When t = 0 …….. (1) z = 0 at z =0 Z-axis Since there is no force in the z-direction, the acceleration in that direction is zero. X-axis Since there is no force in the x-direction, the velocity along the x-axis remains constant and equal to x0 i.e., x = x0 x = x0 t ………… (2) Y-axis A constant acceleration exists along the y-direction and the motion in the y-direction is given by tayy  y = 2 1 ayt² …………… (3) Where ay = m eEy ay = dm Vde . . ………. (4) This equation indicates that in the region between the plates the electron is accelerated upward, and the velocity y is varying from point to point. Where as the velocity component x remains unchanged in the passage of the electron between the plates.
  • 9.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 9 The path of the particle with respect to the point O can be determined from the eqns. (2) or (3) by eliminating„t‟. As y = 2 1 ayt² y = 2 1 ay 2 0       x x  tx x0 y = ². ²2 1 0 x a x y        ………… (5) x x t 0  The above eqn. shows that the particle moves in a parabolic path in the region between the plates. Problem 3: Find the speed of an electron after it has moved through a potential difference of 5000V. Soln. The speed of the electron. m eV2  19 31 2 1.6 10 5000 9.1 10         .sec/102.4 7 m Problem 4: A charged particle having mass equal to 1000 times of an electron and a charge same as that of an electron is accelerated through a potential difference of 1000V. Calculate the velocity attained by the charged particle. Soln. The mass of the charged particle = 1000 times the mass of an electron = 1000 x 9.1 x 10-31  m eV2  sec/10596.0 101.91000 1000106.12 6 31 19 m       Problem 5: Two plane parallel plates A and B are placed 3mm apart and potential of B is made 200V positive with respect to plate A. An electron starts from rest from plate A. Calculate a) The velocity of the electron on reaching plate B. b) Time taken by the electron to travel from plate A to plate B. Soln: a) The electron starts from rest at plate A, therefore the initial velocity is zero. The velocity of the electron on reaching plate B is  = 31 19 101.9 200106.122      m eV = 8.38106 m/sec b) Time taken by the electron to travel from plate A to plate B can be calculated from the average velocity of the electron in transit. The average velocity = 2 velocityfinalvelocityinitial  = 2 1038.80 6  =4.19106 m/sec  Time taken for travel is = 6 3 1019.4 103     timeaverage platesbetweenseparation = 0.7110-9 sec
  • 10.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 10 Problem 6: Two plane parallel plates A and B are placed 8mm apart and plate B is 300V more positive than plate A. The electron travels from plate A to plate B with an initial velocity of 1 x 106 m/sec. Calculate the time of travel. Soln. m eV initial 2 ²     31 19 26 101.9 300106.12 101      sec/1033.10 6 m The average velocity Vavg = 2 finalVinitialV  = sec/10665.5 2 1033.10101 6 66 m x    the time for travel = averageV platesbetweenseperation = sec104.1 10665.5 108 9 6 3      Special case of Two Dimensional Motion: y E + v0  x 0 - At t = 0, vox = v0 cos voy = vo sin No force in x-direction x = voxt = vo cost ………… (1) ay = - m qEy vy = vo sin + ayt ……….(2) y = vo sint + 2 1 ayt² ………… (3) Problem 7: An electron with a velocity of 3 x 105 m/s enters an electric field of 910 v/m making an angle of 60º with the direction. The x- direction of the electric field is in the –ve y-direction. The direction of the electric field is in the y-direction. Calculate the time required to reach its max, height.
  • 11.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 11 Soln. v0 = 3 x 105 m/s , E = 910 v/m,  = 60º vox = v0cos = 3 x 105 x cos 600 = 150 x 103 m/s voy = vo sin = 3 x 105 x sin60º = 259.807 x 103 m/s ay = m qEy constant  vy = v0sin + ayt y = v0 sint + 2 1 ayt² For max. height, dt dy = 0 t a dt dy y 2 2 + v0sin = 0 T = yy o y qE mv m qE v a v  sin 0 sinsin 00            => T = 1.625 x 10-9 S Electrostatic Deflection in a cathode Ray Tube: Fig: Electrostatic deflection in a cathode – ray Tube The configuration of the electro static deflection system in a CRT is shown in above figure. The electro static deflection system uses a pair of deflection plates as shown in fig. The hot cathode K emits electrons which are accelerated towards the anode by the potential Va. Those electrons which are not collected by the anode pass through the tiny anode hole and strike the end of the glass envelope. The glass envelope has been coated with a material that fluoresces when bom-barded by electrons. Thus the position where the electrons strike the screen are made visible to the eye. The displacement „D‟ of the electrons is determined by the potential Vd (assumed constant) applied between the deflecting plates as shown in fig. The velocity x0 with which the electrons emerge from the anode hole is given by x0 = m eVa2 ………… (1) Since No field is to exist in the region from the anode to the point O, the electrons will move with a constant velocity x0 in a straight – line path.
  • 12.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 12 In the region between the plates the electrons will move in the parabolic path given by the eqn. y =         ²2 1 0 x ya  . x²……… (2) Where ay = md eV m eE dy   ……….. (3) The path is a straight line from the point M at the edge of the plates to the point P¹ on the screen, since the region is field free. The straight line path in the region from the deflection plates to the screen is, of course, tangent to the parabola at the point M. the slope of the line at every point between M and P¹is given by tan = dx dy x =  From eqn. (2) y = 2 1 ². ²0 x a x y  Differentiating with respect to „x‟ on both sides gives. ² . ² 00 x y x y la x a dx dy    x  tan = ² . 0 x ya   ………. (4) From the geometry of the figure, the eqn. of the straight line MP1 is found to be At the point M , x1 = , y1 = 2 1 ay ² ² 0 x   At the point P¹, y2 = D and x2 = L + 2  (y2 – y1) = m (x2 – x1) y2 =     2 00 ²² ² 2 1 x aa x y x y  y2 = ² ² 2 1 ² ² ² 00 2 0 x y x y x y aa x a    y2 =        2² 2 0  x a x y  D = ²0 x ya   D = ²0 x yLa   ……….. (5) By substituting eqns. (3) in eqn. (5) we have D = m eV md LeV a d 2   D = a d dV LV 2  ……… (6) This result shows that the deflection on the screen of a cathode – ray tube is directly proportional to the deflecting voltage Vd applied between the plates.
  • 13.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 13  CRT may be used as a linear – voltage indicating device. The electrostatic – deflection sensitivity of a cathode – ray tube is defined as the deflection (in meters) on the screen per volt of deflecting voltage. Thus S = ad dv L V D 2   …….. (7) The above eqns. shows that the sensitivity is independent of the deflecting voltage Vd and the ration e/m. the sensitivity varies inversely with the accelerating potential Va. Typical measured values of sensitivity are 1.0 to 0.1 mm/v. Corresponding to a voltage requirement of 10 to 100V to give a deflection of 1 cm. Problem 8: In a CRT the deflection plates are 2 cm long and are spaced 0.5 cm apart. The screen is 20 cm away from the centre of the deflecting plates the final anode voltage is 800v. Calculate i) The velocity of the beam on emerging from the field and ii) The voltage that must be applied to the deflecting plates to have a displacement of 1 cm. Soln. Given Va = 800 V  = 2 cm d = 0.5 cm L = 20 cm D = 1 cm i) The velocity of the beam m eVa2  31 19 101.9 800106.12      6 16.8 10 / secm   ii) The deflection of the beam D = a d Vd LV 2  1  10-2 = 800105.02 1020102 2 22     dV => Vd = 20V. Problem 9: An electrostatic CRT has a final anode voltage of 600v. the deflection plates are 1.5 cm long and 0.8cm apart. The screen is at a distance of 20cm from the centre of plates. A voltage of 20V is applied to the deflection plates. Calculate i) Velocity of electron on reaching the field. ii) Acceleration due to deflection field. iii) deflection produced on the screen in cm. and iv) deflection sensitivity in cm/v. Soln. Given Va = 600V  = 3.5 cm d = 0.8 cm L = 20 cm Vd = 20V i) The velocity of electron m eVa2  = 14.5x106 m/sec ii) ma = eE a = 312 19 101.9108.0 600106.1 .      md eV m eE a = 43.95 x 1013 m/sec² iii) D = cm dV LV a d 45.1 2   iv) S = Vd D = 0.0725 cm/v.
  • 14.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 14 Force in a Magnetic Field: A Magnetic field can exert force only on a moving charge. If a conductor of Length „L‟ carrying a current of I, is situated in a magnetic field of intensity B. the force „fm‟ acting on this conductor is fm = BIL …….. (1) Where fm is in Newton B is in Webers / m² I is in Amperes and L is in meters The above equation assumes that the directions of I and B are perpendicular to each other. The direction of this force is perpendicular to the plane of I and B. If „N‟ electrons are contained in a Length „L‟ of conductor and If it takes an electron a time „T‟ sec to travel a distance of „L‟ meters in the conductor, then the total number of electrons passing through any cross section of wire in unit time is = N/T. ……. (2) Thus the total charge per second passing any point, which by definition, is the current in amperes, is I = T Ne …….. (3) The force in Newton‟s on a Length „L‟ m is fm = BIL = B. T Ne .L fm = BNe ……… (4) Since T L is the average, or drift speed  m/sec of the electrons. The force per electron is fm = e B ………. (5) Motion in a Magnetic field: Consider an electron to be placed in the region of the magnetic field. If the particle is at rest, the magnetic field can not exert any force i.e fm=0 and the particle remains at rest. The magnetic force acting on a charged particle in a uniform magnetic field is fm = e  x B fm = e  B. sin ……..(1) Where  is the angle between the direction of magnetic field and the direction of motion of particle. If the initial velocity of the particle is along the lines of the magnetic flux, there is no force acting on the particle. The magnetic force acting on a particle moving perpendicular to the direction of the magnetic flux density. Fig. Circular motion of an electron in a transverse magnetic field
  • 15.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 15 Consider an electron moving with a speed „ ‟ to enter a constant uniform magnetic field normally as shown in above fig. The direction of the current is opposite to that of the motion of electron. At every point in the magnetic field force acts on the electron and the resultant direction will be perpendicular to both magnetic field and the direction of motion of electron at that point. This type of force makes an electron to move in a circular path with uniform speed. As shown in figure, the direction of the magnetic force is always towards the centre of the circle. This force is same as the centripetal force which always tries to push the electron towards the centre of the circle. To find the radius of the circle   eB R m  ² …………… (2) From which R = eB m ………. (3) The radius of the path is directly proportional to the speed of the particle. The angular velocity of the electron in radians per second is W = m eB R   ……….. (4) The time in seconds for one complete revolution, called the period is T = eB m m eBW      2 ……….. (5) For an electron, this reduces to T = B x 11 1057.3  ………… (6) The period and the angular velocity are independent of speed Y or radius. This means that faster moving particles will traverse larger circles in the same time that a slower particle moves in its smaller circle. Special case of motion in a Magnetic field: Consider a charged particle enters into a uniform magnetic field. With an initial velocity 0 , not perpendicular to the magnetic field but makes an angle with the direction of the field, the electronic motion can easily be analyzed by resolving the velocity in two components. Y B 0 0 cos = 0 y θ O X  sin00 x Z The force is perpendicular to the B, So no force can be along y – direction. Hence the velocity in y- direction is constant and equal to y0
  • 16.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 16 i.e., y = y0 = constant The component y0 is responsible to produce the force as it is normal to the magnetic filed B. this gives a circular motion to an electron with radius       eB m x0 . The resultant path due to these two components of velocities is helical path called “helix”. Whose axis is parallel to the y-axis and displaced from it by the distance R along the z-axis. Fig. Helical path of an electron. The pitch of the helix is defined as the distance traveled along the direction of the magnetic field in one revolution. It is given by p = yo T T is the period of time for one revolution. P =       eB m2 yo . Problem 10: An electron has a velocity of 2 x 107 m/sec when it enters a magnetic field perpendicularly to the direction of flux. If flux density is 0.5m wb / m², find the radius of curvature of an electron path and time for one revolution. Soln:  = 2  107 m/sec, B = 0.5  10-3 wb/m² R = 319 7317 105.0106.1 1021010.9      eB m R = 0.2276 mt = 22.76 cm and T = eB m2 = 319 31 105.0106.1 101.92     T = 71.526  10-9 sec.
  • 17.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 17 Problem 11: An electron having initial velocity corresponding to 300V are projected perpendicularly into a uniform magnetic field of density 10-3 wb/m². Find the radius of the path and time for one revolution. If an electron is accelerated at an angle of 40º with the field, what is the new value of radius of path, time for one revolution and pitch of the helical path? Soln. Given V = 300V, B = 10-3 Wb/m² Initial velocity corresponding to V = 300V is 31 19 109 300106.122      m eV  = 1.0267  107 m/sec Case i) Electron is projected perpendicularly to field. R = 319 731 10106.1 100267.110107.9      eB m R = 0.0584 mt = 5.84 cm T = ns eB m 763.35 10106.1 10107.922 319 31        Case ii) 0 40 Vox = vsin = 1.0267 x 107 x sin40º = 6.6 x 106 m/sec. R = eB mvox = 319 631 10106.1 106.610107.9   xx xxx = 0.375 m = 3.755 cm T = m eB m 763.35 2   time period is not dependent on v or component of v. Problem from Previous External Question Paper Problem 12: When an electron is placed in a magnetic field with a period of rotation sec10 5.35 12  B T . So that the trajectory of an electron is a circle. a) What is the radius described by an electron placed in a magnetic field, perpendicular to its motion, when the accelerating potential is 900v and B = 0.01 wb/m². b) What is the time period of rotation? soln: Given T = sec10 5.35 12  B Given the trajectory of an electron is a circle i.e., electron is projected perpendicularly to field. a) V = 900v, B = 0.01 wb/m² 31 19 101.9 900106.122      m eV v sec/10778.11016.3 1.9 101096.12 714 212 mv    19 731 106.101.0 10778.1101.9      Be mv R = 3 10 6.1 778.11.9    R = 10.11 x 10-3 m R = 1.01 cm b) T = eB m2 01.0106.1 101.92 19 31       T T = 35.73 x 10-10 sec T = 3.573 ns
  • 18.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 18 Problem 13: An electron moving with a velocity of 107 m/sec. enters a uniform magnetic field at an angle of 30º with it calculate the magnetic flux density required in order that the radius of helical path is 2mt. Also calculate the time taken by the electron for on revolution and pitch of the helix. Soln. Given v = 107 m/sec  = 30º B =? R = 2m T =? P =? vox = v sin = 107 x sin30º = 0.5 x 107 m/sec. Now R = 19 731 106.12 105.0101.4      B Be mvox B = 1.4229 x 10-5 wb/m² T = sec105133.2 104229.1106.1 101.922 6 519 31         qB m P = voy T = vcos . T = 107 cos 30º x 2.5133 x 10-6 = 21.76 m Current Density: If „N‟ electrons are contained in a Length „L‟ of the conductor and if it takes an electron a time „T‟ sec to travel a distance of „L‟ meters in the conductor N-electrons ……..…………………………… A ..…………………………………… …………..….…………………… L Then the total number of electrons passing through any cross section of wire in unit time is T N …………… (1) Thus the total charge per second passing any point, which by definition is the current in amperes, is I = T Ne ……….. (2) The current density is defined as the current per unit area of the conducting medium. And it is denoted by the symbol „J‟.Assuming uniform current distribution. J = A I ……….. (3) Where J is in Amperes / m² A is the cross sectional Area of the conducting medium. By substituting eqn. (2) in eqn. (3) we get J = TA Ne ………. (4) But T = v L  J = LA Nev ………. (5) But LA is simply the volume containing the N electrons.  J = V Nev LA N n  is the electron concentration per cubic meter. Thus J = nev, J =  Where  =ne is the charge density in coulombs per cubic meter and v is in meter per second.
  • 19.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 19 Magnetic Deflection in a Cathode Ray Tube: The below fig. shows the magnetic deflection in a cathode – Ray Tube. Fig. Magnetic Deflection in CRT A Short coil furnishing a transverse field in a Limited region is employed as shown in figure.It is assumed that the magnetic field intensity „B‟ is uniform in the restricted region shown in fig. and is zero outside of this area. The magnetic field is taken as pointing out of the paper, and the beam is deflected upward. The electron moves in a straight line from the cathode to the boundary „O‟ of the magnetic field. In the region of uniform magnetic field the electron experiences a force of magnitude eBv, where v is the speed. fm = eBv ……… (1) This force is perpendicular to both, direction of motion and magnetic field. So the electron moves along the circular path. The path OM will be the arc of a circle whose center is at Q. The speed of the particles will remain constant and equal to v = vox = m eVa2 ……… (2) The angle  subtended by the arc OM at the centre is  = R lengtharc is by definition of radians measure if we assume a small angle of deflection then from above fig.  = R  ……….. (3) Where R = eB mv ……….. (4) If the straight line MP¹ is projected backward, will pass through the centre „1‟ of the region of the magnetic field. Then Tan  = L D D  L tan  L  ………… (5) Substituting eqns (3) and (4) in eqn. (5) We get D  L  = R L
  • 20.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 20 D = eB mv L D = mv eBL …………. (6) Substituting eqns. (2) in eqns (6) D = m eV m eBL a2 .  D = amv e 2 . BL  D = m e v LB a 2 .  ………. (7) The Deflection per unit magnetic field intensity D/B is given by m e v L B D a 2 .   is called the magnetic – deflection Sensitivity of the tube. m e v L S a 2   Which is independent of magnetic flux density „B‟ Problem 14: In a CRT, the distance of the screen from the centre of the magnetic field is 20cm. The deflecting magnetic field of flux density 1 10-4 wb/m² extends for a Length of 2cm along the Tube axis. The final anode voltage is 800v. Calculate the deflection of the spot. Soln. The deflection of the spot is D = m e v BL a 2  Given L = 20  10-2 m B = 10-4 wb/m²  = 2  10-2 m Va = 800 V.  D = 31 19242 101.92 106.1 800 102010102     D = 0.42 cm Problem 15: An electron beam, after being accelerated by a potential difference of 1500V, travels through a uniform magnetic field of density 1.5 m wb / m², the direction of the magnetic field being normal to the initial direction of the beam. If the width of the magnetic field traversed by the electron beam is 15mm, calculate. a) The radius of curvature of the beam while it is traveling through the magnetic field, and b) The angle through which the beam is deflected. Assume e/m is to be 1.76  10¹¹ C/kg.
  • 21.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 21 Soln. Given va = 1500V B = 1.5 m wb/ m² B = 1.5  10-3 wb / m²  = 15 mm = 15  10-3 m Q / m = 1.76  10¹¹ c/kg. Velocity of the electron is = vox = m eVa2 = 2.29 x 107 m/sec a) R = 311 7 105.11076.1 1029.2     Be mvox = 0.087 m = 87mm b) mv Bq ox.   radians 7 33 1029.2 105.11015      x 1.76 x 1011 = 0.1729 radians º9.9 Problem 16: It is found that an electron beam is deflected 8 degrees when it traverses a uniform magnetic field. 3cm wide, having a density of 0.6 m wb/m². Calculate a) The speed of the electrons and b) The force on each electron, the direction of beam is normal to that of the flux. Soln.  must be in radians  º180 8 º8     radians = 0.1396 rad cm3 B = 0.6  10-3 wb/m² a) mv qB  v = m qB = 1396.0101.9 106.0106.1103 31 3192     v = 22.65  106 m/sec b) fm = Bev = 0.6  10-3  1.6  10-19  22.65  106 = 2.174  10-15 Newtons
  • 22.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 22 Comparison between Deflection Methods The electrostatic deflection and the magnetic deflection methods can be compared on the following points. S.No Electrostatic deflection Magnetic Deflection 1. The deflection is achieved by applying voltage to the plates. The deflection is obtained by controlling the magnetic field by varying current through the coils. 2. The deflection is inversely proportional to the accelerating voltage va. The deflection is inversely proportional to the square root of the voltage va. 3. The deflection of the beam is smaller, for given va. The scheme gives wider beam deflection, for given va. 4. The sensitivity is given by adv L s 2   The sensitivity is given by m e v L s a . 2   5. The deflection is independent of the ratio e/m. The deflection is dependent on ratio e/m 6. For the given display area longer tubes are necessary. The shorter tubes can be built for the given display area. 7. For greater sensitivity if va is reduced, the brightness of the spot also reduces. Though Va is reduced, more brightness and resolution of spot can be achieved. 8. The scheme is used for the general purpose oscilloscopes. The scheme is preferred for the T.V and radar. Magnetic deflection uses coils resulting in Losses and also requires large currents for deflections. The electrostatic deflection uses plates and require very little power. The Accelerating potential can be increased to give brighter spot with small decrease in sensitivity for magnetic deflection than for electric deflection. Parallel Electric and Magnetic Fields: Consider the case where both electric and magnetic fields exist simultaneously, the fields being in the same or in opposite directions. If the initial velocity of the electron is either zero or directed along the fields. The Magnetic field exerts No Force on the electron and the resultant motion depends upon the electric field intensity „E‟. The electron will move in a direction parallel to the fields with a constant acceleration. If the fields are chosen as in fig. the complete motion of electron is specified by Y E B X Z Fig. Parallel electric and magnetic fields
  • 23.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 23 Vy = Voy - at Y = voyt - 2 1 at² Where a = m eE is the magnitude of acceleration. The Negative sign results from the fact that the direction of the acceleration of an electron is opposite to the direction of the electric field intensity E. Perpendicular Electric and Magnetic fields: y B E . X Z The directions of the fields are shown in fig. Let the magnetic field be directed along the y direction and the Electric field be directed along the –x direction. The force on an electron due to the electric field is directed along the +x axis. The force due to the magnetic field is always normal to B, and Lies in a plane parallel to the xz-plane. Thus there is no component of force along the y-direction, and the y component of acceleration is zero. Hence the motion along the y is given by fy = 0 vy = voy y = voyt Assuming that the electron starts at the origin. If the electron starting at rest at the origin, the initial magnetic force is zero. Since the velocity is zero. The electric force is directed along the + x axis, and the electron will be accelerated in this direction. As soon as the electron is in motion, the magnetic force will no longer be zero. And there will be a component of this force which will be proportional to the X component of velocity and will be direction along the +z – axis. The path will thus bend away from the x – direction toward the +z – direction. The electric and Magnetic forces interact with one another and the net force will finally make the electron to travel in a “Cycloidal” path. To determine the path of an electron, the force equations must be set up. The force due to the electric field E is eE along the +x direction. The force due to the magnetic field is found as follows: At any instant, the velocity is determined by the three components vx, vy and vz along the three co-ordinate axes. Since B is in the y-direction, no force will be exerted on the electron due to vy. Because of vx, the force is eBvx in the +z –direction. Similarly, the force due to vz is eBvz in the –x –direction. Hence, Newton‟s Law, when expressed in terms of the three components, gives. fig. Perpendicular electric and Magnetic fields
  • 24.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 24 fx = dt mdvx = eE – eBvz ………………… (1) fz = dt mdvz = eBvx Letting w = m eB , and u = B E The above eqn. (1) becomes as .z x wvwu dt dv  ……….. (2) dt dvz = wvx ………… (3) By differentiating eqn. (2) with respect to „t‟ we get dt dv w dt xdv z  ² ² = -w² vx 0² ² ²  x x vw dt vd ……….. (4) The above equation is a Linear differential equation, and the solution of the above equation is Vx = C1 cos wt + C2 sinwt By applying the initial conditions, i.e, vx = 0, vz = 0 at t = 0 we get 0 = C1  1 + C2  0  C1 = 0  vx = C2 sinwt Assuming C2 = u vx = u sin wt ………….. (5) By substituting eqn. (5) in eqn (1), we get m. dt d (u sin wt) = eE – eB. vz m  u sin wt. w = eE – eB vz eBvz = eE – muw. cos wt vz = eB uwm B E .  cos wt. vz = u – u. cos wt ……… (6) By integrating the eqn. (5)&(6) with respect to„t‟ we can obtain the co-ordinates x and z.  X = w wtu cos. + C1 …………… (7) Z = ut – u. 2 sin C w wt 
  • 25.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 25 By applying the initial conditions x = 0 = z at t = 0 we have 0 = 1C w u   C1 = w u w u wt w u x  cos X =  wt w u cos1 0 = 0 – 0 + C2  z = ut - wt w u sin. …….. (8) C2 = 0 If for convenience  = wt and Q = w u then x =  (1 – cos ) and …………. (9) z = ut - w u sin wt z = Q – Q sin  z = Q ( – sin  ) …………. (10) Cycloidal path: The above equations x = Q(1 – cos ) and z = Q ( – sin ) represents the parametric equations of a common cycloid. A common cycloid, defined as the path generated by a point on the circumference of a circle of radius Q which rolls along a straight line, the z-axis and is shown in fig. below. Fig. The cyloidal path of an electron in perpendicular electric and magnetic fields when the initial velocity is zero
  • 26.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 26 The co-ordinates of the point P are x and z (y = 0) represents the position of the electron at any time. The dark curve is the locus of the point P. The Angle  gives the number of radians through which the circle has rotated. From the diagram, it follows that x = Q – Q cos and z = Q – Q sin which are identical to the path eqns of a cyloidal. The physical interpretation of the symbols and then abbreviations is as follows: „w‟ represents the angular velocity of rotation of the rolling circle. „ ‟ represents the number of radians through which the circle has rotated. „Q‟ represents the radians of the rolling circle. u = wQ represents the velocity of translation of the center of rolling circle. Straight Line Path: As a special case of importance, consider that the electron is released perpendicular to both the electric and Magnetic fields so that vox = voy = 0 and voz ≠ 0. The electric force is eE along the +x direction and the magnetic force is eBvz along the –x direction.  The total force in x – direction is fx = eE – Bevoz If the net force on the electron is zero, then this condition is realized when eE = eBvoz or voz = u B E  It represents that velocity with which an electron may be injected into perpendicular electric and magnetic fields and suffer no deflection, the net force being zero. The velocity „u‟ is independent of the change and mass of the ions and moves along the z-axis in a straight line path with the same velocity voz. Problem 17: The magnetic flux density B = 0.02 wb/m² and electric field strength E = 105 v/m are uniform fields, perpendicular to each other. A pure source of an electron is placed in a field. Determine the minimum distance from the source at which an electron with 0V will again have 0V in its trajectory under the influence of combined electric and magnetic fields. Soln: Given, B = 0.02 wb / m² E = 105 v/m The initial velocity v0 = 0V The minimum distance from the source at which an electron with 0V will again have 0V in its trajectory under the influence of combined electric and magnetic fields is given by = 2 Q = 2 . w u Where „w‟ is the angular velocity of the rolling circle w = m eB „u‟ is the velocity of translation of the center of the rolling circle u = B E „Q‟ is the radius of the rolling circle. e = 1.602 x 10-19 C m = 9.1 x 10-31 kg
  • 27.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 27  W = 31 19 101.9 02.0106.1      m eB = 3.5174 x 109 rad/sec. U = 02.0 105  B E = 5 x 106 m/sec.  The minimum distance traveled by an electron in perpendicular electric and magnetic fields when the initial velocity is zero given by m w u 3 9 6 10932.8 105174.3 10522       Focusing: The convergent beam from accelerating electrode has a tendency to spread because of mutual repulsion between the electrons. Hence some focusing device is required to bring the beam to a sharp focus at the screen. Two methods of focusing most commonly used are i) Electro static focusing ii) Magneto static focusing Electro static focusing: Fig. Electrostatic Focusing system of a CRT The control grid and a set of anodes will form a electrostatic focusing system. The control grid is given a more negative potential (-200v) with respect to cathode (-30V). The pre accelerating anode and accelerating anode are kept at high potential (2kv to 10kv) compared to focus anode (300v to 500v).The electron gun shown in above figure contains two electrostatic focusing systems called electron lenses. The first lens comprises the cathode surface, the control electrode and the aperture of pre accelerating electrode. Due to this first electron lens, the electrons emitted from the cathode surface converges to a small area located in front of the cathode on the axis of the tube. This area is called cross over area. The second electron lens system is formed in the region between pre accelerating electrode, focus anode and accelerating anode. The final anode potential determines the velocity with which on electron in the beam travels to the screen on leaving the electron gun.
  • 28.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 28 Magnetic focusing: Magnetic focusing may be achieved either by permanent magnet or by passing current through a coil of wire, the axis of which coincides with the beam axis. The principle of magnetic focusing is illustrated in figure below. Fig. Focusing action of a short focusing coil The electron experiences a force from the magnetic field only if its motion is at angle to the lines of magnetic force. If the lines of motion and magnetic lines of force are parallel, the electron moves only by the attractive force of the anode. If the electron leaves the cathode at an angle to the axis of the system, a force is exerted on it by the magnetic field. The direction of this force is at right angle to both the directions of motion of electron and to the magnetic lines of force. This force causes the electron to move in a spiral path. Therefore all the electrons emerging from the cathode and magnetic focusing coil are brought to a corresponding point of screen. CATHODE RAY OSCILLOSCOPE The device, which allows, the amplitude of signals which are functions of time, to be displayed primarily as a function of time is called Cathode Ray Oscilloscope, commonly known as CRO. The CRO gives the visual representation of the time varying signals. The CRO basically operates on voltages, but it is possible to convert current, pressure, strain, acceleration and other physical quantities in to the voltage using transducers and obtain their visual representations on the CRO. The block diagram of CRO is shown in the figure below.
  • 29.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 29 CATHODE RAY TUBE (CRT) : The CRT is the heart of the CRO. The CRT generates the electron beam accelerates the beam, deflects the beam and also has a screen where beam becomes visible as a spot. A schematic diagram of CRT showing its structure and main components is shown in figure (2) below: Fig. Cathode Ray Tube The main parts of the CRT are 1. Electron gun 2. Deflection system 3. Flouroscent Screen 4. Glass Tube or Envelope. 5. Base. 6. 1. Electron Gun: It consists of an indirectly heated cathode, a control grid, a focusing anode and an accelerating anode. The electron gun generates a narrow accelerated beam of electrons which produces a spot of light when it strikes the beam. 2. Deflection System: The CRT has two sets of deflecting plates which are at right angles to each other in space. These plates are referred to as the vertical deflection and horizontal deflection plates. The electron beam comes under the influence of vertical and horizontal deflection plates before it strikes the screen. When no voltage is applied to the vertical deflection plates the electron beam produces a spot of light at the center of the screen. The electron beam is made to move up and down vertically by controlling the voltage on the vertical plates thereby producing spots of light on the screen. The electron beam is made to move horizontally from side to side at a uniform rate by applying a saw tooth wave, which varies linearly with time across the horizontal deflection plates. Since this voltage is used to sweep the electron beam across the screen, it is called a sweep voltage. 3. Fluorescent Screen: The screen is coated with a suitable fluorescent material depending on the required color of the spot. Some of the substances, which give characteristic fluorescent colors, are Zinc Orthosilicate: Green Calcium Tungstate: Blue Zinc Sulphide or Zinc CadmiumSulphate: White
  • 30.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 30 4. Glass Tube or Envelope: All the components of a CRT are enclosed in an evacuated glass tube called envelope. This allows the emitted electrons to move about freely from one end of the tube to the other end. 5. Base: The base is provided to the CRT through which the connections are made to the various parts. CRO Measurements: The various parameters which can be measured using CRO are voltage, current, period, frequency, phase, amplitude, peak-to-peak value, duty cycle etc. Voltage Measurement: To measure the amplitude uses the following steps: 1. Note down the selection in volts/division from the front panel selected for measurement. 2. Adjust shift control to adjust signal on screen so that it becomes easy to count number of divisions corresponding to peak-to-peak value of the signal. 3. Note down the peak-to-peak value in terms of the number of divisions on the screen. 4. Use the following relation to obtain peak to peak value in volts Vp-p= (Number of Divisions) *       Divisions Volts . 5. The amplitude (Peak value) then can be calculated as Vm= 2 V p-p 6. The RMS value of a sinusoidal signal can be obtained as Vrms = 2 mV Current Measurement: CRO is basically voltage-indicating device. Hence to measure the current, the current is passed through a known standard resistance. The voltage across a resistance is displayed on CRO and is measured. This measured voltage divided by the known resistance gives the value of unknown current. Thus I = R CROonVmeasured Period and Frequency Measurement: Note the time/division selected on the front panel. Then the period of the waveform can be obtained as T = (Number of Divisions occupied by one cycle) *       Division time = time period The frequency is the reciprocal of the period. f = T 1 Lissajous Figures: The Lissajous pattern method is the quickest method of measuring the frequency. The Patterns obtained by applying simultaneously two different sine waves to horizontal and vertical deflection plates are called Lissajous Figures or Lissajous Patterns. The shape of the Lissajous figures depends on: 1. Amplitude of two waves 2. Phase difference between two waves. 3. Ratio of frequencies of two waves. Consider two signals applied, having same amplitude and frequency having phase difference of φ between them. e1 = Emsinωt and e2 = Emsin(ωt + φ)
  • 31.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 31 The phase difference φ produces the various patterns, which vary from straight diagonal lines to the ellipse of different eccentricities. The shapes of Lissajous figures for various values of φ are shown in fig. below. Fig.. Lissajous Patterns for same frequency different phase shifts. Measurement of Phase Difference: Consider the Lissajous figure obtained on CRO with an unknown phase difference φ as shown in the figure below. The frequency and amplitude of two waves is same. The parameters x1, x2, or y1, y2 can be measured in the fig. The phase angle then can be obtained as, φ = sin-1 2 1 y y = sin-1 2 1 x x If the pattern obtained is as shown in the fig. below then the phase angle φ is given by,
  • 32.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 32 φ = 1800 – sin-1 2 1 y y Measurement of Frequency: To measure the unknown frequency, the signal with unknown frequency is applied to vertical deflection plates called fV. The signal applied to horizontal deflection plates is obtained from variable frequency oscillator of known frequency fH. Thus, fH = frequency of signal applied to horizontal plates which is know fV = frequency of signal applied to vertical plates which is unknown The ratio of two frequencies can be obtained as, genciesverticalofnumber gencieshorizontalofnumber f f H V tan tan  Fig. Measurement of Frequency
  • 33.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 33 UNIT I - Semiconductors SYLLABUS CONDUCTION IN SEMICONDUCTORS: Electrons and holes in an Intrinsic semiconductor, conductivity of a semiconductor, carrier concentrations in an intrinsic semiconductor, donor and acceptor impurities, charge densities in a semiconductor, Fermi level in a semiconductor having impurities, diffusion, carrier lifetime, the continuity equation, the hall effect. <, LECTURE PLAN S. No. Topics to be covered No. of Periods 1 Classification of Semiconductor materials and Review of semiconductor physics. 1 2 Mobility, Current density, Conductivity of a Semiconductor, Mass Action Law. 1 3 Electrons and holes in an Intrinsic semiconductor 2 4 carrier concentrations in an intrinsic semiconductor 1 5 donor and acceptor impurities, charge densities in a semiconductor 2 6 Fermi level in a semiconductor having impurities 1 7 Carrier lifetime, the continuity equation, the hall effect 1 TOTAL 9
  • 34.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 34 UNIT – II JUNCTION DIODE CHARACTERISTICS Introduction:  A very poor conductor of electricity is called an insulator. Eg: Wood, Glass, Diamond, Mica etc.  An excellent conductor is a metal. Eg: Copper, Alluminium etc.  A material whose conductivity lies between that of conductors and insulators is called semi – conductors. Eg : Germanium and Silicon. Structure of an Atom:  All the protons and neutrons are bound together at the center of an atom, which is called nucleus. While all the electrons are moving around the nucleus.  The electrons which are revolving around the nucleus do not move in the same orbit. The electrons are arranged in the different orbits or shells at fixed distances from the nucleus. In general, a shell can contain a maximum of „2n²” electrons where „n‟ is the number of the shell..  Each shell has energy level associated with it. Closer the shell to the nucleus, more tightly it is bound to the nucleus and possesses lower energy level.  The outermost shell is called the valence shell and the electrons in this shell are called valence electrons. The outermost shell in an atom cannot accommodate more than eight electrons (exception to the 2n² rule)  The valence electrons revolving in the outermost shell are said to be having highest energy level. The amount of energy required to extract the valence electron from the outer shell is very less.  An electron which is not subjected to the force of attraction of the nucleus is called a free electron. Such free electrons are basically responsible to the flow of current. More the number of free electrons better is the conductivity of the material. Energy Band Theory: A material can be placed into insulators, conductors and semi conductors depending upon its energy band structure. The energy band diagram consists of three bands. 1. Valence band 2. Conduction band 3. Forbidden band Valence Band: The valence electrons possess highest energy level. When such electrons form the covalent bands due to the coupling between valence electrons of adjacent atom, the energy band formed due to merging of energy levels associated with the valence electrons i.e., electrons in the last shell is called the valence band. Conduction Band: Valence electrons form the covalent bond and are not free, but when certain energy is imparted to them they become free. The energy band formed due to merging of energy levels associated with the free electrons is called conduction band. Under normal condition, the conduction band is empty
  • 35.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 35 and once energy is imparted the valence electrons jump from valence band to conduction band and become free. Forbidden Band: While jumping from valence band to conduction band the electrons have to cross an energy gap. The energy gap which is present separating the conduction band and the valence band is called forbidden band or forbidden gap. Insulators: Fig: The energy band diagram of an insulator The valence band is fully filled and conduction band is almost empty and forbidden gap is more approximately of about 7eV. For a diamond, the forbidden gap is about 6eV.Conduction is impossible in insulators even by applying additional energy.  The resistivity of insulators is of the order of 107 ohm-meter.  Examples of the insulators are Glass, Wood, Diamond, Mica etc. Conductors: The energy band diagram of conductors is shown in figure. In this the valence band and the conduction band are fully filled and there is no forbidden band. As a result the electrons in the valence band can easily move into the conduction band to make conduction easily. Fig: The energy band diagram of an conductor
  • 36.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 36  The resistivity of the conductors is of the order of 10-8 ohm-meter.  Examples of the conductors are: Copper, Aluminum etc. Semi Conductors: The energy band diagram of semiconductors is shown in figure below. Fig. Energy band diagram of Semi conductors In this the valence band is fully filled and conduction band is almost empty and forbidden band is very small, and is about 1eV. Semi conductors are material whose conductivity lies between conductors and insulators. The resistivity of semi conductors is of the order of 10-4 ohm-meter. The examples of the semiconductors are: Germanium & Silicon. The semiconductor acts as insulators at low temperature. As the temperature is increased, some of the valence electrons acquire thermal energy greater than EG to overcome the forbidden band and jump into the conduction band to make the conduction possible. Hence semiconductors have negative resistance temperature coefficient. At 0ºK, the forbidden gap for Germanium (Ge) is And for Silicon (Si) The forbidden gap EG depends on temperature. It has been determined experimentally that EG for Germanium (Ge) decreases with temperature at the rate of 2.23 x 10-4 eV/ºK Hence for Ge, Where T is in ºK. EG for Silicon (Si) decreases with temperature at the rate of 3.60 x 10-4 eV/ºK Hence for Si. EG(T) = 1.21 – 3.60 x 10-4 T At room temperature i.e., 300ºK. For Ge : EG = 0.72eV For Si : EG = 1.1eV EG = 0.785eV EG = 1.21eV EG(T) = 0.785 – 2.23 x 10-4 T
  • 37.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 37 Problem: 1 Calculate the value of forbidden gap for Si & Ge at the temperature of 35ºC. Soln. Forbidden gap for Si is given by EG = 1.21 – 3.6 x 10-4 T Given T = 35ºC T = 35 + 273 = 308ºK  EG = 1.21 – 3.6  10-4 (308)  EG = 1.099 eV Forbidden gap for Ge is given by EG = 0.785 – 2.23  10-4 T  EG = 0.785 – 2.23  10-4 (308)  EG = 0.7163eV. Classification of Semi conductor materials: Semi conductor materials are classified into two types. 1. Intrinsic Semiconductors 2. Extrinsic Semiconductors Intrinsic Semiconductors: A Pure form of semiconductor material is known as intrinsic semiconductor material. When there are four electrons in the outermost orbit, the semiconductor material is referred to as pure or intrinsic semiconductor. In pure semi conductor, the number of holes is equal to the number of free electrons. Even at the room temperature, some of valence electrons may acquire sufficient energy to enter the conduction band to form free electrons. Under the influence of electric field, these electrons constitute the electric current. The current due to the movement of free electrons in the conduction band is an electron current. A missing electron in the valence band leaves a vacant space there, which is known as a hole. Under the influence of electric field, the current due to the movement of holes in the valence band is a hole current. Therefore, the electron as well as hole current together constitutes the total current in an intrinsic semiconductor. Extrinsic Semiconductors: Doped semiconductor material is called extrinsic (impure) semiconductor. Doping: The process of adding small amount of impurities to the pure form of semiconductor in order to increase the conductivity of semiconductor is knows as „doping‟. Depending upon type of impurities, there are two types of extrinsic semiconductors. 1. N – Type 2. P – Type N-type Semiconductor: When a small amount of pentavalent impurity such as Arsenic, Antimony, phosphorous, Bismuth etc is added to pure form of semiconductor then the N-type semiconductor is formed. These pentavalent impurities are also called „donor impurities‟. Fig: Formation of covalent bonds in N-type semiconductor. One donor impurity atom donates one free electron in N-type material; therefore, free electrons are majority charge carriers in N-type semiconductors, while the holes are called minority charge carriers.
  • 38.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 38 P-type Semiconductors: When a small amount of trivalent impurity such as Boron, Aluminium, Indium, Gallium etc is added to pure form of semiconductor then the p-type semiconductor is formed. These trivalent impurities are also called „acceptor impurities‟. One acceptor impurity creates one hole in a p-type material, therefore, the holes are majority charge carriers and free electrons are minority charge carriers in p-type semiconductors. Fig: Formation of covalent Bonds in p-type semiconductor Mobility: Let us imagine a material which has many free electrons available throughout the material. If an electric field E v/m is applied to the material, the electrons will be accelerated and the velocity would increase. This velocity is called „drift velocity‟. The magnitude of the drift velocity „ ‟ is proportional to the Electric field „E‟. i.e., EE   or µ = E  Where „µ‟ is called mobility of electrons and has the units of sec ² V m Conductivity: If „N‟ electrons are contained in a length „L‟ of the conductor and if it takes an electron a time „T‟ sec to travel a distance of „L‟ meters in the conductor. Then the total number of electrons passing through any cross section of wire in unit time is T N ------------ (1) Thus the total charge per second passing any point, which by definition is the current in amperes, is I = T Ne ------------ (2) The current density is defined as the current per unit area of the conducting medium, and it is denoted by the symbol „J‟. Assuming uniform current distribution. J = A I ------------ (3) Where J is in A/m² A - is the cross sectional area of the conducting medium. By substituting eqn. (2) in eqn. (3) we get J = TA Ne ------------ (4) But T =  L  J = LA Ne ------------ (5) But LA is simply the volume containing the N electrons.
  • 39.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 39  J = V Ne ------------ (6) n = LA N is the electron concentration per cubic meter. Thus J = ne But  = µE  J = neµE A/m² -------------- (7) This is the general expression for current density in a given material. The current density is related to electric field E by the relation, J =  E --------------- (8) Where  = conductivity of the material in (  -m)-1 Comparing (7) and (8),  = neµ ---------- (9) (  -m)-1 This is the general expression for conductivity of the given material. The resistivity  is the reciprocal of the conductivity.   = resistivity =  1 (  -m) Conductivity of Intrinsic Semiconductor: In a semiconductor, there are two charged particles; one is negatively charged free electrons having the mobility µn while the other is positively charged holes having mobility µp. These particles move in opposite direction under the influence of electric field. But as both are of opposite sign they constitute current in the same direction. For the semiconductor, n = concentration of free electrons / m³ p = concentration of holes / m³ µn = mobility of electrons in m² / v-s µp = mobility of holes in m² / v-s Then the current density is given by J = Current density due to holes + Current density due to electrons Since the electron as well as the hole current together constitutes the total current in an intrinsic semiconductor.  J = Jp + Jn J = PeµpE + neµnE J = (pµp + nµn)eE A/m² Hence the conductivity of a semiconductor is given by  = (pµp + nµn) e (  -m)-1 For an intrinsic semiconductor the number of holes is equal to number of free electrons. i.e., n = p = ni = intrinsic concentration.  J = ni (µp + µn)eE A/m² And i = ni (µp + µn) e ( -m)-1 Where i is conductivity of an intrinsic semiconductor. Effect of Temperature on conductivity of an Intrinsic Semiconductor: The conductivity depends on the temperature. As the temperature increases more number of electron – hole pairs are generated. Hence the free electron concentration and hole concentration also increases. This tends to increase the value of intrinsic concentration ni. As ni increases, conductivity of intrinsic semiconductor also increases. The intrinsic concentration ni varies with temperature in accordance with the following relation. /2 3 0 GE o KT in A T e 
  • 40.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 40 Where A0 = constant, independent of temperature. T = Absolute temperature expressed in ºK. EG0 = Forbidden energy gap at 0ºK. K = Boltzman‟s constant expressed in eV/ºK = 8.620 x 10-5 eV/ºK. The intrinsic conductivity of Ge increases by approximately 5 percent per ºC and 7 percent per ºC rise in temperature for silicon. Properties of Germanium & Silicon Property Ge Si 1. Atomic number 32 14 2. Atomic weight 72.6 28.1 3. Atoms / cm³ 4.4 x 10²² 5.0 x 10²² 4. EGO, eV at 0ºK 0.785 1.21 5. EG, eV at 300ºK 0.72 1.1 6. ni at 300ºK/ cm³ 2.5 x 1013 1.5 x 1010 7. µn, cm²/v-sec 3,800 1,300 8. µp, cm² / v-sec 1,800 500 9. Intrinsic resistivity at 300ºk (  -cm) 45 230,000 Problem: 2 Find the resistivity of an intrinsic silicon at 300ºk if intrinsic concentration of silicon at 300ºk is 1.5  1010 per cm³ while µn = 1300 cm²/v-sec and µp = 500 cm² / v-sec. Assume e = 1.6 x 10-19 C. Soln. The given values are, ni = 1.5 x 1010 / cm³  ni = 10 6 1.5x10 10 /m³ = 1.5 x 1016 / m³ And µn = 1300 x 10-4 m² / v-sec µp = 500 x 10-4 m² / v-sec Now i = ni (µn + µp) e = 1.5 x 1016 [1300 + 500] x 10-4 x 1.6 x 10-19 = 0.000432 ( - m)-1  p = i 1 = 000432.0 1 = 2314.8148  -m Problem 3: Estimate the value of resistivity of intrinsic Germanium at 300ºk given: Intrinsic concentration = 2.5 x 1013 cm³ Electron mobility = 3800 cm²/v-s Hole mobility = 1800 cm² / v-s Electron charge = 1.6 x 10-19 C. Soln. Given values are Ni = 2.5 x 1013 / cm³  ni = 13 6 2.5x10 10 = 2.5 x 1019/m³ µn = 3800 cm²/v-s = 3800 x 10-4 m²/v-s µp = 1800 cm²/v-s = 1800 x 10-4 m²/v-s i (µn + µp) nie = (3800 + 1800) x 1.8 x 10-19 x 10-4 x 2.5 x 1019 = 2.24 ( -m)-1  i= 24.2 11  i = 0.4464  -cm
  • 41.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 41 Note: The concentration „n‟ of free electrons per cubic meter of a metal is given by n = AM d . Where d = density, kg/m³  = valence, free electrons per atom A = atomic weight M = weight of atom of unit atomic weight, kg Problem from external examination. Problem 4: Calculate the conductivity of copper having density 8.9 gm/cm³ and mobility 34.8 cm²/v-sec. Atomic weight of copper is 63.57 while it has 1 valence electron per atom. Assume M = 1.66 x 10-27 Kg. Soln. Given values are d = 8.9 gm/cm³ = 3 6 8.9x10 10   kg/m³  = 1 valence electron per atom A = 63.57 M = 1.66 x 10-27 kg And µ = 345.8 cm²/v-s = 34.8 x 10-4 m²/v-s The concentration of free electrons per cubic meter of a metal is given by n = AM d 3 30 6 27 8.9x10 x1 0.08433x10 10 x63.57x1.66x10 n       The conductivity of copper is  = n e µ  = 0.084 x 1030 x 1.6x10-19 x 34.8 x 10-4  = 4.69 x 1030 x 10-23  = 4.69 x 107 ( -m)-1 Fermi - Dirac function: In energy band diagram, the probability that the energy level is occupied by an electron is given by Fermi - Dirac probability function denoted as f(E). It is given by the expression, F (E) =   KTEE F e / 1 1   Where K = Boltzmann‟s constant in eV/ºK (8.62 x 10-5 eV/ºK) (or) 1.38x10-23 J/ºK T = Temperature in ºK E = Energy level occupied by an electron in eV. EF = Fermi level in eV. Fermi Level: The Fermi Level EF indicates the probability of occupancy of energy by an electron. In intrinsic semiconductor, at absolute temp. i.e., T = 0ºk, the probability of finding an electron in the conduction band is zero and the probability of finding a hole in the valence band is zero. Fermi level is defined as the energy states which has a 50% probability of being filled by an electron if no forbidden band exists. The EF for intrinsic semiconductor lie in the center of the forbidden band i.e., EF = 2 VC EE  EC = Lowest energy level in CB. EV = Highest energy level in VB. Carrier concentration in intrinsic semiconductor and Fermi Level: To calculate the conductivity of a semiconductor, the concentration of free electrons „n‟ and the concentration of free holes „p‟ must be known. For this purpose, the Fermi – Dirac statistics is applied. The number of conduction electrons per cubic meter whose energies lies between E and E + dE is given by dn = N (E) f (E) dE ………….. (1)
  • 42.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 42 Where N(E) is the density of states, given by N(E) =  E½ ………….(2), assuming the bottom of the conduction band is at zero potential. N (E)  no. of states per electron volt per cubic meter Where  = constant 3 4 h      2 3 2m (1.6 x 10-19)3/2 = 6.82 x 1027 The dimensions of  are (m-3 ) (eV)-3/2 M  mass of the electron in Kg h x  Planck‟s constant in Joule – sec f(E)  is the Fermi function given by f(E) = KTEE F e /)( 1 1   ………………………. (3) At room temperature KT  0.03 eV, so that f(E) = 0 if E – EF >> 0.03 and f(E) = 1 if E – EF << 0.03. The concentration of electrons in the conduction band is n =   CE dEEfEN )()( ………………… (4) In a semiconductor, the lowest energy in the conduction band is EC then N(E) =   2/1 CEE  ……………. (5) For E EC, E – EF >> KT and eqn. (3) reduces to KTEE F eEf /)( )(   …………….. (6)  Substituting eqns. (5) & (6) in eqn. (4), we get n =     KTEE E F C eEQE /2 1     dE     dEe KT EE KTn C FCC E KTEEEEC            /) 2 1 2 1 . =       dEe KT EE KT KTEEeKTEE E C FCC C /./ 2 1 2 1 .             =       E.. / 2 1 /2 1 de KT EE eKT KTEE E CKTEE C C FC             Put x KT EE C   or dx = KT dE  dE = KT dx When E = EC  x = 0 E =   x =           0 2 1 /2 1 ... dxKTexeKTn xKTEE FC  =        0 2 1 /2 3 .. dxexeKT xKTEE FC  =                 KTEE FC eKT /2 3 .   KTEE C FC eNn /  ……………… (7) Where NC =      .2 3 KT
  • 43.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 43 This expression is the concentration of electrons in conduction band. The concentration of holes in the valence band is P =     VE dEEfEN ………………….. (8) When the maximum energy in the valence band is EV, the density of states is given by N(E) =   2 1 EEV  …………………… (9) The Fermi function of a hole is [1 – f(E)] and is given by 1 – f(E) = 1 -   KTEE F e / 1 1   ………… (10) For E  EV, E – EF << KT eqn. (10) reduces to 1 – f(E) =   KTEE F e / …………….. (11)  Substituting eqns. (9) & (11) in eqn. (8) we get P =     dEEfEN VE  1  P =        VE KT V eEE /E-E2 1 F  dE =     dEe KT EE KT KTEEEE E V VFV V / 2 1 2 1 .            =       dEeKTe KT EE KT KTEEEE E V VFV V / 2 1 2 1 ./.            Let    dxKTdExKTEEx KT EE V V   When E = -   x =  E = EV  x = 0      dxKTexeKTp xKTEE FV    0 2 1 /2 1 .. =        0 2 1 /2 3 . dxexeKT xKTEE FV  =                 KTEE FV eKT /2 3   KT V eNP /E-E FV  ………………………….. (12) Where       2 3 KTNV Therefore eqn. (12) is the expression for the concentration of holes in valence band. Note: NC : Effective density of states in conduction band. NV : Effective density of states in valence band Fig. Band structure of Intrinsic semiconductor Fig. Fermi-Dirac prob. function f(E).
  • 44.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 44 The Fermi level in the center of the forbidden gap indicates equal concentration of free electrons and holes. Fermi level in Intrinsic Semiconductors: The concentration of electrons in conduction band is given by  /FCE E KT Cn N e   The concentration of holes in valence band is given by  /F VE E KT VP N e   In pure intrinsic semiconductor, n = p = ni    / /FC F VE E KT E E KT VCN e N e       ( )/ ( )/ FC FC E E KT E E KT N eC N eV       2V FCE E E KTC V N e N    KT EEE N N n FCV V C 2                 V CVC F N N n KTEE E  22 If effective masses of electron and hole are same then NC = NV 2 VC F EE E   This expression proves that the Fermi level lies in the center of the forbidden energy band. Mass – Action Law: Under thermal equilibrium, for any semiconductor the product of number of hole concentration and number of electron concentration is constant and is independent of the amount of donar and acceptor impurity doping i.e., 2 inp n Where n is the concentration of free electrons, p is the concentration of the holes and ni is the intrinsic concentration. The above relation is called Mass – Action Law. Intrinsic Concentration: The concentration of electrons in the conduction band of a semiconductor is given by  /FCE E KT Cn N e    ………………….(1) The concentration of holes in the valence band of a semiconductor is given by  /F VE E KT Vp N e     …………………(2) Taking the product of equations (1) & (2),  /VCE E KT VCnp N N e    /GE KT VCnp N N e   …………… (3) Where EG = EC – EV = Energy Gap According to the Mass – Action Law, 2 innp  …………….. (4) Hence,  /2 GE KT i VCn N N e   ………… (5) But       2 3 KTNN VC
  • 45.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 45 And   2 3 2 ³h 4 me         2 3 2 ³h 4 meKTNN VC   KTemeKTn GE i /.2 ³h 4 3 2 2           /2 3 0 GOE KT in A T e   Where A0 = a constant, independent of temperature. T = temperature in ºK EGO = Forbidden energy gap at 0ºk in eV. K = Boltzmann constant in (eV/ºK). Carrier concentration in Extrinsic Semiconductors: In extrinsic semiconductors, the electron and hole concentration are related by 1. Mass – action law 2. Law of electrical neutrality. Law of Electrical Neutrality: Let ND be the concentration of donar atoms is the positive charge per cubic meter contributed by the donar ions. Let NA be the concentration of acceptor atoms is the negative charge per cubic meter contributed by the acceptor ions. Let n and p be the concentrations of free electrons and holes respectively. A semiconductor is to be electrically neutral i.e., the magnitude of positive charge concentration is equal to the magnitude of negative charge concentration. nNpN AD  N-type: Let us consider an N-type semiconductor with no acceptor doping i.e., NA = 0. In such a material, the concentration of electron „n‟ is much greater than the concentration of holes „p‟. i.e., n >> p Dn Nn  From Mass – action law, nn pn = ni 2 D i n i n N n n n P 22   For N-type semiconductor, nn = ND 2 i n D n P N  P-type Let us consider an p-type semiconductor with no donar doping i.e., ND = 0. In such a material, the concentration of hole p is much greater than the concentration of electrons „n‟. i.e., p > > n AP Np  From Mass – action law, np pp = ni 2 A i p i p N n p n n 22   For p-type semiconductor, pP = NA A i p N n n 2 
  • 46.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 46 Conductivity of Extrinsic Semiconductor: N-type The conductivity of N-type material can be expressed as  eµpµn pnnnn  But Pn << nn, as holes are minority carriers. Hence eµn nnn  But for N-type, nn  ND eµN nDn   P-type The conductivity of P-type material can be expressed as  eµpµn ppnpp  But pp >> np, as electrons are minority carriers. Hence eµp ppp  But for P-type, pp  NA  eµN pAp  Problem5: Find the concentration (densities) of holes and electrons in N-type silicon at 300ºK, if the conductivity is 300 S/cm. Also find these values for P-type silicon. Given that for silicon at 300ºK, ni = 1.5 x 1010 / cm³, µn = 1300 cm² / v – s and µp = 500 cm²/v-s. Soln. a) Concentration in N-type silicon The conductivity of an N-type silicon is qnµn Concentration of electrons, n = nqµ     18 3 19 300 1.442 10 1.6 10 1300 n cm      Hence concentration of holes, p = n ni 2 P =   2 10 2 3 18 1.5 10 1.56 10 1.442 10 cm     b) Concentration in p-type silicon The conductivity of a p-type silicon is qpµp Hence, Concentration of holes, p = pqµ     18 3 19 300 3.75 10 1.6 10 500 p cm      Hence, concentration of electrons, n = p ni 2 n =   2 10 2 3 18 1.5 10 0.6 10 . 3.75 10 cm     From Previous external examination: Problem 6: Find the concentration of holes and electrons in a p-type silicon at 300ºK, assuming resistivity as 0.02  - cm. Assume µp = 475 m² / v-s, ni = 1.45 x 1010 / cm3 . Soln. Given  =0.02  - cm µp = 475 m²/v-s ni = 1.45 x 1010 / cm³ Conductivity of p-type silicon is 1    =   1 50 02.0 1   cm Concentration of holes, p = pµq   p = 475 106.1 50 19 x x 
  • 47.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 47 From Mass – action law, np = 2 in p n n i 2   n 1.4610-3  Concentration of electrons, n =1.4610-3 cm-3 Problem7: Determine the resistivity of germanium a) in intrinsic at 300ºK b) with donar impurity of 1 in 107 c) with acceptor impurity of 1 in 108 given that for Ge at room temperature, ni = 2.5 x 1013 cm-3, µn = 3800 cm²/v-sec, µp = 1800 cm² / v-sec and a number of Ge atoms / cm³ = 4.4 x 1022 Soln: a) Conductivity  pnii µµen   13 19 2.5 10 1.6 10 3800 1800i          1 /0224.0   cmi  Resistivity = .64.44 1 cm i   b) Number of Ge atoms / cm³ = 4.4  1022 ND = 22 7 4.4 10 10  =4.4  1015 cm-3 n  ND   = n e µn   = 4.4  1015  1.6  10-19  3800  = 2.675   1  cm Resistivity =  1 = 0.374  -cm c) NA = 4.4 1022 /108 = 4.4  1014 cm-3 P  NA   = P e µp   = 4.4  1014  1.6  10-19  1800   = 0.1267   1  cm Resistivity =  1 = 7.89  -cm Fermi Level in N-type semiconductor: In a N-type semiconductor, there is increase in the number of electrons in the conduction band due to donar impurity. As a result the Fermi level is raised closer to the conduction band. For N – type, n = ND. The concentration of electrons in conduction band is   KTEE C FC eNn /    KTEE CD FC eNN /    KTEEE D C FC N N /)  Taking natural logarithm on both sides, KT EE N N n FC D C          D C CF N N nKTEE 
  • 48.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 48 Fig. Position of Fermi-level in N-type semiconductor Fermi-Level in p-type semiconductor: In a p-type semiconductor, there is decrease in the number of electrons in the conduction band due to the acceptor impurity. As a result the Fermi-Level is lowered closer to the valence band and is shown in figure. For P-type, p = NA  The concentration of holes in valence band is   KTEE V VF eNP /    KTEE VA VF eNN /    KTEE A V VF e N N /  Taking natural logarithm on both sides, KT EE N N n VF A V          A V VF N N nKTEE  Fig. Position of Fermi-level in p-type semiconductor. Hall Effect: When a specimen (metal or semi conductor) carrying a current I is placed in a transverse magnetic field B, then an electric field E is induced in the direction perpendicular to both I and B. This Phenomenon is called “Hall Effect”. The Hall Effect may be used for (i) Whether a semiconductor is N-type or p-type (ii) Finding the carrier concentration. (iii) In calculating the mobility µ by measuring the conductivity .
  • 49.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 49 The figure shows a semiconductor bar carrying a current I in the positive x direction. Let a magnetic field B is applied in the +ve Z direction. Now a force is exerted on the charge carriers (whether electrons or holes) in the –ve Y direction. Due to this force, charge carriers are pressed downwards towards face 1. For example, in N-type specimen, the charge carriers are electrons which are accumulated on face 1. So face 1 becomes negatively charged w.r.t face 2 therefore a potential difference VH is developed between surfaces 1 and 2 which is called as „Hall voltage‟. The polarity of the Hall voltage enables us to determine experimentally whether the semiconductor is N- type or P-type. In equilibrium state, the electric field intensity E due to Hall effect must exert a force on the carrier which just balances the magnetic force i.e., eE = Be ………. (1) But E = d VH or VH = ED  VH = B d ……… (2) Where d = distance between face 1 and face 2 We known J =   wd I A wd I    ………….. (3) Where  = charge density W = width of the specimen From equations, (2) & (3) VH = B d wd I        = w BI  VH = w BI  ………… (4) The quantities VH, B, I and w can be measured for specimen. Therefore  can be measured. Hall coefficient is defined as RH = BI wVH   1 ………(5) But  =  µ …………. (6) If both  and RH are measured then µ can be measured by µ = HR …………. (7) This equation is derived by considering that all charge carriers move with mean drift velocity  . Considering a random thermal distribution in speed, the above eqn. (7) is modified as µ = HR. 3 8   …………(8) Importance of Hall Effect: The Hall Effect gives the following information. 1. It gives the information regarding semiconductor type (whether p-type or N-type) or regarding the sign of charge carriers (holes or electrons). 2. To measure semiconductor parameters like electron or hole concentration and mobility.
  • 50.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 50 3. It gives information whether the given material is metal, insulator or semiconductor. 4. It can be used to measure magnetic flux density. 5. It can be used to measure the power in an e.m. wave. Problem: An electric field of 200 v/m is applied to a sample of N-type semiconductor whose Hall coefficient is 0.0145 m²/C. Calculate the current density in the sample assuming µe = 0.36cm²/v-s. Soln. The Hall coefficient is given by RH = ne 1 or n = eRH .   n = 19 1 0.0145 1.6 10   = 4.310  1020 m-3 . The current density J is given by J = E = n e µeE = (4.31  1020 ) (1.6  10-19 ) (0.36) (200) = 4.965 x 10³  J = 4965 A/m³ Problem: A n-type silicon bar whose resistivity is 1000  m and width 1 cm is used in the Hall effect experiment. If the current in the bar is 10µA and the Hall voltage is 40mV, what is the intensity B of the applied magnetic field? Assume µn = 1300 cm²/v-s. Soln. µ = µn = 1300 cm²/v-s = 1300 x 10-4 m²/v-s w = 1cm = 1 x 10-2 m, I = 10µA, VH = 40mv and resistivity = 1000  - m We know, µ = BI WVH  ( µ =  RH) 3 2 4 6 1 40 10 1 10 1300 10 1000 10 10B              0.3077 / ²B wb m Drift and Diffusion Currents: The flow of current through a semiconductor material are of two types namely drift and diffusion. Drift current: When an electric field is applied across the semi conductor material, the charge carriers attain a certain drift velocity d , which is equal to the product of the mobility of the charge carriers and the applied electric field intensity, E. The holes move towards the negative terminal of the battery and electrons move to wards the positive terminal. This combined effect of movement of the charge carriers constitute a current known as the drift current. Thus “the drift current is defined as the flow of electric current due to the motion of the charge carriers under the influence of an external electric field”. The equation for the drift current density, Jn, due to free electrons is given by J q n nE A / cm²n  And the drift current density, Jp, due to holes is given by J q p p E A/ cm²p  Where n = no. of free electrons per cm³ p = no. of holes per cm³ µn = mobility of electrons in cm²/v-s µp = mobility of holes in cm²/v-s E = applied electric field intensity in V / cm q = charge of an electron = 1.6x10-19 C
  • 51.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 51 Diffusion current: It is possible for an electric current to flow in a semi conductor even in the absence of the applied voltage provided a concentration gradient exists in the material. A concentration gradient exists in the no. of either electrons or holes is greater in one region of a semi conductor as compared to the rest of the region. In a semiconductor material, the charge carriers have the tendency to move from the region of higher concentration to that of lower concentration of the same type of charge carriers. Thus, the movement of chare carriers takes place resulting in a current called “diffusion current”. The diffusion current depends on the material of the semiconductor, type of charge carriers and the concentration gradient. Diffusion current density due to holes, Jp, is given by J q D . A / cm²p p dp dx   Diffusion current density due to the free electrons, Jn, is given by dn J q Dn A / cm²n dx  Where dn/dx and dp/dx are the concentration gradients for electrons and holes respectively, in the x – direction and Dn and Dp are the diffusion coefficients expressed in cm²/sec for electrons and holes respectively. The dp/dx is negative (since p(x) decreases with increasing x) and the minus sign in the above equation is needed in order that Jp has a positive sign in the positive x-direction. Total current: The total current in semi conductor is the sum of drift current and the diffusion current. Therefore, for a p-type semiconductor, the total current per unit area, i.e., the total current density is given by J q p p E q Dpp dp µ dx   . Similarly, the total current for an n- type semiconductor is given by dn J q n n E q Dnn dx µ 
  • 52.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 52 Einstein relationship for semiconductor: There exists a definite relation ship between mobility and diffusion coefficient of a particular type of charge carrier in the same semiconductor. The higher the value of mobility of a charge carrier, the greater will be its tendency to diffuse. The equation which relates the mobility µ and the diffusion coefficient D is known as the Einstein relationship. The Einstein relationship is expressed as D Dn KTp V Tn qpµ µ    The importance of Einstein relationship is that it can be used to determine Dp(or Dn), if the mobility of holes(or electrons) is measured experimentally. For an intrinsic Silicon, Dp = 13 cm²/s and Dn = 34 cm²/s For an intrinsic Germanium, Dp = 47 cm²/s and Dn = 99 cm²/s Diffusion length (L): The average distance that an excess charge carrier can diffuse during its life time is called the diffusion length L, which is given by L D τ → a finite life time Where D is the diffusion coefficient that may be related to the drift mobility, µ, through the Einstein relation is KT D µ q  Generation and recombination of charges: In a pure semiconductor, the number of holes is equal to the number of free electrons. Due to thermal agitation, new electron-hole pairs are generated. Simultaneously, other hole – electron pair disappear as a result of recombination i.e, free electrons falling into empty covalent bonds. On an average, a hole exists for τp seconds known as the „mean life time of hole‟ and similarly an electron exists for τn seconds known as the „mean life time of electron‟. Carrier life time: The carrier life time is defined as the time for which, on an average, a charge carrier will exist before recombination with a carrier of opposite charge. Its value varies from nanoseconds to hundreds of microseconds and depends on temperature and impurity concentration in the semiconductor. Gold is extensively used as recombination agent by the manufacturer of semiconductor devices. Let the thermal equilibrium concentration of holes and electrons be PO and nO respectively Fig. The hole concentration in n-type semiconductor bar as a function of time due to carrier generation and recombination Assume that at t=t¹, the specimen is illuminated. Now the additional electron-hole pairs are generated uniformly through out the medium. This causes the concentration of holes and electrons to increase from PO and nO to new values p and respectively.
  • 53.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 53 The excess concentration of electrons is n - nO and excess concentration of holes is p - PO. Therefore p - PO = n - nO ……………………… (1) Now Increase in hole concentration per second due to thermal generation= g Decrease in hole concentration per second due to recombination = p p , where τp =mean life time of hole. The time rate of increase of hole concentration per second = dp/dt Thus dp g r dt   P pdp p o dt    ………………………. (2) Under steady state condition dp/dt = 0; the hole concentration P reaches the thermal equilibrium value PO i.e., P Po og 0 g p p      ………………….. (3) Therefore from (2) and (3), P pdp p o dt    ………………….. (4) Similarly for p-type semiconductor, n n ndn o dt    ………………….. (5) Continuity equation: The fundamental law governing the flow of charge is called the continuity equation. The carrier concentration in the body of a semiconductor is function of time and distance. Mathematically, a partial differential equation governs this functional relation between carrier concentration, time and distance. Such an equation is called “continuity equation”. The equation is based on the fact that charge can neither be created nor be destroyed. Consider an infinitesimal element of volume of area A and length dx as shown in fig. below Let p be the average hole concentration with in this volume. The current entering the volume at x is Ip and living at x+dx is Ip+dIp. This change in current is because of diffusion. Now, due to diffusion the concentration of charge carriers decreases exponentially with the distance. Hence, dIp = Number of coulombs per second decreased with in the volume. ……….. (1) Now if τp is mean life time of the hole, then p/τp = holes per second lost by recombination per unit volume.
  • 54.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 54 Due to the recombination, no. of coulombs per second decreased with in the given volume is, (Charge on hole) *(holes/sec per unit volume)*(volume) = qxp/ τp x(Adx) = q A dx p/ τp ………….. (2) While let „g‟ be the rate at which electron hole pair are generated by thermal generation per unit volume. Due to the generation, no. of coulombs per second increased within the volume is, (Charge on hole) x (rate of generation) x (volume) = q x g x (Adx) = q Adx g …………… (3) Thus the total change in the no. of coulombs per second is because of factors as indicated by equations(1), (2) & (3) The total change in the holes per unit per second is dp/dt. Hence total change in coulombs per second within the given volume = q dp/dt (volume) = q Adx dp/dt …………..(4) According to law of conservation of charges, dp q A dx q Adx q Adx g dI p P dt      dp P - g – dt p q A dx dI     ………………. (5) But I J dI AdJ A    Therefore P 1 dJ g p q dx dp dt      ……………… (6) The total current density J is due to drift and diffusion current Therefore dp J q Dp p q Epdx µ   ……………… (7) If the semiconductor is in thermal equilibrium and subjected to no external electric field then hole density will attain a constant value Po. Under this condition I = 0 i.e., J = 0 and dp/dt = 0 due to the equilibrium. Using in (6), P Po o0 g – 0 g p p       ………………. (8) The equation (8) indicates the thermal equilibrium i.e., the rate at which holes are thermally generated just equal to the rate at which holes are lost due to the recombination. Using (7) and (8) in (6), Pdp P 1o - p p d dP qD pq Ep pdt q dx dx                2 P-Pdp o + 2p d d pEPDp pdt dxdx      ……………… (9) This is called equation of conversation of charge or the continuity equation. The continuity equation for the holes in N-type material is    P P P EP ²Pn no nn nDp pt x² xp µ                  The continuity equation for the electrons in P-type material is
  • 55.
    Department of Electronicsand Communication Engineering UNIT-I -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 55    n n n En ²np po pp p Dn nt x² xn µ                    Special cases: (i) Concentration independent of distance and E=0.  P PdP n non dt p     t p P P K en no          where K =constant, τp is the mean life time and also time constant of the above equation. (ii) Concentration independent of time and E = 0  P EP nn 0 & 0p n µ t       Pn Pno d²Pn0 Dp dx²p     P Pd²P n non , But D Lp p pdx² Dp p      The solution of above equation is P P K e K en no 1 2 x L x Lp p    (iii) Concentration varies sinusoid ally with time and E=0.     jwt P x,t P x en n      P x,t d²P x,tn nj P x,t Dn p dx²p         jd²P p 2n 1 P But D Ln p p pdx² Dp p               jd²P pn 1 Pndx² L P           When ω=0 then solution is same as that in case (ii) When ω=0 then solution is obtain from dc solution by replacing Lp by Lp 1 j p .
  • 56.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 33 UNIT – II SEMICONDUCTOR DIODE CHARACTERISTICS SYLLABUS SEMICONDUCTOR DIODE CHARACTERISTICS: Qualitative theory of the p-n Junction, the p-n junction as a diode, band structure of an open circuited p-n junction, the current components in a p-n diode, quantitative theory of the p-n diode currents, the volt ampere characteristics, the temperature dependence of V-I characteristics, diode resistance, ideal versus practical diodes, diode equivalent circuits, space charge or transition capacitance CT, diffusion capacitance, breakdown mechanism in diode, Zener diode, V-I characteristics of Zener diode. <, LECTURE PLAN S. No. Topics to be covered No. of Periods 1 Qualitative theory of the p-n Junction, the p-n junction as a diode 1 2 Construction of PN Junction, Operation of PN Junction diode in Forward Bias and Reverse Bias 1 3 PN Junction Energy Band Diagram under open circuited, forward bias and reverse bias conditions. 1 4 Current components in PN Junction diode (Drift and Diffusion Currents) 2 5 Law of Junction and Diode Current Equation 2 6 V - I Characteristics of PN Diode, Temperature Dependence of V - I Characteristics, Simple Problems 2 7 Construction Types of PN Junctions, Transition capacitance in grown and alloy junctions 1 8 diffusion capacitance 1 9 breakdown mechanism in diode, Zener diode, V-I characteristics of Zener diode 1 TOTAL 12
  • 57.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 34 Qualitative Theory of PN- Junction: If donor impurities are introduced into one side and acceptors into the other side of a single crystal of a semiconductor, a pn-junction is formed. The donor ion is indicated schematically by a „+‟ sign because, after this impurity atoms donates an electron, it becomes a positive ion. The acceptor ion is indicated by a „-„sign because, after this atom accepts an electron, it becomes a negative ion. Initially, there are nominally only p-type carriers to the left of the junction and only n-type carriers to the right. Because there is a density gradient across the junction, holes will diffuse to the right across the junction, and electrons to the left. Due to diffusion some of the holes from the p-region enter the n-region, they find the number of donor atoms. The holes recombine with the donor atoms. As donor accepts additional holes, they become positively charged immobile ions. This happens immediately when holes across the junction hence number of positively charged immobile ions get formed near the junction on n-type. Atoms on p-side are acceptor atoms. The electrons diffusing from n-side to p-side recombine with the acceptor atoms on p-side. As acceptor atoms accept the additional electrons, they become negatively charged immobile ions. Such large numbers of negatively charged immobile ions get formed near the junction on p-side. The formation of immobile ions near the junction is shown in figure (a). The electric charges are confined to the neighborhood of the junction, and consist of immobile ions. The general shape of the charge distribution is illustrated in figure (b). Since the region of the junction is depleted of mobile charges, it is called the depletion transition region. The thickness of this region is the order of 10-4 cm (=10-6 m=1micron).
  • 58.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 35 Fig. A schematic diagram of a pn-junction including the charge density, electric field intensity, and potential energy barriers at the junction. Near the junction, on one side there are many positive charges and on other side there are many negative charges. According to coulomb‟s law, there exists a force between these opposite charges. And this force produces an electric field between the charges. This electric field is responsible to produce potential difference across the junction, which is called barrier potential. The electric field intensity in the neighboring of the junction is indicated in figure (c) , And this curve is the integral of the density function shown in fig (b). The electrostatic potential variation in the depletion region for holes is shown in figure (d) and is the negative integral of the function E of figure (c). This variation constitutes a potential energy barrier against the further diffusion of holes across the barrier. The potential energy barrier against the flow of electrons from the n-side across the junction is shown in figure (e). It is similar to that shown figure (d), except that it is inverted since the charge on electron is negative. Barrier potential: Barrier potential indicates the amount of voltage, to be allied across the pn-junction to restart the flow of electrons and holes across the junction. The barrier potential is also called junction potential or built in potential barrier or contact potential or diffusion potential.
  • 59.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 36 The barrier potential is expressed in volts. Its value is called height of the barrier. It is denoted as Vo or Vb. The magnitude of the barrier potential varies with doping levels and temperature. The potential barrier can be increased (or) decreased by applying an external voltage. The barrier potential is approximately 0.7V for silicon and 0.3V for germanium, at 25O C. The barrier potential of pn-junction mainly depends on the following factors 1) The type of semiconductor used. 2) The concentration of acceptor impurity on p-side. 3) The concentration of donor impurity on n-side. 4) The intrinsic concentration of basic semiconductor. 5) The temperature. Energy band structure of an open-circuited pn- junction: The energy band diagram for a pn-junction under open-circuit condition is shown in figure below. As pn-junction is formed by placing p and n-type materials in close physical contact at the junction on an atomic scale. Hence the energy band diagrams of these two regions undergo relative shift to make the Fermi level constant throughout the specimen at equilibrium. In the energy band diagram for a pn-junction shown in figure, the Fermi level EF is closer to the conduction band edge Ecn in the n-type material, and it is closer to the valence band edge Evp in the p-type material. The conduction band edge Ecp in the p –type material Ecn in the n-type material. Similarly, the valence band edge Evp in the p-type material is higher than the valence band edge Evn in the n-type material.
  • 60.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 37 Fig. Energy Band Structure of an open-circuited PN - Junction E1 and E2 in the figure indicate the shifts in the Fermi level from the intrinsic conditions in the p and n type materials respectively. Then the total shift in the energy level Eo is given by E E E Ec Ec Ev Evo p n p n1 2       ……………………………… (1) This energy Eo (in eV) is the pn-junction and is equal to qVo, where Vo is the contact potential (in volts) or the barrier potential. The contact potential: From figure, we have E GE Ev EpF 12    ……………… (2) and E GE E Ecn F 22    ……………… (3) Adding equations (2) & (3), we obtain    E E E E – E E E Evo cn pF F1 2 G      ………………. (4) From mass Action law, we have 2n n p i  –E /KT2 Gn N N evci   N NvcE KT ln G 2n i            ………………. (5) We know that for an n-type material E E KTcn Fn N ec         
  • 61.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 38 E E KTcn FN N e D c            n N D Q NcE - E KT lncn F N D           …………….. (6) Similarly for a p-type material E Ev KTpFP N ev          E Ev KTpFN N evA             P N A Q NvE Ev KT lnpF N A           ……………. (7) Substituting equations (5), (6) & (7) in equation (4) we get N NNcNv c vE KT ln KT ln – KT lno 2 Nn Di N A                         . . N NNcNv c vE KT lno 2 Nn Di N A            N DE KT lno 2n i N A            ..…………… (8) As Eo =qVo, therefore the barrier voltage Vo is given by NKT DV lno 2n i N A q           ……………. (9) An alternative expression for Eo may be obtained by substituting the equations of nn =ND, Pn= ni 2 /NA and PP = NA , np= ni 2 /NA in equation (8) P Npo noE KT ln KT lno P Nno po                Where the subscript „o‟ are added to the concentrations to indicate that these are obtained under conditions of thermal equilibrium. The PN-junction as a Diode: The essential electrical characteristic of a pn-junction is that it constitutes a diode which permits the easy flow of current in one direction but restrains the flow in opposite direction.
  • 62.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 39 Working of a Diode: In order to consider the working of a diode we shall consider the effect of forward bias and reverse bias across the pn-junction. Diode symbol: The diode symbol is shown in figure below. Anode Cathode The p-type and n-type regions are referred to as anode and cathode respectively. When the diode is forward biased, the arrow head shows the conventional direction of current flow i.e, the direction in which the hole flow takes place. 1) PN- junction with forward bias: When the positive terminal of the battery is connected to the p-type and the negative terminal to the n-type of the pn-unction diode, then the bias is said to be forward bias. A pn-junction with forward bias is shown in figure below: When the pn-junction is forward biased, as long as applied voltage is less than the barrier potential, there cannot be any conduction. When the applied voltage becomes more than the barrier potential, the negative terminal of the battery pushes the free electrons against barrier potential from n to p region. Similarly positive terminal pushes the holes from p to n region. Thus holes get repelled by the positive terminal and across the junction against the barrier potential, electrons gets repelled from the negative terminal and across the junction against the barrier potential. Thus the applied voltage overcomes the barrier potential. This reduces the width of the depletion region. As forward voltage is increased, at a particular value the depletion region becomes very much narrow such that large number of majority charge carriers can cross the junction and these majority carriers can travel around the closed circuit and constitute a current called forward current. The forward potential at which the potential barrier across the junction is completely eliminated and allows the current to flow through the junction is called cut-in voltage or threshold voltage of pn-junction diode. The cut-in voltage is 0.3v and 0.7v for germanium and silicon diodes respectively. 2) PN-junction with reverse bias: When the positive terminal of the battery is connected to the n-type and the negative terminal to the p-type of the pn-junction diode, then bias is said to reverse bias. A pn-junction with reverse bias is shown in figure below. When the pn-junction is reverse biased the negative terminal attracts the holes in the p- region, away from junction. The positive terminal attracts the free electrons in the n-region away from the junction No charge carriers is available to cross the junction. As electron and holes both
  • 63.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 40 move away from the junction, the depletion region widens. This creates more positive ions and hence more negative charge in the n-region. As depletion region widens, barrier potential across the junction also increases. The polarities of barrier potential are same as that of the applied voltage. Due to increased barrier potential, the positive side drags the electrons from p-region towards the electrons from p- region towards the positive of battery. Similarly negative side of the barrier potential drags the holes from n-region towards the negative of battery. The electrons on p-side and holes on n-side are minority charge carriers, which constitute the current in reverse biased condition. Thus reverse condition takes place. The reverse current flows due to minority charge carriers which are small in number. Hence reverse current is always very small. The generation of minority charge carriers depends on the temperature and not on the applied reverse bias voltage. Thus the reverse current depends on the temperature. i.e, thermal generation and not on the reverse voltage applied. For a constant temperature, the reverse current is almost constant through reverse voltage is increased upto a certain limit. Hence it is called reverse saturation current and denoted as Io. Reverse saturation current is very small of the order of few microamperes for germanium and few microamperes for silicon pn-junction diodes. The current components in a PN - diode: In a forward bias condition, holes get diffused into n-side from p-side while electrons get diffused into p-side from n-side. So on p-side, the current carried by electrons which is the diffusion current due to minority carriers decreases exponentially with respect to distance measured from the junction. This current due to electrons on p-side which are minority carriers is denoted as Inp. Similarly holes from p-side diffuse into n-side carry current which decreases exponentially with respect to distance measured from the junction. This current due to holes on n-side, which are minority carriers is denoted as Ipn. If distance is denoted by x, then Inp (x) = current due to electrons in p-side as a function of x, Ipn (x) = current due to holes in n-side as a function of x. At the junction i.e, at x=0, electrons crossing from n-side to p-side constitute a current Inp (o) in the same direction as holes crossing the junction from p-side to n-side constitute a current Ipn (o). Hence the current at the junction is the total conventional current I flowing through the circuit. I = Ipn (0) + Inp (0) But the entire circuit is a series circuit, the total current must be maintained at I independent of x. This indicates that on p-side there exists one more current component which is due to holes on p-side, which are majority carriers and it is denoted by Ipp (x). Inn(x) = current due to electrons in n-side. Therefore, On p-side, I = Ipp(x) + Inp(x) On n-side,I =Inn(x) +Ipn(x) These current components are plotted as a function of distance shows in figure below.
  • 64.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 41 Therefore sum of currents carried by electrons and holes at any point inside the diode is always constant, equal to total forward current I. The law of Junction: If the hole concentrations at the edges of the space-charge region are Pp and Pn in the p and n materials respectively, and if the barrier potential across this depletion layer is Vb, then V V B TP P ep n …………………. (1) This is Boltzmann relation of kinetic gas theory. For an open circuited pn-junction P P , P P & V Vp po n no oB    (Vo is the contact potential) Substituting the above values in eqn,(1),we get V /Vo TP P epo no …………………. (2) Consider a forward biased junction with an applied voltage V, then the barrier voltage Vb is decreased from its equilibrium value Vo by the amount V (or) Vb = Vo-V. The hole concentration throughout the p-region is constant and equal to the thermal equilibrium value (or) Pp = Ppo. The hole concentration varies with distance into the n-side. At the edge of depletion layer, x=0; Pn =Pn(o) The boltzmann relation is, for this case  0 Vo V /V TP P epo n         ………………….. (3) Combining equations (2) & (3), we get  0 V /V V V /Vo oT TP e P eno n          0 V/V TP P . en no  …………………… (4) This boundary condition is called the law of junction.
  • 65.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 42 Similarly the electron concentration on p-side,  0 V/V Tn n . ep po ………………. (5) The above equation (4) indicates that the hole concentration Pn(0) at the junction under forward biased condition is greater than its thermal equilibrium value Pno. Diode current Equation: From the law of junction, we have  0 V/V TP P . en no ..……………… (1) Where Pno = hole concentration at the edge of the space charge region in n-type material under open circuited condition. Pn(O) = hole concentration at the edge of the depletion region in n-type material under forward biased condition. The difference between two concentrations at the junction under biased and unbiased condition is called injected or excess concentration denoted as Pn(0).    P P Pn n no0 0  …………………. (2) Using eqn (1) in eqn (2),  0 V/V TP P . e Pn no no  0 V/V TP P e 1n no           …………………. (3) Similarly,  0 V/V Tn e 1p poN          …………………. (4) The hole current crossing the junction from p-side to n-side is given by,    AqD P 0p n I 0pn Lp  ……………… (5) Similarly, the electron current crossing the junction from n-side to p-side is given by,    AqD N 0n p I 0np Ln  ……………… (6)
  • 66.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 43 Where A = Area of cross-section of junction Dp= Diffusion constant for holes Dn = Diffusion constant for electrons Lp = Diffusion length for holes Ln= diffusion length for electrons Using (3) & (4) equations in equations (5) and (6), The total current I at the junction is given by,    I I 0 I 0pn np     A q D P 0 A q D N 0p n n p L Lp n      A q D P 0 A q D N 0 V/Vp n n p T. e 1 L Lp n                 V/V T. e 1I Io            …………………. (7) Where    A q D P 0 A q D N 0p n n p L Lp n Io   = reverse saturation current. The equation (7) is the required expression for diode current. In the above equation, it is derived without considering the carrier generation and recombination in the depletion region. If we consider the generation and recombination of carriers in the space charge region, the general equation of the diode current is approximately given by V/ V TI I e 1o         ………………………. (8) Where, I = diode current Io = diode reverse saturation current at room temperature. V = external voltage applied to the diode η = a constant, 1 for Ge and 2 for Si VT = kT/q = T/11600,volt equivalent of temperature, i.e, thermal voltage, where k = Boltzmann‟s constant q = charge of electron T = temperature of the diode junction. The Volt-Ampere characteristics of a Diode: The V-I characteristics of a diode in the forward biased and reverse biased condition is the graph of voltage across the diode against the diode current. Forward characteristics of a P-N junction Diode:
  • 67.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 44 When a forward bias voltage VF is applied to a P-N junction diode, below the cut-in voltage Vγ, the diode will not conduct and the current flowing is very small. Practically this current is assumed to be zero. The diodes will have a cut-in, offset, breakpoint (or) threshold voltage Vγ, below which the current is very small (say, less than 1% of maximum rated value). Beyond Vγ, the current rises very rapidly. Vγ is approximately o.2V for „Ge‟ and o.6V for „Si‟. As the forward biased voltage VF is greater than the cut-in voltage Vγ, the potential barrier across the junction is completely eliminated and the current rises very rapidly. The V-I characteristics under forward bias condition is shown in figure below. Reverse characteristics of a PN-junction diode: When a PN-junction diode is reverse biased, the negative terminal attracts the holes in the p-region away from the junction. The positive terminal attracts the free electrons in n-region away from the junction. No charge carrier is able to cross the junction. As electrons and holes both move away from the junction, the depletion region widens. As depletion region widens, barrier potential across the junction also increases. The polarities of barrier potential are same as that of the applied voltage. However a small reverse current called reverse saturation current Io flows across the junction due to the movement of minority charge carriers across the junction. Reverse saturation current is very small of the order of few micro-amperes for „Ge‟ and few nano-amperes for „Si‟ PN-junction diodes. The generation of minority charge carriers depends on the temperature and not on the applied across bias voltage. If the reverse bias voltage is increased beyond certain limit the junction breaks down and a very large reverse current flows. The V-I characteristics under reverse biased condition for a PN-junction diode is shown in figure.
  • 68.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 45 The complete V-I characteristics of a PN-diode (forward bias and Reverse bias) for both Ge and Si are shown in figure below: Temperature dependence of V-I characteristics of a Diode: i) Effect of temperature on Reverse Saturation Current: We know that  0 1 V A D P Vq p no TI epn Lp            0 1 V A D n Vq n po TI enp Ln              0 0I I Ipn np  1 V A D P A D n Vq p no q n po Te L Lp n               But 1 V VTI I eo          A D P A D nq p no q n po Io L Lp n   
  • 69.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 46 According to Mass-Action law, we know that 2niPn ND  and 2ninp NA  2A D A Dq p q n I no iL N L Np nD A            But 2 3 E KTGOn A Toi e   3D E KTDp n GOI A A T eo q o L N L Np nD A             1 E KTm GOI K T eo    (or) 1 V Vm TGOI K T eo    For Ge : η =1 , m=2 , VGO = 0.785 V For Si : η =2 , m=1.5 , VGO = 1.21 V 1 V Vm TGOI K T eo    ln ln 1 V Vm TGOI K T eo               ln ln ln ln1 V Vm TGOI K T eo                 ln ln ln1 VGOI K m To VT      ln 1 0 2 Vd I mo GO KdT T T q             KT VT q        Q 1 VdI mo GO I dT T TVo T     Where dIo Io is the fractional change in Io per degree rise in temperature. For Ge, substituting the values of various terms at room temperature we get,  ln 0.785 200 31 300 26 10 d Io dT       = 0.11 per O C This indicates that Io increases by 11% per degree rise in temperature. For Si, we get  lnd Io dT = 0.08 per O C This indicates that Io increases by 8% per degree rise in temperature. But experimentally it is found that the reverse saturation current Io increases by 7% per O C change in temperature for both Silicon and Germanium diodes. If at T O C, Io is 1μA then at (J+1) O C it becomes 1.07μA and so on. From this, it can be concluded that reverse saturation current approximately doubles i.e., 1.0710 for every 10 O C rise in temperature.
  • 70.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 47 Mathematically, 2 1 10102 22 1 1 T T T I I IO O O                    Where IO2 = Reverse Saturation current at T2 IO1 = Reverse Saturation current at T1 2) Effect of Temperature on Forward Voltage: The dependence of Io on temperature T is given by, 1 V Vm TGOI K T eo   …………………. (1) But 1 V VTI I eo           …………………. (2) For a forward current, V VTI I eo   …………….…… (3) (Neglecting 1) 1 V V V Vm TGO TI K T e e     g 1 V V Vm TGOI K T e          (or) 1 V V KTm GOI K T e         ….……………. (4) Now for constant diode current, 0 dI dT  hence differentiating equation (4) with respect to T, 1 .1 V V V V V KT V VdI dm mTGO GO GOK mT e T e dT dT KT                                 1 1 1 2 V VdV GOT V Vm GOdI T KTm dTK mT e dT K T                           1 2 V V GO m mmT T dVKT K e T V VGOT dTKT                         1 2 dVV V GO m KT T V VGOdI dTKT mK e T dT KT                               1 2 V V GO mdI T dVKT K e m KT T V VGOdT dTKT                       1 1 V V GO mdI T dVKT K e m V T V VT GOdT V dTT                       …………….….. (5)
  • 71.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 48 But 0 dI dT    0 dV m V T V VT GOdT       dV T V V m VTGOdT      V V m VdV TGO dT T     ………………. (6) This is required change in voltage necessary to keep diode current constant. Hence for Ge, at cut-in voltage V=Vγ=0.2v and with m=2, η=1, T=300O K and VGO = 0.785V in equation (6), we get  30.2 0.785 2 1 26 10 2.12 300 dV omV C dT         for Ge …………………. (7) The negative sign indicates that the voltage must be reduced at a rate of 2.12 mV per degree change in temperature to keep diode current constant. Similarly for Si, we get 2.3 dV omV C dT   for Si ………………. (8) Practically the value of dV dT is assumed to be 2.5 omV C for either Ge (or) Si at room temperature. Diode Resistance: i) Forward Resistance of a Diode: The resistance offered by the diode in forward biased condition is called Forward resistance. The forward resistance is defined in two ways. a) Static (or) DC Forward resistance (RF). b) Dynamic (or) AC Forward resistance (rf). a) Static Forward Resistance (RF): The static forward resistance RF is defined as the ration of the DC voltage applied across the PN-junction to the DC current flowing through the PN-junction. RF = Forward d.c. voltage / Forward d.c. current = OA/OC at point E. b) Dynamic (or) AC Forward resistance (rf): The resistance offered by the PN-junction under AC conditions is called dynamic resistance and is denoted by rf. The dynamic resistance is defined as the reciprocal of the slope of the V-I characteristics i.e., rf = dV/dI. The dynamic resistance is not a constant but depends upon the operating voltage. From the diode current equation, we have I=Io(eV/ηVT -1) Differentiating the above equation w.r.t. V, We get, 1 . 0 V VdI TI eo dV VT            
  • 72.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 49 V VTI edI o dV VT     I IdI o dV VT    For a forward bias, I>>Io and rf is given approximately by VdI Tr f dV I    VTr f I    The dynamic resistance varies inversely with current. At room temperature and for η=1, rf = 26/I, where I is in mA and rf is in ohms. For a forward current of 26mA, the dynamic resistance is 1Ω. From the figure, 1V r f II V      = 1/Slope of forward characteristics Generally the value of rf is very small of the order of few ohms in the operating region. Fig. Forward characteristics of a Diode. 2) Reverse Resistance of a Diode: The resistance offered by the diode in reverse biased condition is called Reverse resistance. The reverse resistance is defined in two ways: a) Static (or) DC Reverse resistance (RR). b) Dynamic (or) AC Reverse resistance (rr). a) Static Reverse resistance (RR): The static reverse resistance RR is defined as the ratio of applied reverse DC voltage to the reverse saturation current Io flowing through the PN-junction. RR = Applied Reverse DC Voltage / Reverse saturation current RR = OQ / OR at point P. b) Dynamic Reverse resistance (rr): The reverse dynamic resistance rr is defined as the ration of incremental change in the reverse voltage applied to the corresponding change in the reverse current.
  • 73.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 50 rr = VR IR   = Change in reverse voltage / change in reverse current Fig. Reverse characteristics of a Diode. Differences between Ideal diode & Practical diode: Ideal Diode: i) The cut-in voltage is zero. Since for an ideal diode there is no barrier potential, thus any small FB voltage causes conduction through the device. ii) The forward resistance (dynamic resistance) is zero. iii) The reverse resistance is zero. iv) The diode readily conducts when FB and it blocks conduction when reverse biased. The reverse saturation current Io is zero. v) The ideal diode acts as a fast-acting electronic switch. Practical Diode: i) There is a potential barrier across the junction, and this must be overcome before the diode can conduct. The cut-in (or) threshold voltage (or) offset (or) break- point voltage Vγ is approximately 0.2V for Ge & 0.6V for Si. ii) The forward resistance is in the range of few tens of ohms. iii) The reverse resistance is in the range of mega ohms. iv) The diode conducts when forward biased and the bias voltage is more than that of cut-in voltage. v) The diode does not conduct when reverse biased. However a small reverse saturation current flows across the junction in the range of nano-amps for Si diode and micro-amps for Ge diode. vi) The diode also acts a fast-acting switching electronic switch. Circuit model of a Diode: The circuit model of any device is represented by its equivalent circuit. A equivalent circuit is a combination of elements properly chosen to best represent the actual terminal characteristics of a device, system in a particular operating region. A diode is replaced by a model with a battery equal to cut-in voltage of a diode, the forward resistance of a diode in series with an ideal diode.
  • 74.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 51 The circuit model of a diode is shown in figure below: Vγ rf + - Forward resistance Ideal Diode Fig. Circuit model of a Diode. The above circuit model is also called as piecewise linear equivalent circuit. Assuming rf=0, since for most applications, it is small to be ignored compared with resistance of other elements of the network. Therefore, the simplified equivalent circuit is as shown in figure below. Vγ Ideal Diode Assuming Vγ=0 and rf=0,t he equivalent circuit becomes the circuit model for an ideal diode. Ideal Diode In forward biased condition, the ideal diode acts as short circuit. Ideal Diode Short circuit under Forward Bias In reverse biased condition, the ideal diode acts as open circuit. Ideal Diode Open circuit under Reverse Bias
  • 75.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 52 Diode equivalent circuits / models: Sl. No. Type Model Characteristics 1. Piece-wise linear model Vγ rf Vγ ≠0 rf ≠ 0 rr = ∞ ID VD 0 Vγ 2. Simplified model Vγ Vγ ≠0 rf =0 rr = ∞ ID VD 0 Vγ 3. Ideal model Vγ = 0 rf =0 rr = ∞ ID VD 0 Problems: Problems from previous externally question paper: 1) The resistivities of the two sides of a step-graded Si junction are 5Ω- cm (p – side) and 2.5 Ω- cm(n – side).Calculate the height of the potential barrier Vo. Take µp = 475 cm²/V – sec and µn=1500 cm²/V – sec at the room temperature of 300k and ni = 1.45x1010 atoms/ cm³. Solution: Given Resistivity of the p – region = 5Ω-cm Resistivity of the n – region = 2.5 Ω- cm µp = 475 cm²/V – sec µn = 1500cm²/V – sec ni = 1.45x1010 atoms/ cm³
  • 76.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 53 1 p q N qp p pA p µ µ     1 N A qp pµ  1 N A 195 1.6 10 475     NA = 2.6315 x 1015 / cm³ 1 n q N qn n nD n µ µ     1 N D qn nµ  1 N D 192.5 1.6 10 500     ND = 1.666 x 1015 / cm³ N NKT D AV lno 2q n i           302.6315 1.666 10 0.026ln 201.45 1.45 10              Vo =0.61V. 2) A silicon diode has a reverse saturation current of 7.12nA at room temperature of 27ºc.Calculate its forward current if it is forward biased with a voltage of 0.7v. Solution: The given values are Io = 7.12nA = 7.12 x 10-9 A V = 0.7V η =2 for Si , T = 27ºc = 27+273 = 300ºK Now VT =26mv, According to diode current equation, V/ VTI I e 1o         = 7.12 x 10-9 (e0.7/2 x 0.026 -1) = 7.12 x 10-9 (701894.59 -1) = 4.99 x 10-3 A I ≈ 5mA Thus the forward current is 5mA.
  • 77.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 54 Problem from previous external question paper: 3) A silicon diode has a saturation current of 1nA at 20ºc. Find its current when it is forward biased by 0.4v. Find the current in the same diode when the temperature rises to 110ºc. Solution: Given Ge diode => η =1 I01 =1nA =10-9 at T1 =20ºC =20+273 = 293ºK. V = 0.4V , VT = T1/11,600 =293/11,600 =0.0252V I =? V/ VTI I e 1o         I = 10-9 (e0.4/0.0252 – 1) If T2 = 110ºc then I =? I02 = (2T2 - T1/10 ) I01 I02 =29 x 10-9 = 512 x 10-9 A At T2 =110ºC =110+273 =383ºK, VT =383/11,600 =0.033V V/ VTI I e 1 02         = 512 x 10-9 (e0.4/0.033 -1) = 4) The diode current is 0.6mA when the applied voltage is 400mV and 20mA. When the applied voltage is 500mV. Determine η . Assume KT/q =25Mv. Solution: The diode current, V/ VTI I e 1o         0.6 x 10-3 = IO (e400/25η ) (» neglecting 1) Similarly, 20 x 10-3 = IO (e500/25η ) 320 10 30.6 10   = 20 I eo 16 I eo   100 3 = 4 e ln 100 3 = 4/η -> 3.507 = 4/η η =4/3.507 =1.14 .
  • 78.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 55 Problem from previous external question paper: 5) A pn–junction diode has a reverse saturation current of 30µA at a temperature of 125ºc.At the same temperature find the dynamic resistance for 0.2v bias in forward and reverse direction. Solution: Given IO = 30µA = 30 x 10-6 A T = 125ºC = 125+273 =398ºK V = 0.2V η = 1, VT = T1/11,600 = 398/11,600 =0.0343 V We have V/ VTI I e 1o         Neglecting „1‟, we get V/ VTI I e 1o         I1 dI o e rf dv V T V V T   1 rf  = rf = I1 dI o e rf dv V T V V T   r 1 r  = rr = 6) Calculate the dynamic forward and reverse resistance of pn – junction silicon diode when the applied voltage is 0.25v at T = 300ºk with given IO = 2µA. Solution: The dynamic resistance of diode is given by, V Tr V TI e V o             Now η =2 for Si, VT = 26m v for T =300ºK.
  • 79.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 56 For forward resistance use V =0.2V  32 x 26 x 10 r f 0.25 36 2 x 26 x 102 x 10 x e            = 212.337Ω For reverse resistance use V = 0.2V  32 x 26 x 10 rr 0.25 36 2 x 26 x 102 x 10 x e             = 3.1836MΩ 7) Find the value of dc resistance and ac resistance of a germanium junction diode at 25ºc with IO =25µA and at an applied voltage of 0.2v across the diode. Solution: The dc resistance is the ratio of diode voltage and current at a point on V – I characteristics. Given : Vf =0.2V, IO =25µA, η =1 for Ge diode V/ VTI I e 1o         Where VT =25+273/11,600 =0.025V  I = 25 x 10-6 [e0.2/(1 x 0.025) - 1] = 0.06013A Rf = dc resistance = Vf/I = 0.2/0.06013 =3.3259Ω and Rf =ac resistance = VT/ IO (eV/ηV T) = 0.025/25x10-6 x e(0.2/0.025 ) = 0.427Ω. 8) The voltage across a silicon diode at room temperature of 300ºk is 0.7v when 2ma current flows through it. If the voltage increases to 0.75v, calculate the diode current assuming VT = 26mv. Solution: V = 0.7V, η =2 for Si , VT = 26mV at 300ºK, I = 2mA Now V/ VTI I e 1o         2 x 10-3 = IO (e0.7/(2x26x10-3) - 1 ) Io =2.8494 x 10-9 A New voltage V = 0.75V, V/ VTI I e 1o         = 2.8497 x 10-9 [e0.75/(2x26x10-3) ] = 5.2313mA.
  • 80.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 57 PN- Junction construction types: Junction can be constructed by using different methods. The different construction types of PN – junction are: 1) Alloy or step- graded junction. 2) Grown or linearly- graded junction. 3) Diffused junction. Alloy or step graded junction: 1) The step graded junction is a junction in which there is an abrupt change from acceptor ions on one side to the donor ions on the other side. 2) Such a junction is formed by placing indium (trivalent) pallet against n-type Germanium wafer and heating this assembly to a high temperature for a short time. 3) As a result of this heating, some of the indium dissolves into the germanium to change the germanium from n-type to p-type at the junction. 4) Such a junction is called alloy junction or fused junction or step graded junction. Grown or linearly grade junction: If donor impurities are introduced into one side and acceptor impurities into the other side of a single crystal growing from a melt of Si (or) Ge, then grown- junction or linearly- graded junction is formed. Diffused junction: In diffusion process, a wafer of semi- conductor material (say p-type) is exposed to a gas of impurity (say n-type) material, then the atoms of the impurity material diffuse into the semiconductor material to form a diffused pn- junction. Diode capacitances or junction capacitances: In a semiconductor pn- junction, there are two types of capacitances. 1) Transition capacitance 2) Diffusion capacitance. Transition capacitance ( Tc ): 1) The transition capacitances come into play when the junction is under reverse biased condition. 2) The reverse bias in a pn- diode results in majority carriers moving away from the junction leaving only uncovered immobile ions. 3) Thus thickness of the space charge layer at the junction increases of reverse bias magnitude. 4) This depletion region along with concentration of uncovered immobile charges may be considered to constitute a capacitor whose incremental capacitance Tc is given by T dQ C dV 
  • 81.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 58 where dQ = increase in charge and dV=change in voltage Hence a voltage change dV in time dt will result in a current i given by, dQ i dt  T dV i C dt  This capacitance CT is referred to the space charge capacitance, transition capacitance, barrier capacitance or depletion capacitance. The expression for CT can be derived for step-graded and linearly-graded junctions Expression for CT for Step-graded Junction The figure shows the charge density as a function of distance from an alloy junction in which the acceptor impurity density is assumed to be much grater then the donor concentration. Since the net charge must be zero, then qN qNp nDA  ……………………. (1) If NA>>ND, then wp<< wn . For simplicity, we neglect wp and assume that the entire barrier potential VB appears across the uncovered donor ions. The relationship between potential and charge density is given by Poisson‟s equation, 2 2 d V P dx    2 2 DqNd V dx    …………………… (2) Where Є is the permittivity of the semiconductor.
  • 82.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 59 Integrating equation (2) w.r.t., x, we get 1 DqNdV x C dx     The electric flux line originates on the positive donor ions and terminates on the negative acceptor ions. Applying boundary conditions, At nx    , 0 dV E dx    . 1 qNDC    Substituting C1 value in above equation, dV dx =   qND x    ………………….. (3) On integrating equation (3), we get 2 22 qN xDV x C            Applying boundary conditions i.e., at V=0 & at x=0, C2=0 2 2 qN xDV x           At nx    , V=VB, the barrier height 2 2 2 qNDVB              2 . 2 qNDVB     …………………….. (5) Let A be the area of the junction. Then the total charge in the distance w of the depletion layer is t DQ qN A Hence the capacitance CT is given by t T D B B dQ d C qN A dV dV    ……………….. (6) Differentiating equation.(5) w.r.t., VB, we get 1 .2D B d qN A dV   B D d dV qN      Substituting this value in equation (6). We get T D D C qN A qN    A CT     ………………. (7) The transition capacitance CT given by equation(7) is exactly the same as the equation giving the capacitance of a parallel plate capacitor having plate area A, plate separation w, containing material of permittivity.
  • 83.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 60 Expression for CT in linearly-graded junction: Fig (i) Reverse biased linearly graded junction Fig (ii) Charge density versus distance curve Fig (iii) Electric field versus distance curve Fig (iv) potential versus distance curve For the grown junction the net charge density in depletion region varies linearly with distance and becomes to zero abruptly at the edges of distance as shown in the figure. The net charge density P= q k x Where kproportionality constant q Charge x distance , The relationship between potential and charge density is given by Poisson‟s equation 2 2 d V qKx dx    ……………………… (1) On integrating eqn.(1), we get 2 12 dV qKx C dx     At 2 x    , 0 dV E dc    Substituting the boundary conditions in the above equation we get 2 1 8 qK C    2 2 2 8 dV qK x dx           ………………… (2)
  • 84.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 61 On integrating eqn.(2) we get 3 2 26 8 qK x V x C           Using boundary condition at x=0,V=0 we get C2=0 3 2 6 8 qK x V x           ………………. (3) The total potential across the junction from 2   to 2   is given by 2 2 V V VB x x                    3 2 3 2 48 16 48 16 B qK qK V                         3 12 B qK V     ………………………. (4) Let A be the area of the junction, then the total charge on one side of the depletion layer is 1 . . . . . 2 2 2 Q A q Kt    3 8 t AqK Q    ………………….. (5) Hence the transition capacitance is given by dQtCT dV  .2 . 8 4 AqK d AqK d CT dV dV       ……… (6) From equation (4), 3 12 qK V    Differentiating above equation. With respect to „V‟, we get 21 .3 . 12 qK d dV    4 2 d dV qK      Substituting this in equation. (6) 4 24 AqK CT qK      A C T     Thus, we get the same expression for CT in case of both grown and alloy junction diodes.
  • 85.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 62 Diffusion Capacitance (CD): The diffusion capacitance exists across the junction when it is forward biased. The rate of change of injected charge with applied voltage is called as “diffusion capacitance” (or) Storage Capacitance. Expression for Diffusion Capacitance, (CD): For simplicity we assume that one side of the diode, say the P-material is so heavily doped in comparison with the n-side and the current across the junction entirely by holes moving from p- side to the n-side. i.e., I=Ipn (0). Therefore the charge  Q A Lp P 0e n …………………….. (1) By differentiating eqn.(1) w.r.t „V‟ , we get  dP 0dQ nA LpedV dV  ……………………… (2)  A P 0e n ( ) Dp I Ipn o Lp   Differentiating with respect to „V‟  A dP 0e nDdI p dV L dVp   dP 0n . Ae L dIp dV D dVp   ………………………(3) Substituting eqn.(3) in eqn.(2), dQ A Lp .e Ae L dIp dV D dVp   2LdQ . dIp dV D dVp   We know that dQ CDdV  2L . dIp CD D dVp   Where dI g dV  is the diode conductance 2L . p CD Dp g But 2Lp Dp p    Diffusion Capacitance .DC g We know that the Tran conductance T g dI I dV V   D I C V T    
  • 86.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 63 Limiting values or Specification parameters of a PN-junction: Data on specific semiconductor devices are normally provided by the manufacturer. The diode specification sheet includes: 1) The Forward Voltage, VF : It is the maximum forward voltage that can be applied across the junction. 2) The Maximum Forward Current, IF: It is the highest instantaneous current under forward bias condition that can flow through the junction. 3) The Reverse Saturation Current, I0: This is the small diode current in the reverse direction when reverse bias is applied. It is independent of the magnitude of the reverse bias. I0 is of the order of 1µA (1nA) for Ge (Si) diode. 4) Peak Inverse Voltage (PIV): It is the maximum reverse voltage that can be applied to the PN-junction. If the voltage across the junction exceeds PIV, under reverse bias condition, the junction gets damaged. 5) Maximum Power Dissipation: It is the maximum power that can be dissipated at the junction without damaging the junction. 6) Reverse Recovery Time (trr): It is defined as the time interval from the instant of current reversal from forward to reverse condition until the diode has recovered to a specified extent either in terms of the diode current (typically 1mA) or in terms of diode resistance(typically 400 k ). trr lies in 1ns to 1 s. 7) Capacitance Levels: The capacitance offered by the junction under forward bias and reverse bias conditions. 8) Operating Temperature Range: It is the range of temperature for which the PN-junction diode operates safely with out getting damaged. Its typical value is ranging from -65o C to +150o C. Breakdown Mechanisms in a diode: When the diode is reverse biased for a small reverse voltage, then the diode current is small and almost constant at I0. But when reverse voltage increases beyond certain value, large diode current flows, this is called breakdown of diode, and corresponding voltage is called reverse breakdown voltage of diode. There are two distinct mechanisms due to which the break down may occur in the diode, these are:  Avalanche breakdown  Zener break down Avalanche Breakdown: The avalanche breakdown occurs in lightly doped diodes. As the applied reverse biased voltage is increased, the velocity and hence the kinetic energy (KE=1/2 mv2 ) of thermally generated charge carriers increases. If such charge carriers collide against an electron involved in covalent bond. These collisions break its covalent bond and create new charge carriers. These secondary particles are also accelerated and participates in collision that generate new electron hole pairs. This phenomenon is known as “Avalanche Multiplication”.
  • 87.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 64 The multiplication factor due to the avalanche effect is given by 1 1 M n V VBD           Where M is carrier multiplication factor N is empirical constant, for n-type silicon n=4 and For p-type n=2 V is applied reverse voltage VBD is reverse breakdown voltage Due to this avalanche effect, the junction is said to be in breakdown and the current starts increasing rapidly. The diodes having reverse breakdown voltage greater than 6V shows the avalanche mechanism of breakdown. Zener Breakdown:  The zener breakdown occurs in heavily doped diodes.  For heavily doped diodes, the depletion region width is small.  Under reverse bias conditions, the electric field across the depletion layer is very intense. Breaking of covalent bonds due to intense electric field across the narrow depletion region and generating large number of electrons is called Zener effect.  These generated electrons constitute a very large current and the mechanism is called Zener breakdown.  The diodes having reverse breakdown voltage less than 5v shows the Zener mechanism of breakdown. Temperature dependence of break down voltages:  In heavily doped diodes the depletion region width is very small. The applied voltage produces an electric field which is very intense. In such a case, if temperature increases, valance electrons acquired high energy levels and it is easy for the applied voltage to pull such electrons from covalent bonds to make them free. Thus for small voltage, at higher temperature breakdown occurs.  Thus the break down voltage decreases as the temperature increases for zener breakdown. The zener breakdown has negative temperature coefficient.  In lightly doped diodes, the width of depletion region is large and the field intensity is low. The break down possibility is because of avalanche effect. In such a case if the temperature increases, the vibration of atoms in a crystal increases the intrinsic holes and electrons have less opportunity to impart sufficient energy between the collisions due to vibrations, to start the carrier multiplication. Thus voltage must be increased to cause the break down so at higher temperature, higher breakdown voltage is necessary.  Thus the breakdown voltage increases as the temperature increases for avalanche break down. The avalanche break down has positive temperature coefficient
  • 88.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 65 PN- Diode Applications: An ideal PN junction diode is a two terminal polarity sensitivity device that has zero resistance (diode conducts) when it is forward biased and infinite resistance (diode does not conduct) when reverse biased. Due to this characteristic the diode finds a number of applications as follows: 1) Rectifiers in DC power supplies. 2) Switch in digital logic circuits used in computers. 3) Clamping network used as dc restorer in TV receivers and voltage multipliers. 4) Clipping circuits used as wave shaping circuits used in computers, radars, radio and TV receivers. 5) Demodulation detector circuits and The same PN junction with different doping concentration finds special applications as follows: 1) Detectors in optical communication circuits. 2) Zener diodes in voltage regulators. 3) Varactor diodes in tuning sections of radio and TV receivers. 4) LED‟s in digital displays. 5) LASER Diodes in optical communications. 6) Tunnel diodes as a relaxation oscillator at microwave frequencies. Special Diodes: Zener Diode:  Zener diode is a heavily doped diode, and is designed with adequate power dissipation capabilities to operate in the reverse breakdown region.  The operation of the zener diode is same as that of ordinary PN diode under forward biased condition.  In reverse biased condition, the diode carries reverse saturation current, till the reverse voltage applied is less than the reverse breakdown voltage.  When the reverse voltage exceeds the reverse breakdown voltage, the current through it changes drastically but the voltage across it remains almost constant such a break down region is a normal operation region is a normal operating region for a zener diode.  The symbol of zener diode is shown in figure below:
  • 89.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 66  The dynamic resistance of a zener diode is defined as the reciprocal of the slope of the reverse characteristics in zener region. Vzrz Iz    = 1 / slope of reverse characteristics in zener region  The dynamic resistance is very small, it is of he order of few tens of ohms. Equivalent circuit of Zener diode: +  Vz - ` Zener Diode Practical equivalent Circuit Ideal equivalent circuit Applications of zener diode: The various applications of zener diode are,  As a voltage regulating element in voltage regulators.  In various protecting circuits.  In zener limiters i.e., clipping circuits which are used to clip off the unwanted portion of the voltage waveform.
  • 90.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 97 UNIT - III RECTIFIERS, FILTERS AND REGULATORS SYLLABUS: Half wave rectifier, ripple factor, full wave rectifier, Harmonic components in a rectifier circuit, Inductor filter, Capacitor filter, L- section filter, - section filter, Multiple L- section and Multiple section filter, and comparison of various filter circuits in terms of ripple factors, Simple circuit of a regulator using zener diode, Series and Shunt voltage regulators LECTURE PLAN S. No. Topic to be covered Periods required 1 Introduction to Rectifiers, Half-wave Rectifier and its analysis 2 2 Full-wave Rectifier(Center tapped & Bridge) and its analysis 2 3 Introduction to Filters, Analysis of Inductor Filters 2 4 Analysis of Capacitor Filters 2 5 L - Section Filter, Pi-Section Filter 2 6 Multiple L-Section and Multiple Pi- Section Filters 1 7 Comparison of various rectifiers and filter circuits in terms of ripple factors. 1 8 Regulator circuit using Zener diode 1 9 Series and shunt voltage regulators 1 Total 14
  • 91.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 98 Introduction: For the operation of most of the electronics devices and circuits, a d.c. source is required. So it is advantageous to convert domestic a.c. supply into d.c. voltages. The process of converting a.c. voltage into d.c. voltage is called as rectification.This is achieved with i) Step-down Transformer, ii) Rectifier, iii) Filter and iv) Voltage regulator circuits. These elements constitute d.c. regulated power supply shown in the figure below. Fig. Block diagram of Regulated D.C. Power Supply The block diagram of a regulated D.C. power supply consists of step-down transformer, rectifier, filter, voltage regulator and load. An ideal regulated power supply is an electronics circuit designed to provide a predetermined d.c. voltage Vo which is independent of the load current and variations in the input voltage ad temperature. If the output of a regulator circuit is a AC voltage then it is termed as voltage stabilizer, whereas if the output is a DC voltage then it is termed as voltage regulator. The elements of the regulated DC power supply are discussed as follows: TRANSFORMER: A transformer is a static device which transfers the energy from primary winding to secondary winding through the mutual induction principle, without changing the frequency. The transformer winding to which the supply source is connected is called the primary, while the winding connected to the load is called secondary. If N1,N2 are the number of turns of the primary and secondary of the transformer then 2 1 N N   is called the turns ratio of the transformer. The different types of the transformers are 1) Step-Up Transformer 2) Step-Down Transformer 3) Centre-tapped Transformer The voltage, current and impedance transformation ratios are related to the turns ratio of the transformer by the following expressions. Voltage transformation ratio : 2 2 1 1 V N V N 
  • 92.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 99 Current transformation ratio : 2 1 1 2 I N I N  Impedance transformation ratio : 2 2 1 L in Z N Z N        RECTIFIER: Any electrical device which offers a low resistance to the current in one direction but a high resistance to the current in the opposite direction is called rectifier. Such a device is capable of converting a sinusoidal input waveform, whose average value is zero, into a unidirectional waveform, with a non-zero average component. A rectifier is a device which converts a.c. voltage (bi-directional) to pulsating d.c. voltage (Uni-directional). Important characteristics of a Rectifier Circuit: 1. Load currents: They are two types of output current. They are average or d.c. current and RMS currents. i) Average or DC current: The average current of a periodic function is defined as the area of one cycle of the curve divided by the base. It is expressed mathematically as 2 0 1 ( ) 2dcI id t      ; where mI sini t ii) Effective (or) R.M.S. current: The effective (or) R.M.S. current squared of a periodic function of time is given by the area of one cycle of the curve which represents the square of the function divided by the base. It is expressed mathematically as 1 2 2 2 0 1 ( ) 2rmsI i d t              2. Load Voltages: There are two types of output voltages. They are average or D.C. voltage and R.M.S. voltage. i) Average or DC Voltage: The average voltage of a periodic function is defined as the areas of one cycle of the curve divided by the base. It is expressed mathematically as 2 0 1 ( ) 2dcV Vd t      ; Where m sinV V t (or) Ldc dc V I R  ii) Effective (or) R.M.S Voltage: The effective (or) R.M.S voltage squared of a periodic function of time is given by the area of one cycle of the curve which represents the square of the function divided by the base. 1 2 2 2 0 1 ( ) 2rmsV V d t               rms rms LV I R 
  • 93.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 100 3. Ripple Factor ( ) : It is defined as ration of R.M.S. value of a.c. component to the d.c. component in the output is known as “Ripple Factor”. ' rms dc V V   W her e 2 2' rms dcrmsV V V  2 1rms dc V V            4. Efficiency ( ) : It is the ratio of d.c output power to the a.c. input power. It signifies, how efficiently the rectifier circuit converts a.c. power into d.c. power. It is given by dc ac P P   5. Peak Inverse Voltage (PIV): It is defined as the maximum reverse voltage that a diode can withstand without destroying the junction. 6. Regulation: The variation of the d.c. output voltage as a function of d.c. load current is called regulation. The percentage regulation is defined as % Regulation = 100%no load full load full load V V V      For an ideal power supply, % Regulation is zero. Using one or more diodes in the circuit, following rectifier circuits can be designed. 1. Half - Wave Rectifier 2. Full – Wave Rectifier 3. Bridge Rectifier HALF-WAVE RECTIFIER: A Half – wave rectifier is one which converts a.c. voltage into a pulsating voltage using only one half cycle of the applied a.c. voltage. The basic half-wave diode rectifier circuit along with its input and output waveforms is shown in figure below.
  • 94.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 101 The half-wave rectifier circuit shown in above figure consists of a resistive load; a rectifying element i.e., p-n junction diode and the source of a.c. voltage, all connected is series. The a.c. voltage is applied to the rectifier circuit using step-down transformer. The input to the rectifier circuit, m sinV V t Where Vm is the peak value of secondary a.c. voltage Operation: For the positive half-cycle of input a.c. voltage, the diode D is forward biased and hence it conducts. Now a current flows in the circuit and there is a voltage drop across RL. The waveform of the diode current (or) load current is shown in figure. For the negative half-cycle of input, the diode D is reverse biased and hence it does not conduct. Now no current flows in the circuit i.e., i=0 and Vo=0. Thus for the negative half-cycle no power is delivered to the load. Analysis: In the analysis of a HWR, the following parameters are to be analyzed. i) DC output current ii) DC Output voltage iii) R.M.S. Current iv) R.M.S. voltage v) Rectifier Efficiency ( ) vi) Ripple factor ( ) vii) Regulation viii) Transformer Utilization Factor (TUF) ix) Peak Factor (P) Let a sinusoidal voltage Vi be applied to the input of the rectifier. Then m sinV V t Where Vm is the maximum value of the secondary voltage. Let the diode be idealized to piece-wise linear approximation with resistance Rf in the forward direction i.e., in the ON state and Rr (=∞) in the reverse direction i.e., in the OFF state. Now the current „i‟ in the diode (or) in the load resistance RL is given by mI sini t for 0 t   i=0 for 2t    where mI m Lf V R R  
  • 95.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 102 i) Average (or) DC Output Current (Iav or Idc): The average dc current Idc is given by dc I 2 0 1 ( ) 2 id t      m 2 0 sin ( ) 1 0 ( ) 2 I td t d t                   m 0 1 I ( cos ) 2 t           m 1 I ( 1 ( 1)) 2          mI  , = 0.318 mI Substituting the value of mI , we get   I Lf m dc R R V    If RL>>Rf then I m dc L V R  = 0.318 m L V R ii) Average (or) DC Output Voltage (Vav or Vdc): The average dc voltage is given by Ldc dcV I R  = mI LR   =  Lf m L R R V R    Lf m L dc R R V R V     If RL>>Rf then m dc V V   = 0.318 mI m dc V V    iii) R.M.S. Output Current (Irms): The value of the R.M.S. current is given by rmsI 2 1 2 2 0 1 ( ) 2 i d t               1 2 22 2 0 sin ( ) 1 0 ( ) 2 1I 2 .m t d t d t                     
  • 96.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 103 1 22 0 1 cos ( ) 2 I 2 m t d t                  1 22 0 I 1( ) sin 4 2 m t t                   1 2 2 sin0 I sin20 4 2 m                1 2 2I 4 m          mI 2  mI 2rmsI  (or)  2 Lf m rms R R VI   iv) R.M.S. Output Voltage (Vrms): R.M.S. voltage across the load is given by rms rms LV I R  =  2 Lf m L R R V R  = 2 1 f L m R R V          If RL >> Rf then 2 m rms V V  v) Rectifier efficiency ( ) : The rectifier efficiency is defined as the ration of d.c. output power to the a.c. input power i.e., dc ac P P   2 2 2 m L Ldcdc I R I RP        2 2 4rms m L Lf fac I I R R R RP       2 2 22 4 4m m L L L fL f dc ac R R R RR R P I P I               
  • 97.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 104 2 1 0.406 11 4 ff LL RR RR               % 40.6 1 f L R R     Theoretically the maximum value of rectifier efficiency of a half-wave rectifier is 40.6% when f L R R = 0. vi) Ripple Factor ( ) : The ripple factor  is given by 2 1rms dc I I           (or) 2 1rms dc V V           2 2 / / 1m m I I             = 2 1 2        = 1.21 1.21  vii) Regulation: The variation of d.c. output voltage as a function of d.c. load current is called regulation. The variation of Vdc with Idc for a half-wave rectifier is obtained as follows: mI /I m dc Lf V R R      But Ldc dcV I R  dc V m L Lf RV R R             1 fm Lf RV R R              dc f m RV I   dc dc f mV RV I   
  • 98.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 105 This result shows that Vdc equals mV  at no load and that the dc voltage decreases linearly with an increase in dc output current. The larger the magnitude of the diode forward resistance, the greater is this decrease for a given current change. viii) Transformer Utilization Factor (UTF): The d.c. power to be delivered to the load in a rectifier circuit decides the rating of the transformer used in the circuit. So, transformer utilization factor is defined as ( ) dc ac rated P TUF P   The factor which indicates how much is the utilization of the transformer in the circuit is called Transformer Utilization Factor (TUF). The a.c. power rating of transformer = Vrms Irms The secondary voltage is purely sinusoidal hence its rms value is 1 2 times maximum while the current is half sinusoidal hence its rms value is 1 2 of the maximum. ( )ac rated P mI 22 mV   mI 2 2 mV  The d.c. power delivered to the load 2 dc LI R m 2 I LR         ( ) dc ac rated P TUF P   m 2 I LR         m 2 2 ImV  2 2 2 2 2I I m m L L R R       mIm LV RQ = 0.287 TUF 0.287 The value of TUF is low which shows that in half-wave circuit, the transformer is not fully utilized. If the transformer rating is 1 KVA (1000VA) then the half-wave rectifier can deliver 1000 X 0.287 = 287 watts to resistance load. ix) Peak Inverse Voltage (PIV): It is defined as the maximum reverse voltage that a diode can withstand without destroying the junction. The peak inverse voltage across a diode is the peak of the negative half-cycle. For half-wave rectifier, PIV is Vm. x) Form factor (F):
  • 99.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 106 The Form Factor F is defined as F = rms value / average value Im/ 2 Im/ F   0.5Im 0.318Im 1.57F   xi) Peak Factor (P): The peak factor P is defined as P= Peak Value / rms value / 2 m m V V  = 2 P = 2 Disadvantages of Half-Wave Rectifier: 1. The ripple factor is high. 2. The efficiency is low. 3. The Transformer Utilization factor is low. Because of all these disadvantages, the half-wave rectifier circuit is normally not used as a power rectifier circuit. Problems from previous external question paper: 1. A diode whose internal resistance is 20Ω is to supply power to a 100Ω load from 110V(rms) source pf supply. Calculate (a) peak load current (b) the dc load current (c) the ac load current (d) the percentage regulation from no load to full load. Solution: Given a half-wave rectifier circuit Rf=20Ω, RL=100Ω Given an ac source with rms voltage of 110V, therefore the maximum amplitude of sinusoidal input is given by Vm = 2 Vrms = 2 x 110 = 155.56V. (a) Peak load current : Im Vm R R Lf   155.56 120 Im  = 1.29A (b) The dc load current : I Im dc   = 0.41A (c) The ac load current : I 2 Im rms  = 0.645A (d) Vno-load : Vm  = 155.56  = 49.51 V Vfull-load : Vm I R dc f  = 41.26 V % Regulation = 100 V V no load full load V full load      = 19.97%
  • 100.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 107 2. A diode has an internal resistance of 20Ω and 1000Ω load from 110V(rms) source pf supply. Calculate (a) the efficiency of rectification (b) the percentage regulation from no load to full load. Solution: Given a half-wave rectifier circuit Rf=20Ω, RL=1000Ω Given an ac source with rms voltage of 110V, therefore the maximum amplitude of sinusoidal input is given by Vm = 2 Vrms = 2 x 110 = 155.56V. (a) % Efficiency ( ) = 40.6 20 1 100  = 1.02 40.6 = 39.8%. (b) Peak load current : Im Vm R R Lf   = 155.56 1020 = 0.1525 A = 152.5 mA The dc load current : I Im dc   = 48.54 mA Vno-load = Vm  = 155.56  = 49.51 V Vfull-load= Vm I R dc f  = 49.51 – (48.54 x10-3 x 20) = 49.51 – 0.97 = 48.54 V % Regulation = 100 V V no load full load V full load      =   49.51 48.54 100 48.54 = 1.94 % 3. An a.c. supply of 230V is applied to a half-wave rectifier circuit through transformer of turns ration 5:1. Assume the diode is an ideal one. The load resistance is 300Ω. Find (a) dc output voltage (b) PIV (c) maximum, and (d) average values of power delivered to the load. Solution: (a) The transformer secondary voltage = 230/5 = 46V. Maximum value of secondary voltage, Vm = 2 x 46 = 65V. Therefore, dc output voltage, 65VmV dc     = 20.7 V (b) PIV of a diode : Vm = 65V (c) Maximum value of load current, Im Vm R L  = 65 300 = 0.217 A Therefore, maximum value of power delivered to the load, Pm = Im 2 x RL = (0.217)2 x 300 = 14.1W
  • 101.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 108 (d) The average value of load current, 20.7 I = 300 V dc dc R L  = 0.069A Therefore, average value of power delivered to the load, Pdc = Idc 2 x RL = (0.069)2 x 300 = 1.43W FULL – WAVE RECTIFIER A full-wave rectifier converts an ac voltage into a pulsating dc voltage using both half cycles of the applied ac voltage. In order to rectify both the half cycles of ac input, two diodes are used in this circuit. The diodes feed a common load RL with the help of a center-tap transformer. A center-tap transformer is the one which produces two sinusoidal waveforms of same magnitude and frequency but out of phase with respect to the ground in the secondary winding of the transformer. The full wave rectifier is shown in the figure below. Fig. Full-Wave Rectifier. The individual diode currents and the load current waveforms are shown in figure below: Fig. The input voltage, the individual diode currents and the load current waveforms.
  • 102.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 109 Operation: During positive half of the input signal, anode of diode D1 becomes positive and at the same time the anode of diode D2 becomes negative. Hence D1 conducts and D2 does not conduct. The load current flows through D1 and the voltage drop across RL will be equal to the input voltage. During the negative half cycle of the input, the anode of D1 becomes negative and the anode of D2 becomes positive. Hence, D1 does not conduct and D2 conducts. The load current flows through D2 and the voltage drop across RL will be equal to the input voltage. It is noted that the load current flows in the both the half cycles of ac voltage and in the same direction through the load resistance. Analysis: Let a sinusoidal voltage Vi be applied to the input of a rectifier. It is given by Vi=Vm sinωt The current i1 though D1 and load resistor RL is given by I sinm1 i t for 0 t   0 1 i  for 2t    Where Im Vm R R Lf   Similarly, the current i2 through diode D2 and load resistor RL is given by 2 0i  for 0 t   I sinm2 i t for 2t    Therefore, the total current flowing through RL is the sum of the two currents i1 and i2. i.e., iL = i1 + i2. i) Average (or) DC Output Current (Iav or Idc): The average dc current Idc is given by dc I 1 2 0 1 ( ) 2 i d t      + 2 2 0 1 ( ) 2 i d t     m 2 m 0 sin ( ) 1 I sin ( ) 2 I 0 0td t td t                      mI  + mI  m2I  = 0.318 mI dc I m2I  Substituting the value of mI , we get   2 I Lf m dc R R V    This is double that of a Half-Wave Rectifier.
  • 103.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 110 ii) Average (or) DC Output Voltage (Vav or Vdc): The dc output voltage is given by Ldc dcV I R  = 2Im R L  2 V Rm LV dc R R Lf     If RL>>Rf then 2 m dc V V   iii) R.M.S. Output Current (Irms): The value of the R.M.S. current is given by rmsI 1 2 21 2 ( ) 2 0 i d t L           1 2 21 12 2( ) ( ) 1 22 20 i d t i d t                1 2 21 12 2 2 2sin . ( ) sin . ( ) 2 20 I t d t I t d t m m                  1 2 2 2I I 21 cos2 1 cos2 ( ) ( ) 2 2 2 20 t tm md t d t                               1 2 2 22I Isin 2 sin 2 4 40 t tm mt t t t                                       1 2 2 2I I ( 0) (0) (2 0) ( 0) 4 4 m m                      1 2 2 2I I 4 4 m m                1 2 2I 2 4 m            Im 2  Im 2 Irms  (or) 2 VmIrms R R Lf        
  • 104.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 111 iv) R.M.S. Output Voltage (Vrms): R.M.S. voltage across the load is given by rms rms LV I R  = 2 Vm R L R R Lf         2 1 VmVrms R f R L            If RL >> Rf then 2 VmVrms  v) Rectifier efficiency ( ) : The rectifier efficiency is defined as the ration of d.c. output power to the a.c. input power i.e., P dc Pac   242 2 I R LmP I R Ldc dc    2 2 2 I mP I R R R Rac L Lrms f f                 24 2 2 2 P I R Ldc m Pac I R R Lm f              8 2 R L R R L f             8 2 1 R f R L            0.812 1 R f R L    81.2 % 1 R f R L    Theoretically the maximum value of rectifier efficiency of a full-wave rectifier is 81.2% when f L R R = 0. Thus full-wave rectifier has efficiency twice that of half-wave rectifier.
  • 105.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 112 vi) Ripple Factor ( ) : The ripple factor,  is given by 2 1 Irms I dc             (or) 2 1 Vrms V dc             2 Im 1 2I2 m               = 2 1 2 2        = 0.48 0.48  vii) Regulation: The variation of Vdc with Idc for a full-wave rectifier is obtained as follows: V dc I R Ldc   2Im R L  2ImI dc        Q 2V Rm L R R L f          2 1 RV fm R R Lf              2Vm I R dc f   2VmV I R dc dc f    The percentage regulation of the Full-wave rectifier is given by % Regulation = 100 V V no load full load V full load      = 2 2 100 2 V Vm m I R dc f Vm I R dc f              = 100 I R dc f I R Ldc   % Regulation = 100 R f R L 
  • 106.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 113 viii) Transformer Utilization Factor (UTF): The average TUF in full-wave rectifying circuit is determined by considering the primary and secondary winding separately. There are two secondaries here. Each secondary is associated with one diode. This is just similar to secondary of half-wave rectifier. Each secondary has TUF as 0.287. TUF of primary = Pdc / Volt-Amp rating of primary  TUF P = 2 . Im . 2 2 I R Ldc Vm = 2 Im2 . Im 2 R L Vm        24I 2 . 2 2 Rm L I R Rm Lf          8 1 2 1 R f R L                    If RL >>Rf then (TUF)p = 8 2 = 0.812.  TUF av = Pdc / V-A rating of transformer =       3 TUF p TUF s TUF s  = 0.812 0.287 0.287 3   = 0.693  TUF = 0.693 ix) Peak Inverse Voltage (PIV): Peak Inverse Voltage is the maximum possible voltage across a diode when it is reverse biased. Consider that diode D1 is in the forward biased i.e., conducting and diode D2 is reverse biased i.e., non-conducting. In this case a voltage Vm is developed across the load resistor RL. Now the voltage across diode D2 is the sum of the voltages across load resistor RL and voltage across the lower half of transformer secondary Vm. Hence PIV of diode D2 = Vm + Vm = 2Vm. Similarly PIV of diode D1 is 2Vm. x) Form factor (F): The Form Factor F is defined as F = rms value / average value F = Im/ 2 2Im/ = 0.707Im 0.63Im = 1.12 F=1.12 xi) Peak Factor (P): The peak factor P is defined as P= Peak Value / rms value / 2 Im Im  = 2 = 1.414 P = 1.414
  • 107.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 114 Problems from previous External Question Paper: 4) A Full-Wave rectifier circuit is fed from a transformer having a center-tapped secondary winding. The rms voltage from wither end of secondary to center tap is 30V. if the diode forward resistance is 5Ω and that of the secondary is 10Ω for a load of 900Ω, Calculate: i) Power delivered to load, ii) % regulation at full-load, iii) Efficiency at full-load and iv) TUF of secondary. Solution: Given Vrms = 30V, Rf =5Ω, Rs=10Ω, RL=900Ω But 2 VmVrms  30 2Vm   = 42.426 V. Im Vm R R R LSf    = 30 2 5 10 900  = 46.36 mA. 2ImI dc   = 2 46.36   = 29.5mA i) Power delivered to the load = 2I R Ldc =   2 329.5 10 900  = 0.783W ii) % Regulation at full-load = 100 V V no load full load V full load      2VmV no load    = 2 42.426   = 27.02 V. V I R Lfull load dc   = 29.5 x 10-3 x 900 = 26.5 V % Regulation = 27.02 26.5 100 26.5   = 1.96 % iii) Efficiency of Rectification = 81.2 1 R R Sf R L   = 15 900 81.2 1 = 79.8% iv) TUF of secondary = DC power output / secondary ac rating Transformer secondary rating = Vrms Irms = 46.36 330 10 2   W P dc = 2I R Ldc TUF = 0.783 46.36 330 10 2   = 0.796
  • 108.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 115 5) A Full-wave rectifier circuit uses two silicon diodes with a forward resistance of 20Ω each. A dc voltmeter connected across the load of 1kΩ reads 55.4volts. Calculate i) IRMS, ii) Average voltage across each diode, iii) Ripple factor, and iv) Transformer secondary voltage rating. Solution: Given Rf =20Ω, RL=1kΩ, Vdc = 55.4V For a FWR 2VmV dc   55.4 2 Vm    = 86.9 V Im Vm R R Lf   =0.08519A i) I 2 Im rms  = 0.06024A ii) V= 86.9/2 = 43.45V iii) Ripple factor 2 1 Irms I dc            , =0.05423A I 2 Im rms  =0.06024A 0.48  iv) Transformer secondary voltage rating: Vrms 2 Vm 86.9 2  = 61.49 Volts. 6) A 230V, 60Hz voltage is applied to the primary of a 5:1 step down, center tapped transformer used in the Full-wave rectifier having a load of 900Ω. If the diode resistance and the secondary coil resistance together has a resistance of 100Ω. Determine: i) dc voltage across the load, ii) dc current flowing through the load, iii) dc power delivered to the load, and iv) ripple voltage and its frequency. Solution: Given Vp(rms) = 230V 2 1 N N 2 ( ) ( ) V S rms V P rms  1 5  2 ( ) 230 V S rms  ( ) V S rms  = 23V Given RL =900Ω, Rf + Rs =100Ω Im Vsm R R R LSf    = 2 ( ) V s rms R R R LSf   = 2 23 900 100   = 0.03252 Amp. 2ImI dc  
  • 109.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 116 2ImI dc    = 2 0.03252   = 0.0207 Amp. i) VDC = IDC RL = 0.0207 X 100 = 18.6365 Volts. ii) IDC = 0.0207 Amp. iii) P dc = 2I R Ldc (or) VDC IDC = 0.3857 Watts. iv) PIV = 2Vsm = 2 X 2 X 23 = 65.0538 Volts v) Ripple factor = 0.482 = ( ) V r rms V DC Therefore, ripple voltage = Vr(rms) = 0.482 x 18.6365 = 8.9827 Volts. Frequency of ripple = 2f = 2x60 = 120 Hz Bridge Rectifier The full-wave rectifier circuit requires a center tapped transformer where only one half of the total ac voltage of the transformer secondary winding is utilized to convert into dc output. The need of the center tapped transformer in a Full-wave rectifier is eliminated in the bridge rectifier. The bridge rectifier circuit has four diodes connected to form a bridge. The ac input voltage us applied to diagonally opposite ends of the bridge. The load resistance is connected between the other two ends of the bridge. The bridge rectifier circuits and its waveforms are shown in figure.
  • 110.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 117 Fig. and waveforms Operation: For the positive half cycle of the input ac voltage diodes D1 and D3 conduct, whereas diodes D2 and D4 do not conduct. The conducting diodes will be in series through the load resistance RL, so the load current flows through the RL. During the negative half cycle of the input ac voltage diodes D2 and D4 conduct, whereas diodes D1 and D3 do not conduct. The conducting diodes D2 and D4 will be in series through the load resistance RL and the current flows through the RL, in the same direction as in the previous half cycle. Thus a bidirectional wave is converted into a unidirectional wave. Analysis: The average values of output voltage and load current, the rms values of voltage and current, the ripple factor and rectifier efficiency are the same as for as center tapped full-wave rectifier. Hence, 2 mV V dc   2ImI dc   Im Vm R R Lf   m 2 V Vrms  m 2 I Irms  Since the each half cycle two diodes conduct simultaneously 0.48  81.2 2 1 R f R L    The transformer utilization factor (TUF) of primary and secondary will be the same as there is always through primary and secondary.
  • 111.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 118 TUF of secondary = Pdc / V-A rating of secondary 2I dc V Irms rms  2 2Im 2 2 R L V Im m                  = 0.812 TUF in case of secondary of primary of FWR is 0.812  TUF av     2 TUF p TUF s  0.812 0.812 2   = 0.812 TUF = 0.812 The reverse voltage appearing across the reverse biased diodes is 2Vm, but two diodes are sharing it, therefore the PIV rating of the diodes is Vm. Advantages of Bridge rectifier circuit: 1) No center-tapped transformer is required. 2) The TUF is considerably high. 3) PIV is reduced across the diode. Disadvantages of Bridge rectifier circuit: The only disadvantage of bridge rectifier is the use of four diodes as compared to two diodes for center-tapped FWR. This reduces the output voltage. Problems: 7. A bridge rectifier uses four identical diodes having forward resistance of 5Ω and the secondary voltage of 30V(rms). Determine the dc output voltage for IDC=200mA and the value of the ripple voltage. Solution: Vs(rms)=30V, RS=5Ω, Rf=5Ω, IDC=200mA Now IDC = Im2  Im = 3200 10 2   = 0.3415 Amp. But Im 2 Vsm R R R LS f    = 2 ( ) 2 V s rms R R R LS f   0.3415 =   2 30 5 2 5 R L     RL = 120.051Ω  120Ω VDC =IDC RL = 200 x10-3 x120 = 24Volts
  • 112.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 119 Ripple factor = ( ) V r rms V dc For Bridge rectifier, ripple factor = 0.482 ( ) V r rms  = rms value of ripple voltage = Vdcx0.482 = 24x0.482 =11.568 Volts 8. In a bridge rectifier the transformer is connected to 220V, 60Hz mains and the turns ratio of the step down transformer is 11:1. Assuming the diode to be ideal, find: i) Idc ii) voltage across the load iii) PIV assume load resistance to be 1kΩ Solution: 2 1 N N = 1 11 , Vp(rms) = 220V, f=60Hz, RL= 1kΩ 2 1 N N = ( ) ( ) V S rms V P rms 1 11  = ( ) 220 V S rms  ( ) V S rms = 220 11 = 20V Vsm 2 ( )Vs rms i) Im Vsm R L  = 28.2842 31 10 = 28.2842 mA I dc  2Im   = 18 mA ii) Vdc = Idc RL = 18x10-3 Xx10-3 = 18 Volts iv) PIV = Vsm = 28.2842 Volts Comparison of Rectifier circuits: Sl. No. Parameter Half-Wave Rectifier Full-Wave Rectifier Bridge Rectifier 1. Number of diodes 1 2 4 2. Average dc current, Idc Im  2Im  2Im  3. Average dc voltage, Vdc Vsm  2Vsm  2Vsm  4. RMS current, Irms 2 Im 2 Im 2 Im
  • 113.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 120 5. DC Power output, Pdc 2 2 I R Lm  24 2 I R Lm  24 2 I R Lm  6. AC Power input, PAC  2 4 I R R RL Sfm    2 2 I R R RLSfm     2 2 2 I R R RLSfm    7. Max. rectifier efficiency (η) 40.6% 81.2% 81.2% 8. Ripple factor (γ) 1.21 0.482 0.482 9. PIV Vm 2Vm 2Vm 10. TUF 0.287 0.693 0.812 11. Max. load current (Im) Vsm R R R LS f   Vsm R R R LS f   2 Vsm R R R LS f   The Harmonic components in Rectifier circuits: An analytical representation of the output current wave in a rectifier is obtained by means of a Fourier series. The result of such an analysis for the half-wave rectifier circuit leads to the following expression for the current waveform.   2,4,6..... 1 1 2 cos I sinm 2 1 1K t i t K K                 The lowest angular frequency present in this expression is that of the primary source of the a.c. power. Except for this single term of angular frequency (ω), all other terms in the above expression are even harmonics of the power frequency. We know that the full-wave circuit consists essentially of two half-wave circuits which are so arranged that one circuit conducts during one half cycle and the second operates during the second half cycle. That is, the currents are functionally related by the expression ( ) ( ) 1 2 i i    . Therefore the total load current is i=i1+i2. The expression for the output current waveform of the full wave rectifier circuit is of the form   2,4,6..... 2 4 Im cos 1 1K i K t K K                In the above equation, we observe that the fundamental angular frequency (ω) has been eliminated from the equation. The lowest frequency in the output is being 2ω, which is a second harmonic term. This offers a definite advantage in the effectiveness of filtering of the output. FILTERS
  • 114.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 121 The output of a half-wave (or) full-wave rectifier circuit is not pure d.c., but it contains fluctuations (or) ripple, which are undesired. To minimize the ripple content in the output, filter circuits are used. These circuits are connected between the rectifier and load. Ideally, the output of the filter should be pure d.c. practically, the filter circuit will try to minimize the ripple at the output, as far as possible. Basically, the ripple is ac, i.e., varying with time, while dc is a constant w.r.t. time. Hence in order to separate dc from ripple, the filter circuit should use components which have widely different impedance for ac and dc. Two such components are inductance and capacitance. Ideally, the inductance acts as a short circuit for dc, but it has large impedance for ac. Similarly, the capacitor acts as open for dc if the value of capacitance is sufficiently large enough. Hence, in a filter circuit, the inductance is always connected in series with the load, and the capacitance is connected in parallel to the load. Definition of a Filter: Filter is an electronic circuit composed of a capacitor, inductor (or) combination of both and connected between the rectifier and the load so as to convert pulsating dc to pure dc. The different types of filters are: 1) Inductor Filter, 2) Capacitor Filter, 3) LC (or) L-Section Filter, and 4) CLC (or) ∏-section Filter. Inductor Filter: Half-Wave rectifier with series Inductor Filter: The Inductor filter for half-wave rectifier is shown in figure below. Fig. Series Inductor filter for HWR. In this filter the inductor (choke) is connected in series with the load. The operation of the inductor filter depends upon the property of the inductance to oppose any change of current that may flow through it. Expression for ripple factor: For a half-wave rectifier, the output current is given by,    0 1 1 2 cos I sinm 2 1 1K even K t i t K K                  
  • 115.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 122 I I 2I cos2 cos4m m msin ....... 2 3 15 t t i t                …………… (1) Neglecting the higher order terms, we have Im VmI dc R L     ……………… (2) If I1 be the rms value of fundamental component of current, then    2 2 2 1 2 Im 2 2 2 2 2 2 L V Vm mI dc R j L L R j L        ………….(3) At operating frequency, the reactance offered by inductance „L‟ is very large compared to RL (i.e., ωL >> RL) and hence RL can be neglected. 1 2 2 VmI L   …………..(4) If I2 be rms value of second harmonic, Then 3 2 2 2 ImI    = 1 22 2 2 2 3 2 4 L Vm R L       = 3 2 Vm L  R L L Q ……. (5) If Iac be the rms value of all current components, then 2 2 1 2I I Iac   Now, I RV Iacac acL V I R I Ldc dc dc     2 2 2 2 2 2 V Vm m L L Vm R L                  1 1 28 18 Vm L Vm R L      1 1 28 18 R L L      1.13R L L  1.13R L L   …………(6) Full-wave rectifier with series inductor filter: A FWR with series inductor filter is shown in figure.
  • 116.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 123 FIG. FWR with series inductor filter. The inductor offers high impedance to a.c. variations. The inductor blocks the a.c. component and allows only t he dc component to reach the load. To analyze the inductor filter for a FWR, the Fourier series can be written as 2 4 1 1 cos2 cos6 ....... 3 15O V Vm mV t t             ………………..(1) The dc component is 2Vm  Assuming the third and higher terms contribute little output voltage is 2 4 cos2 3O V Vm mV t     …………………(2) For the sake of simplicity, the diode drop and diode resistance are neglected because they introduce a little error. Thus for dc component, the current Im Vm R L  . For ac component, the impedance of L and RL will be in series and is given by,   22 2LZ R L  , frequency of ac component = 2ω = 2 2 2 4LR L Thus for ac component 2 2 2 Im 4L Vm R L   The current flowing in a FWR is given by, 2 4 cos2 3 I Im mi t     ……………..(3) Substituting the value of Im for dc and ac equation (3), we get,  2 2 2 2 4 cos 2 3 4L V Vm mi t R R LL          …………….(4) Where Ф is the angle by which the load current lags behind the voltage. This is given by 21tan L R L            …………….(5) Expression for Ripple Factor:
  • 117.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 124 ,Ir rms I dc   From equation (4), 2VmI dc R L   , 2 2 2 4 , 3 2 4L VmIr rms R L    2 2 2 1 3 2 4 4 2 L Vm R L Vm R L       g 2 2 2 2 1 3 2 4 1 L L R              g If 2 2 2 4 L L R  >>1, then 1 3 2 R L L    g = 0.236 R L L  . 3 2 R L L     ……………….. (6) The expression shows that ripple varies inversely as the magnitude of the inductance, Also, the ripple is smaller for smaller values of RL i.e., for high currents. When R L  the value of  is given by 2 3 2   = 0.471 (close to the value 0.482 of rectifier). Thus the inductor filter should be used when RL is consistently small. Problems: 9. A full-wave rectifier with a load resistance of 15kΩ uses an inductor filter of 15H. The peak value of the applied voltage is 250V and the frequency is 50 cycles/second. Calculate the dc load current, ripple factor and dc output voltage. Solution: The rectified output voltage across load resistance RL up to second harmonic is 2 2 cosO V Vm mV t     Therefore, DC component of output voltage is given by 2VmV dc   2V Vdc mI dc R R L L     2 250 315 10     = 10.6 x 10-3 A = 10.6 mA Vdc = Idc RL = (2.12x10-3 ) (15x103 ) = 31.8 V. Peak value of ripple voltage = 4 3 Vm  41 32 VmVac   
  • 118.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 125 Now   22 41 32 2L Vm Iac R L     g   22 2 2 3 2L Vm R L        23 2 1.414 250 3 3.14 15 10 4 3.14 50 15          = 4.24x10-3 A = 4.24 mA So, ripple factor, Iac I dc   = 4.24 10.6 mA mA = 0.4 10. A dc voltage of 380 volt with a peak ripple voltage not exceeding 7volt is required to supply a 500Ω load. Find out if only inductor is used for filtering purpose in full-wave rectifier circuit, i) inductance required and ii) input voltage required, if transformer ratio is 1:1. Solution: i) Given that peak ripple = 7V Therefore, 7= 2 Vrms 7 2 Vrms  = 4.95V Now Vrms V dc   4.95 380  = 0.013 In case of inductor filter 1 3 2 R L L    1 3 2 R LL    1 1335 R LL     (f=50Hz) 500 1335 0.013 L   = 28.8 Henry ii) 2VmV dc   = 0.636Vm 0.636 V dcVm  380 0.636  = 597.4 V This is maximum voltage on half secondary. So, the voltage across complete secondary = 2x 597.4 = 1195V  Input voltage = 1195V because turns ratio is 1:1. Capacitor Filter: Half-wave rectifier wit capacitor filter: The half-wave rectifier with capacitor input filter is shown in figure below:
  • 119.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 126 Fig. HWR with capacitor filter. The filter uses a single capacitor connected in parallel with the load RL. In order to minimize the ripple in the output, the capacitor C used in the filter circuit is quite large of the order of tens of microfarads. The operation of the capacitor filter depends upon the fact that the capacitor stores energy during the conduction period and delivers this energy to the load during non-conduction period. Operation: During, the positive quarter cycle of the ac input signal, the diode D is forward biased and hence it conducts. This quickly charges the capacitor C to peak value of input voltage Vm. Practically the capacitor charge (Vm-Vγ) due to diode forward voltage drop. When the input starts decreasing below its peak value, the capacitor remains charged at Vm and the ideal diode gets reverse biased. This is because the capacitor voltage which is cathode voltage of diode becomes more positive than anode. Therefore, during the entire negative half cycle and some part of the next positive half cycle, capacitor discharges through RL. The discharging of capacitor is decided by RLC, time constant which is very large and hence the capacitor discharge very little from Vm. In the next positive half cycle, when the input signal becomes more than the capacitor voltage, he diode becomes forward biased and charges the capacitor C back to Vm. The output waveform is shown in figure below: Fig. HWR output with capacitor filter. The discharging if the capacitor is from A to B, the diode remains non-conducting. The diode conducts only from B to C and the capacitor charges. Expression for Ripple factor:
  • 120.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 127 Let, T = time period of the ac input voltage T1 = time for which the diode is non conducting. T2 = time for which diode is conducting. < Let Vr be the peak to peak value of the ripple voltage which is assumed to be triangular waveform. It is known mathematically that the rms value of such a triangular waveform is ' 2 3 VrVrms  During the time interval T1, the capacitor C is discharging through the load resistance RL. Therefore the charge lost is Q= C Vr But, dQ i dt  1 0 T Q idt   = Idc .T1 As integration gives average (or) dc value, Hence Idc .T1 = C . Vr 1 I T dcVr C   But T1+T2 = T Normally, T1>>T2, 1 2 1 1 T T T T T     I T dcVr C    I dc f C   1 T f         But V dcI dc R L  , 2 VrV Vmdc      , 2 I dcVm fc      V dcVr fCR L   Ripple factor, 'Vrms V dc   2 3 Vr V dc    2 3 V dc fCR V L dc   1 2 3 fCR L   The product of CRL is the time constant of the filter circuit.
  • 121.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 128 Surge current in Half-wave rectifier using capacitor filter: Fig. Surge current in HWR using capacitor filter In half-wave rectifier, the diode is forward biased only for short period of time and conducts only during this time interval to charge the filter capacitance. The instant at which the diode gets forward biased, the capacitor instantaneously acts as short circuit and a surge current flow through a diode. When the diode is non-conducting, the capacitor discharges through load resistance RL. Thus total amount of charge that flows through conducting diode (or) diodes to recharge the capacitor must be equal to the amount of charge lost during the period when the diode (or) diodes are non-conducting and capacitor is discharging through load resistance RL. It can be seen that conduction period T1 is very small compared to time period T, for the diode. Let, Idc = average dc current Ip(surge) = peak value of the surge current. Assume the current pulse to be rectangular assuming peak surge current flows for the entire conduction period of diode which is T1. Then Q (discharge) = Q (charge) , 1( ) I T I T dc P surge   ( ) 1 T I I P surge dc T           As T1 << T, it can be observed that Ip(surge) can be many times larger than the average dc current supplied to the load. Problem from previous External examinations: 10. A HWR circuit has filter capacitor of 1200μF and is connected to a load of 400Ω. The rectifier is connected to a 50Hz, 120V rms source. It takes 2msec for the capacitor to recharge during each cycle. Calculate the minimum value of the repetitive surge current for which the diode should be rated. Solution: Given C=1200μF, RL=400Ω, f=50Hz, Vrms=120V Conduction period of the diode, T1=1ms 2 ( ) V Vsm S rms   = 2 120  V 2 I dcV Vsmdc fC  
  • 122.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 129  2 V dcV Vsmdc fCR L   1 1 2 VsmV dc fCR L    120 2 1 1 62 50 1200 10 400       = 3.46 V V dcI dc R L   3.46 400  =8.658mA Now IdcT = Ip(surge)T1 ( ) 1 T I I P surge dc T          =8.658mA x 1 350 10 ( ) I P surge   0.17316 A Full-wave rectifier with capacitor filter: The full-wave rectifier with capacitor filter is shown in the figure below: Fig. Full-wave rectifier with capacitor filter Operation: During the positive quarter cycle of the ac input signal, the diode D1 is forward biased, the capacitor C gets charges through forward bias diode D1 to the peak value of input voltage Vm. In the next quarter cycle from 2  to  the capacitor starts discharging through RL, because once the capacitor gets charges to Vm, the diode D1 gets reverse biased and stops conducting, so during the period from 2  to  the capacitor C supplies the load current. In the next quarter half cycle, that is,  to 3 2  of the rectified output voltage, if the input voltage exceeds the capacitor voltage, making D2 forward biased, this charges the capacitor back to Vm.
  • 123.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 130 In the next quarter half cycle, that is, from 3 2  to 2 , the diode gets reverse biased and the capacitor supplies the load current. In FWR, as the time required by the capacitor to charge is very small and it discharges very little due to large time constant, hence ripple in the output gets reduced considerably. The output waveform is shown in figure below: Fig. FWR output with capacitor filter. Expression for Ripple factor: Let, T = time period of the ac input voltage 2 T = half of the time period T1 = time for which diode is conducting T2 = time for which diode is non-conducting During time T1, capacitor gets charged and this process is quick. During time T2, capacitor gets discharged through RL. As time constant RLC is very large, discharging process is very slow and hence T2>>T1. Let Vr be the peak to peak value of ripple voltage, which is assumed to be triangular as shown in the figure below:
  • 124.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 131 Fig. Triangular approximation of ripple It is known mathematically that the rms value of such a triangular waveform is, 2 3 VrVrms  During the time interval T2, the capacitor C is discharging through the load resistance RL. The charge lost is, Q = CVr But dQ i dt  2 2 0 DC T Q idt I T   As integration gives average (or) dc value, hence Idc .T2 = C . Vr 2I T dcVr C   But 1 2 2 T T T  Normally, T2 >> T1, 1 2 1 2 T T T T    where 1 T f  2 DCI T Vr C         2 DCI T C   2 I DC fC  But DC DC V I R L  , 2 DCV Vr fCR L   = peak to peak ripple voltage Ripple factor, Vrms V dc  2 1 2 3 V dc fCR L V dc   2 3 VrVrms         Ripple factor 1 34 fCR L  L-Section Filter (or) LC Filter: The series inductor filter and shunt capacitor filter are not much efficient to provide low ripple at all loads. The capacitor filter has low ripple at heavy loads while inductor filter at small loads. A combination of these two filters may be selected to make the ripple independent of load resistance. The resulting filter is called L-Section filter (or) LC filter (or) Choke input filter. This
  • 125.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 132 name is due to the fact that the inductor and capacitor are connected as an inverted L. A full-wave rectifier with choke input filter is shown in figure below: Fig. Full-wave rectifier with choke input filter. The action of choke input filter is like a low pass filter. The capacitor shunting the load bypasses the harmonic currents because it offers very low reactance to a.c. ripple current while it appears as an open circuit to dc current. On the other hand the inductor offers high impedance to the harmonic terms. In this way, most of the ripple voltage is eliminated from the load voltage. Regulation: The output voltage of the rectifier is given by, 2 4 cos2 3 V Vm m t      The dc voltage at no load condition is 2VmV dc   The dc voltage on load is 2VmV I R dc dc   Where R R R R C Sf    , ,R R R C Sf are resistances of diode, choke an secondary winding. Ripple Factor: The main aim of the filter is to suppress the harmonic components. So the reactance of the choke must be large as compared with the combined parallel impedance of capacitor and resistor. The parallel impedance of capacitor and resistor can be made small by making the reactance of the capacitor much smaller than the resistance of the load. Now the ripple current which has passed through L will not develop much ripple voltage across RL because the reactance of C at the ripple frequency is very small as compared with RL. Thus for LC filter, XL >> XC at 2ω = 4Πf and RL >> XC Under these conditions, the a.c. current through L is determined primarily by XL= 2ωL (the reactance of the inductor at second harmonic frequency). The rms value of the ripple current is 4 1 . ( ) 3 2 VmI r rms X L  22 3 2 Vm X L          2 3 V dcX L  Always it was stated that XC is small as compared with RL, but it is not zero. The a.c. voltage across the load (the ripple voltage) is the voltage across the capacitor. Hence     V I Xr rms r rms C  
  • 126.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 133 2 3 V X CdcX L          We know that ripple factor  is given by   Vr rms V dc   2 3 X C X L  But 1 2 X C C  and XL = 2ωL   2 1 3 2 2L C     2 1 6 2 LC  1 26 2 LC     This shows that ω is independent of RL. The necessity of Bleeder Resistance RB: The basic requirement of this filter circuit is that the current through the choke must be continuous and not interrupted. An interrupted current through the choke may develop a large back e.m.f which may be in excess of PIV rating of the diodes and/or maximum voltage rating of the capacitor C. Thus this back e.m.f is harmful to the diodes and capacitor. To eliminate the back e.m.f. developed across the choke, the current through it must be maintained continuous. This is assured by connecting a bleeder resistance, RB across the output terminals. The full-wave rectifier with LC filter and bleeder resistance is shown in the figure below: Fig. filter with Bleeder resistance We know, 2 DC C VsmI R R   where RC is choke terminal resistance , R is R R B L P 4 2 3 2 VsmI m L  
  • 127.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 134 Thus IDC is seen to depend on load resistance R R RB L   P while I2m does not. I2m is constant, independent of RL. The second harmonic terminal I2m is superimposed on IDC, as shown in figure. If the load resistance is increased, IDC will decrease, but I2m will not. If the load resistance is still further increased, a stage may come where IDC may become less than I2m. In such situation, for a certain period of time in each cycle, the net current in the circuit will be zero. In other words, the current will be interrupted and not continuous. This interruption of current, producing large back emf is harmful to both the diodes and filter capacitor C. To avoid such situation, certain minimum load current has to be drawn. For this purpose, the bleeder resistance RB is so selected that it draws, a minimum current through choke. The condition is IDC ≥ I2m 2 DC C VsmI R R   ≥ 4 2 3 2 VsmI m L   3CR R L   Usually RC << R, then 3R L Since R = R RB LP , considering the worst case that the load resistance RL is not connected, then R=RB 3R L B   6R fL B    2 f Q If f=50Hz then 943R L B  Practically, RB is selected to be equal to 900L. Critical Inductance: We have assumed that the current flows through the circuit all the times. For this, the value of inductance L must be kept above certain minimum value which is called critical Inductance. This value of inductance depends on load resistance RL and supply frequency ω. The required value of critical inductance for 50Hz supply frequency is 943C R LL 
  • 128.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 135 Problem from previous External examination: 12. A full-wave rectifier supplies a load requiring 300V at 200mA. Calculate the transformer secondary voltage for i) a capacitor input filter using a capacitor of 10μF. ii) a choke input filter using a choke of 10H and a capacitance of 10μF. Neglect the resistance of choke. Solution:
  • 129.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 136 Multiple L-Section filters: The number of L-sections i.e., LC circuits can be connected one after another to obtain multiple L-section filter. It gives excellent filtering and smooth dc output voltage. The figure below shows multiple L-section filter. Fig. Multiple L-sections. For two section LC filter, the ripple factor is given by 2 1 2. . 3 1 2 X X C C X X L L   CLC Filter (or) Π – section Filter: This is capacitor input filter followed by a L-section filter. The ripple rejection capability of a Π-section filter is very good. The full-wave rectifier with Π-section filter is shown in the figure. Fig. Π-section Filter. It consists of an inductance L with a dc winding resistance as RC and two capacitors C1 and C2. The filter circuit is fed from fill wave rectifier. Generally two capacitors are selected equal. The rectifier output is given to the capacitor c1. This capacitor offers very low reactance to the ac component but blocks dc component. Hence capacitor C1 bypasses most of the ac component. The dc component then reaches to the choke L. The choke L offers very high reactance to dc. So it blocks ac component and does not allow it to reach to load while it allows dc component to pass through it. The capacitor C2 now allows to pass remaining ac component and almost pure dc component reaches to the load. The circuit looks like a Π, hence called Π-Filter.
  • 130.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 137 Ripple Factor: The Fourier analysis of a triangular wave is given by sin 4 sin6 sin .... 2 3 V t trV t dc                ……………(1) In case of full wave rectifier with capacitor filter, we have proved that 12 2 I I dc dcV fC fC    1 C C here  ……………(2) The rms second harmonic voltage is   2 VrVr rms  ………….(3) Substituting the value of Vr from equation (2) in equation (3), we get   1 1 2 . 2 2 I dcV I XCr rms dcfC   …………(4) Where 1 1 1 1 1 2 4 XC C fC    = reactance of C1 at second harmonic frequency. The voltage Vr(rms) is impressed on L-section. Now, the ripple voltage V‟r(rms) can be obtained by multiplying Vr(rms) by 2XC XL i.e.,    ' 1 XC V Vr r rms Xrms L   (or)  ' 22 . 1 XC V I XCr dc Xrms L  …………(5)  'Vr rms V dc   22 . 1 XC I XC dc X L V dc  2. . 1 2 . XC XC R X L L   1I dc V R Ldc         Q 2. . 1 2 . XC XC R X L L   Here all reactances are calculated at second harmonic frequency. Substituting the values, we get 2 38 1 2 C C LR L    At f= 50Hz, 5700 1 2 LC C R L   Where C1 and C2 are in μF, L in henrys and RL in ohms.
  • 131.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 138 Multiple Π-Section Filter: To obtain almost pure dc to the load, more Π-sections may be used one after another. Such a filter using more than one Π-section is called multiple Π-section filter. The figure shows multiple Π-section filters. Fig. Multiple Π-section Filter. The ripple factor of two section Π-filter is given by 11 12 222. . . 1 2 X X X C C C R X X L   Problems: 14. Design a CLC (or) Π-section filter for Vdc=10V, IL=200mA and γ=2% Solution: V dcR L I L  10 3200 10   = 50Ω 5700 1 2 LC C R L   5700 0.02 1 2 LC C R L   114 1 2 LC C  If we assume L=10H and C1=C2=C, we have 114 0.02 2LC   11.4 2C  C2 = 750 570 = 24μF Voltage Regulators: A voltage regulator is an electronic device which produces constant output voltage irrespective of variations in the input voltage and load variations. A voltage regulator is an electronic circuit that produces a stable dc voltage independent of the load current, temperature and ac line voltage variations. Factors determining the stability: The output voltage VO depends on the input unregulated dc voltage Vin, load current IL and temperature T. Hence the change in output voltage of power supply can be expressed as follows: O O O O V V V V V I Tin LV I Tin L             
  • 132.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 139 V L TO OV S V R I S Tin       Where the three coefficients are defined as Input regulation factor, ; 0 0 OV SV V TV inin       Output resistance, ; 0 0 O O V R V TI inL       Temperature coefficient, ; 0 0 OV ST V IT Lin       Smaller the value of the three coefficients, better the regulation of power supply. Load Regulation: Load regulation is expressed as Load regulation = V V no load full load V no load     (or) Load regulation = V V no load full load V full load     Where Vno-load is the output voltage at zero load current and Vfull-load is the output voltage at related load current. This is usually denoted in percentage. Zener diode voltage regulator: Fig. Zener Regulator. Zener voltage regulator is shown in figure above, in which a zener diode is connected in parallel to the load resistance RL. The resistance RS is a current limiting resistor. Vi, RS and RL fixed: The analysis can be carried out into two steps. i) Determining the state of the zener diode by removing it from the network and calculating the voltage across the resulting open circuit. R ViLV Vo R RLS    if V ≥ VZ the zener diode is „ON‟ if V < VZ the zener diode is „OFF‟.
  • 133.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 140 ii) Substitute the appropriate equivalent circuit and solve for the desired unknowns. V VZO  I I IZ R L  VZIL RL  VRIR RS  V V ViR Z  P V IZ Z Z Problem: For the zener diode network of below figure determine VO, VR, VZ and PZ. Repeat the same with RL=3kΩ Solution: To find the diode status, replace the diode by open circuit and by finding the voltage across the open circuit. 16 1.2 1 1.2 V k Vo k      16 1.2 2.2 Vo   = 8.72 Volts ,V Vo Z  the zener diode is in „OFF‟ state 0IZ  8.72 1.2 VLIL R kL   = 7.27 mA 16 7.27 1 V V VoiRIR R R k       = 8.72 mA With RL = 3KΩ: 16 3 4 Vo   = 12Volts. VO > VZ  The zener diode is „ON‟.
  • 134.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 141 The equivalent circuit is replacing the zener by its equivalent voltage, to determine all the parameters are shown below. 16 3 4 VL   = 12 Volts Zener is ON 10V V Vo Z   10 3.33 3 VZI mAL R kL     16 10 6 6 1 1 V V ViR ZI mAR R R k k          I I IR Z L  I I IZ R L  = 6-3.33 = 2.667 mA .P V IZ Z Z = 10x2.667 = 2.66 mW. Fixed Vi, R and variable RL: R ViLV Vo Z R R S    Solving for RL min R Vi ZR L V Vi Z   max min VZIL R L  Once the diode is in „ON‟ state V V ViR Z  VRIR R  I I IZ R L  min I I IR ZML   max min VZRL I L  Problem: For the network shown below, determine the range of RL and IL that will result in VL being maintained at 10V.
  • 135.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 142 Solution: . 1 10 10 0.25 min 50 10 40 RV k V kZR k L V Vi Z          10 40max 0.25 min VZI mAL R k L    V V ViR Z  50 10 40VR    40 40 1 VRI mAR R k     min I I IR ZML   = 40-32 = 8mA 10 1.25max 8 min VZR kL I mA L     Fixed R, RL and variable Vi: R ViLV Vo Z R RL      min R R VL ZV i RL   maxI I IR ZM L  VZIZ RL  max maxV V Vi R Z   .max maxV I RR R Problem: Determine the range of values of Vi, that will maintain the zener diode of figure below is in the „ON‟ state. Solution: Vimin = 23.67V Vimax = 36.87V   min R R VL ZV i RL  
  • 136.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 143  220 1200 20 23.67 1200 V    max maxV V Vi R Z   maxI R VR Z   I I R VZM L Z     20 60 220 20 1.2 mA k          =36.87 Volts Basic Voltage Regulator: The basic voltage regulator in its simplest form consists of, i) Voltage reference, VR ii) Error amplifier iii) Feedback network iv) Active series (or) shunt control element. The voltage reference generally a voltage level which is applied to the comparator circuit, which is generally error amplifier. The second input to the error amplifier is obtained through feedback network. Generally using the potential divider, the feedback signal is derived by sampling the output voltage. The error amplifier converts the difference between the output sample and the reference voltage into an error signal. This error signal in turn controls the active element of the regulator circuit, in order to compensate the change in the output voltage. Such an active element is generally a transistor. Thus the output voltage of the regulator is maintained constant. Types of voltage Regulators: There are two types of voltage regulators available namely, i) Shunt voltage regulator ii) Series voltage regulator Each type provides a constant dc output voltage which is regulated. Shunt Voltage Regulator: The heart of any voltage regulator circuit is a control element. If such a control element is connected in shunt with the load, the regulator circuit is called shunt voltage regulator. The figure shows the block diagram of shunt voltage regulator circuit.
  • 137.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 144 Fig. Block diagram of shunt voltage regulator. The unregulated input voltage Vin, tries to provide the load current. But part of the current is taken by the control element, to maintain the constant voltage across the load. If there is any change in the load voltage, the sampling circuit provides a feedback signal to the comparator circuit. The comparator circuit compares the feedback signal with the reference voltage and generates a control signal which decides the amount of current required to be shunted to keep the load voltage constant. For example, if load voltage increases then comparator circuit decides the control signal based on the feedback information, which draws increased shunt current Ish value. Due to this, the load current IL deceases and hence the load voltage decreases to its normal. Thus control element maintains the constant output voltage by shunting the current; hence the regulator circuit is called voltage shunt regulator circuit. Series Voltage Regulator: If in a voltage regulator circuit, the control element is connected in series with the load, the circuit is called series voltage regulator circuit. Figure shows the block diagram of series voltage regulator circuit. The unregulated dc voltage is the input to the circuit. Fig. Block diagram of series voltage regulator.
  • 138.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 145 The control element controls the amount of the input voltage that gets to the output. The sampling circuit provides the necessary feedback signal. The comparator circuit compares the feedback with the reference voltage to generate the appropriate control signal. For example, if the load voltage tries to increase, the comparator generates a control signal based on the feedback information. This control signal causes the control element to decrease the amount of the output voltage. Thus the output voltage is maintained constant. Thus, the control element which regulates the load voltage, based on the control signal is in series with the load and hence the circuit is called series voltage regulator circuit.
  • 139.
    Department of Electronicsand Communication Engineering UNIT-III -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 146 Comparison of Shunt and Series voltage regulators: Sl. No. Shunt Regulator Series Regulator 1. The control element is in parallel with the load. The control element is in series with the load. 2. Only small current passes through the control element which is required to be diverted to keep output constant The entire load current IL always passes through the control element. 3. Any change in output voltage is compensated by changing the current Ish through the control element as per the control signal. Any change in output voltage is compensated by adjusting the voltage across the control element as per the control signal. 4. The control element is low current, high voltage rating component. The control element is high current, low voltage rating component. 5. The regulation is poor. The regulation is good. 6. Efficiency depends on the load current. Efficiency depends on the output voltage. 7. Not suitable for varying load conditions. Preferred for fixed voltage applications. Preferred for fixed as well as variable. 8. Simple to design. Complicated to design as compared to shunt regulators. 9. Examples: Zener Shunt regulators, transistorized shunt regulator etc., Examples: Series feedback type regulator, series regulator with pre- regulator and feedback limiting etc.,
  • 140.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 33 UNIT III – SPECIAL SEMICONDUCTORS SYLLABUS SPECIAL SEMICONDUCTOR DEVICES: Principle of operation, characteristics and applications of tunnel diode, varactor diode, UJT, photo diode, LED, LCD, SCR. <, LECTURE PLAN S. No. Topics to be covered No. of Periods 1 Characteristics of Tunnel Diode with the help of Energy band diagrams 1 2 Varacter Diode, Photo Diode 1 3 LED, LCD 1 4 SCR 1 5 Photo Diode 1 TOTAL 5
  • 141.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 34 Varactor Diode:  We know that the transition capacitance c(t) is given by c(t)=  A  In both alloy junction diode and grown junction diode as the magnitude of the reverse bias increases, the width „w‟ of the transition region increases, and the junction capacitance c(t) reduces.  The voltage- variable nature of transition capacitance of reverse-biased pn- junction may be utilized in several applications such as 1) In voltage tuning of an LC resonant. 2) Self balancing bridge circuits. 3) In parametric amplifiers etc. 4) FM radio and TV receivers, AFC circuits. 5) Used in adjustable band pass filters.  This special diode is made especially for the above applications which are biased on the voltage- variable capacitance are called “Varactor diode” or “Varicap” or “Voltacap”.  Varactor diode symbol and circuit models are shown below. Rs: Body series resistance. C(t): Barrier capacitance. rR : Reverse diode resistance.  Typically, at a reverse bias of 4v, C(t)= 20pF, R(s)=8.5 ohms, R(r)>1M (usually neglected). Tunnel diode:  A normal pn-junction has an impurity concentration of about 1 part in 10^8. With this amount of doping, the width of depletion layer, which constitutes the potential barrier of the junction, is of the order of 5 microns (5x10-4 cm).  If the concentration of impurity atoms is greatly increased, say 1 part in 103 the device characteristics are completely changed. The new diode was announced in 1958 by Leo Esaki. This diode is called „Tunnel diode‟ or „Esaki diode‟.  The barrier potential VB is related with the width of the depletion region with the following equation.
  • 142.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 35 q NAV . ²B 2   B2V ² . q NA      From the above equation the width of the barrier varies inversely as the square root of impurity concentration.  As the depletion width decreases there is a large probability that an electron will penetrate through the barrier. This quantum mechanical behavior is referred to as tunneling and hence these high impurity density pn-junction devices are called Tunnel diodes. This phenomenon is called as „tunneling‟. Energy band structure of heavily doped pn-junction diode under open circuited conditions: In the energy band structure for the lightly doped pn-diode, the Fermi level Ef lies inside the forbidden energy gap. In the heavily doped pn-diode Ef lies out side the forbidden band. We know that, Ef = Ec – KT ln(Nc/ND) For a lightly doped semiconductor, ND<Nc, So that Ncln ND         is a positive number. Hence Ef < Ec, and the Fermi level lies inside the forbidden band. For a heavily doped semiconductor donor concentrations are more so that, ND> Nc and is Ncln ND         a negative number. Hence Ef > Ec, and the Fermi level lies outside the forbidden band. Similarly, NvE E KT ln .vf NA           For heavily doped p-region, NA> NV, and the Fermi-level lies in the Fermi-level lies in the valance band. The energy band structure in a heavily doped pn-diode under open circuited condition is shown in the figure. We have N NVCE KT lnG 2ni          N ND AE KT lno 2ni          Comparing above two equations for heavily doped pn-diode we find that EO>EG. Therefore, the contact difference of potential energy EO exceeds the forbidden energy gap voltage EG.
  • 143.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 36 Fig. energy band in a heavily doped pn-diode under open circuited condition. The Fermi level Ef in the p-side is at the same energy as the Fermi level Ef in the n-side. Note that there are no filled states on one side of the junction which are at the same energy as empty allowed states on the other side. Hence there can be no flow of charge in either direction across the junction, and the current is zero for an open circuited diode. The volt-ampere characteristic: If a reverse bias voltage is applied to the tunnel diode, the height of the barrier is increased above the open-circuit value EO. Hence the n-side levels must shift downward with respect to the p-side levels as shown in the figure below. Fig. Under applied reverse bias We now observe that there are some energy states in the valance band of the p-side which lie at the same level as allowed empty states in the conduction band of the n-side. Hence these electrons will tunnel from the p to the n-side, giving rise to a reverse diode current. As the magnitude of the reverse bias increase, causing the reverse current to increase. Consider if a forward bias is applied to the diode so that the potential barrier is decreased below Eo. Hence the n-side levels must shift upward with respect to those on the p-side. The energy band diagrams for a heavily doped under forward bias conditions are shown in figure below.
  • 144.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 37 Fig. As the bias is increased, the band structure changes progressively from (a) to (d). From fig (a) we can observe that the electrons will tunnel from the n to the p material giving rise to the forward current. As the forward bias is increased further, the maximum number of electrons can leave from occupied states on the right side of the junction, and tunnel through the barrier to the empty states on the left side of the junction giving rise to the peak current Ip. If still more forward bias is applied, fig© is obtained and the tunneling current decreases. Finally if the forward bias is larger there is no9 empty allowed states on one side of the junction at the same energy as occupied states on the other side, the tunneling current must drop to zero. The v-I characteristics of tunnel diode is shown in fig. Fig.-I Characteristics of a tunnel diode. The tunnel diode exhibits a negative resistance characteristics between peak current Ip and valley current Iv. The tunnel diode is excellent conductor in the reverse bias conditions. By applying small forward bias voltage to the tunnel diode the current increases and reaches to the maximum level. The maximum for small forward bias voltage is called as „peak current (Ip)‟.The corresponding voltage to the peak current is called „peak voltage (Vp)‟. If forward bias voltage is increased beyond the peak voltage the current starts decreasing and reaches to the maximum level. This minimum value of the current is called as “valley current (Iv)”. The corresponding voltage to the valley current is called as “valley voltage (Vv)”.
  • 145.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 38 If forward bias voltage is increased beyond valley voltage it exhibits the same characteristics as ordinary diode. The tunnel diode symbol and small-signal model are shown in fig. below. Applications of Tunnel diode: 1. It is used as a very high speed switch, since tunneling takes place at the speed of light. 2. It is used as a high frequency oscillator. Light Emitting Diode (LED): The LED is an optical diode which emits light when forward biased, by a phenomenon called electroluminescence. The LEDs use the materials like Gallium Arsenide (GaAs), Gallium Arsenide Phospide (GaAsP) or Gallium Phospide (GaP). These are the mixtures of elements Ga,As,P. The symbol of LED is shown in figure below: When an LED is forward biased, the electrons and holes move towards the junction and recombination takes place. As a result of recombination, the electrons lying in the conduction bands of n-region fall into the holes lying in the valance band of p-region. The difference of energy between the conduction band and the valance band is radiated in the form of light energy. The energy released in the form of light depends on the energy corresponding to the forbidden gap. This determines the wavelength of the emitted light. The wavelength determines the color of the light and also determines whether the light is visible or invisible (infrared). The color of the emitted light depends on the type of material used. Gallium Arsenide (GaAs) --- Infrared radiation (invisible) Gallium Phospide (GaP) --- Red or Green Gallium Arsenide Phospide (GaAsP) --- Red or Yellow. The brightness of the emitted light is directly proportional to the forward bias current. Output characteristics of LED: The amount of power output translated into light is directly proportional to the forward current If. More the forward current If, the greater is the output light. The graph of forward current and output light in mW is shown in the figure below. This is called output characteristics for LED.
  • 146.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 39 Fig. Typical output characteristics for LED. Fig. Process of electro luminescence Advantages of LEDs: 1. LEDs are small in size. 2. LEDs are fast operating devices. 3. LEDsare light in weight. 4. LEDs are available in various colors. 5. The LEDs have long life. 6. The LEDs are cheap and readily available. 7. LEDs are easy to interface with various other electronic circuits. Disadvantages of LEDs: 1. Needs large power for the operation. 2. The characteristics are affected by the temperature. Applications of LEDs: The LEDs are used in all kinds of visual displays i.e., seven segment displays and alpha numeric displays. Such displays are commonly used in multimeter, calculator, watches etc. LEDs are also use din optical devices such as optocouplers. They are also used in burglar alarm systems. Liquid Crystal Displays: A liquid crystal is a material that will flow like a liquid but whose molecular structure has some properties normally associated with solids. Therefore the liquid crystals have been called the “forth state of matter” after solids, liquids and gases. Unlike LEDs and other electroluminescent devices, LCDs do not generate light energy but simply alter or control the existing light to make selected areas appear bright or dark.
  • 147.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 40 There are two major types of LCDs. 1. Dynamic scattering LCDs. 2. Field effect LCDs. Dynamic scattering LCDs: Fig. Construction of LCDs. In the Dynamic scattering methods, the molecules of the liquid crystal acquire a random orientation by virtue of an externally applied electric potential. As, a result, light passing through the material is reflected in many different directions and has a bright, frosty appearance as it emerges. Dynamic scattering type LCD operates in “transmissive mode”. In transmissive mode, he light is allowed to fall on one side glass sheet and the ray‟s passes through the liquid crystals (transmittive liquid crystal cells) and transmits to the glass sheet of other side. The Dynamic scattering type LCD is shown in figure below. Fig. Dynamic scattering type LCD in transmissive mode. Field effect LCDs: In the field effect method, the molecules are oriented in such a way that they alter the polarization of light passing through the material. Polarization filter are used to absorb or pass the light, depending on the polarization it has been given, so light is visible only in those regions where it can emerge from the filter.
  • 148.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 41 The field effect type LCD operates in both “transmissive” and “reflective” modes. To operate in reflective mode, a reflecting mirror is placed on one side of the glass sheet. The field effect LCD is shown in the figure below: Fig. Twisted nematic field effect LCD based on light absorption Operating in transmissive mode Fig. Twisted nematic field effect LCD based on light absorption Operating in reflective mode.
  • 149.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 42 Materials used to form the electrodes are stannic oxide (SnO2) and Indium Oxide (In2O3). Advantages of LCDs: a. The voltages required are small. b. They have low power consumption c. They are economical. Disadvantages of LCDs: 1. LCDs are very slow devices, the turn on and off times are quite large. Typically turn on time is of the order of few milliseconds while the turn-off is ten milli seconds. 2. Life time is limited to 50000 hrs due to chemical degradation. 3. They occupy large area. Applications of LCDs: 1. LCDs are used for display of numeric and alpha numeric character in dot matrix and segment display. 2. Used in pocket calculators, wrist watches and other portable digital devices. Photodiode: The photodiode is a device that operates in reverse diode. The photodiode has a small transparent window that allows light to strike one surface of the pn-junction, keeping the remaining sides unilluminated. The symbol of photodiode is shown in figure below. A photodiode differs from a rectifier diode in that when its pn-junction is exposed to light, the reverse current increases with the light intensity. When there is no incident light the reverse current, I  , is almost negligible and is called the dark current. An increase in the amount of light intensity, expressed as irradiance (mW/cm2 ), produces an increase in the reverse current.
  • 150.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 43 Typically, the reverse current is approximately 1.4 μA at a Reverse bias voltage of 10V with an irradiance of 0.5 mWcm². Therefore RR=VR/I  = 10v/1.4μa = 7.14MΩ At 20 mW/cm², the current is approximately 55 μa at VR=10v. Therefore, RR= VR/ I  = 10v/55 μa = 182KΩ Hence the photodiode can be used as a variable-resistance device controlled by light intensity. The volt-ampere characteristics of photodiode are shown in figure. Fig. V-I characteristics of photo diode. Advantages of Photo diodes: 1. It can be used as variable-resistance device. 2. Highly sensitive to the light. 3. The speed of operation is very high. Disadvantages of Photo diodes: 1. The dark current is temperature dependent. Applications of photodiode: 1) Photodiodes are commonly used in alarm systems and counting systems. 2) Used in demodulators. 3) Used in encoders.
  • 151.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 44 4) Used in light detectors. 5) Used in optical communication systems. UNIJUNCTION TRANSISTOR: Uni Junction Transistor (UJT) is a three terminal semi conductor switching device. As it has only one PN junction and three leads, it is commonly called as Uni Junction Transistor. The three terminals are: Emitter (E), Base1 (B1) and Base2 (B2). Construction and Symbol: The basic structure and symbol of UJT is shown in figure below. It consists of a lightly doped n-type silicon bar with a heavily doped p-type material alloyed to its one side closer to B2 for producing single PN junction. Fig. UJT (a) Basic structure (b) Circuit symbol Here the emitter leg is drawn at an angle to the vertical and the arrow indicates the direction of the conventional current. Operation of UJT: The inter base resistance between B2 and B1 of the silicon bar is, RBB=RB1+ RB2. With emitter terminal open, if voltage VBB is applied between the two bases, a voltage gradient is established along the n-type bar. The voltage drop across RB1 is given by 1V VBB , where the intrinsic stand-off ratio 1 1 2 R B R RB B    . The typical value of  ranges from 0.56 to 0.75. This voltage V1 reverse biases the PN-junction and emitter current is cut-off. But a small leakage current flows from B2 to emitter due to minority carriers. The equivalent circuit of UJT is shown in figure below.
  • 152.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 45 Fig. UJT equivalent circuit. If a negative voltage is applied to the emitter, PN-junction remains reverse biased and the emitter current is cut-of. The device is now in the „OFF‟ state. If a positive voltage VE is applied to the emitter, the PN-junction will remain reverse biased so long as VE is less than V1. If VE exceeds V1 by the cut-in voltage vγ, the diode becomes forward biased. Under this condition, holes are injected into n-type bar. These holes are repelled by the terminal B2 and are attracted by the terminal B1. Accumulations of holes in E to B1 region reduce the resistance in this section and hence emitter current IE is increased and is limited by VE. The device is now in the „ON‟ state. Characteristics of UJT: Figure below shows the input characteristics of UJT. Here, up to the peak point P, the diode is reverse biased and hence, the region to the left of the peak point is called cut-off region. At P, the peak voltage V V VP BB   , the diode starts conducting and holes are injected into n-layer. Hence, resistance decreases thereby decreasing VE for the increase in IE. SO there is a negative resistance region from peak point P to valley point V. After the valley point, the device is driven into saturation and behaves like a conventional forward biased PN-junction diode. The region to the right of the valley point is called saturation region. In the valley point, the resistance is changes from negative to positive. The resistance remains positive in the saturation region. Due to the negative resistance property, a UJT can be employed in a variety of applications, viz., a saw-tooth wave generator, pulse generator, switching, timing and phase control circuits. UJT Relaxation Oscillator: The Relaxation oscillator using UJT which is meant for generating saw-tooth waveform is shown in figure below:
  • 153.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 46 Fig: UJT Relaxation Oscillator. It consists of a UJT and a capacitor CE which is charged through RE as the supply voltage VBB is switched ON. The voltage across the capacitor increases exponentially and when the capacitor voltage reach the peak point voltage VP, the UJT starts conducting and the capacitor voltage is discharged rapidly through EB1 and R1. After the peak point voltage of UJT is reached, it provides negative resistance to the discharge path which is useful in the working of the relaxation oscillator. As the capacitor voltage reaches zero, the device then cuts off and capacitor CE starts to charge again. This cycle is repeated continuously generating a saw-tooth waveform across CE. The inclusion of external resistors R2 and R1 in series with B2 and B1 provides spike waveforms. When the UJT fires, the sudden surge of current through B1 causes drop across R1, which provides positive going spikes. Also, at the time of firing, fall of VEB1 causes I2 to increase rapidly which generates negative going spikes across R2. By changing the values of capacitance CE (or) resistance RE, frequency of
  • 154.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 47 the output waveform can be changed as desired, since these values control the time constant RECE of the capacitor changing circuit. Frequency of oscillations: The time period and hence the frequency of the saw-tooth wave can be calculated as follows. Assuming that the capacitor is initially uncharged, the voltage VC across the capacitor prior to breakdown is given by / 1 t R C E EV V eBBC           Where RECE = charging time constant of resistor-capacitor circuit, and t= time from the commencement of the waveform. The discharge of the capacitor occurs when VC is equal to the peak-point voltage VP, i.e, / 1 t R C E EV V V eP BB BB            / 1 t R C E Ee     / 1 t R C E Ee     1 log 1 t R C eE E           1 2.303 log 10 1 R CE E          If the discharge time of the capacitor is neglected, then t=T, the period of the wave. Therefore, frequency of oscillations of saw-tooth wave, 1 1 1 2.3 log 10 1 f T R CE E           SCR (SILICON CONTROLLED RECTIFIER) The basic structure and circuit symbol of SCR is shown in figure below. It is a four layer three terminal device in which the end p-layer acts as anode, the end n- layer acts as anode, the end n-layer acts as cathode and p-layer nearer to cathode acts as gate. As leakage current in silicon is very small compared to germanium, SCR‟s are made of silicon and not germanium.
  • 155.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 48 (a) Basic Structure (b) Circuit symbol Fig, Basic structure and circuit symbol of SCR. Operation of SCR: The operation of SCR is divided into two categories, i) When gate is open: Consider that the anode is positive with respect to cathode and gate is open. The junctions J1 and J3 are forward biased and junctions J2 is reverse biased. There is depletion region around J2 and only leakage current flows which is negligibly small. Practically the SCR is said to be „OFF‟. This is called forward blocking state of SCR and voltage applied to anode and cathode with anode positive is called forward voltage. This is shown in figure (a) below. (a) J1, J3 Forward biased. J2 Reverse biased. With gate open, if cathode is made positive with respect to anode, the junctions J1, J3 become reverse biased and J2 forward biased. Still the current flowing is leakage current, which
  • 156.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 49 can be neglected as it is very small. The voltage applied to make cathode positive is called reverse voltage and SCR is said to be in reverse blocking state. This is shown in the figure (b) below. (a) J1, J3 Reverse biased. J2 Forward biased. Fig. Operation of SCR when gate is open (a), (b). 2. When gate is closed: Consider that the voltage is applied between gate and cathode when the SCR is in forward blocking state. The gate is made positive with respect to the cathode. The electrons from n-type cathode, which are majority in number, cross the junction J3 to reach to positive of battery. While holes from p-type move towards the negative of battery. This constitutes the gate current. This current increases the anode current as some of the electrons cross junction J2. As anode current increases, more electrons cross the junction J2 and the anode current further increases. Due to regenerative action, within short time, the junction J2 breaks and SCR conducts heavily. The connections are shown in the figure. The resistance R is required to limit the current. Once the SCR conducts, the gate loses its control. Fig. Operation of SCR when gate is closed. Characteristics of SCR: The characteristics are divided into two sections: i) Forward characteristics
  • 157.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 50 ii) Reverse characteristics i) Forward characteristics: It shows a forward blocking region, when IG=0. It also shows that when forward voltage increases up to VBO, the SCR turns ON and high current results. It also shows that, if gate bias is used then as gate current increases, less voltage is required to turn ON the SCR. If the forward current falls below the level of the holding current IH, then depletion region begins to develop around J2 and device goes into the forward blocking region. When SCR is turned on from OFF state, the resulting forward current is called latching current IL. The latching current is slightly higher than the holding current ii) Reverse characteristics: If the anode to cathode voltage is reversed, then the device enters into the reverse blocking region. The current is negligibly small and practically neglected. If the reverse voltage is increases, similar to the diode, at a particular value avalanche breakdown occurs and a large current flows through the device. This is called reverse breakdown and the voltage at which this happens is called reverse breakdown voltage Fig. Characteristics of SCR. Two Transistor Analogy: The easiest way to understand how SCR works it ot visualize it separately into two halves, as shown in the figure. The left half is a p-n-p transistor and right half is n-p-n transistor. This is also called two transistor model of SCR.
  • 158.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 51 The collector current of T1 becomes base current of T2 and collector current of T2 becomes base current of T1. Fig, Two transistor model of SCR. Mathematical Analysis: Let IC1 and IC2 are collector currents, IE1 and IE2 are emitter currents while IB1 and IB2 are base currents of transistors T1 and T2. Let both the transistors are operating in active region. From transistor analysis we can write, 1 1 1 I IE I C CO   and 2 2 2 I IE I C CO   Where ICO = Reverse current (or) leakage current. And 1      Now, IE2 = IC2 + IB2 IA = Anode current = IE1 IK = Cathode current = IE2 IG = Gate current Now, IK = IA + IG 2 2 2 I I I I I E A G C B      But IB2 = IC1 + IG 2 1 I I I I I A G C C G      Substituting IC1 and IC2, 1 1 1 2 2 2 I IE I IE I A CO CO        2 1 1 2 I I I I I I A A G A CO CO        2 1 2 1 2 I I I I I I A A A G CO CO        
  • 159.
    Department of Electronicsand Communication Engineering UNIT-II -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 52   2 1 2 1 21 G CO COI I I I A          In blocking state 1 and 2 are small. Thus IA is small. As 1 2  approaches unit, the SCR is ready to enter into conduction. Thus due to positive gate current, the regenerative action takes place and SCR conducts.
  • 160.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 145 UNIT-IV TRANSISTOR SYLLABUS: BIPOLAR JUNCTION TRANSISTORS: Introduction, transistor construction, transistor operation, transistor current components, transistor as an amplifier, common base configuration, common emitter configuration, common collector configuration, limits of operation, transistor specifications. LECTURE PLAN S. No. Topic to be covered Periods required 1 Transistor Construction, Different types of Transistors, Principle of operation of npn and pnp transistors. 1 2 Transistor Current components, Current parameters 1 3 Input and Output characteristics of Transistor in CB configuration 1 4 Input and Output characteristics of Transistor in CE configuration 1 5 Input and Output characteristics of Transistor in CC configuration 1 6 Relation between α, β, γ and Typical transistor junction voltage values, Applications of BJT 1 Total 6
  • 161.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 146 TRANSISTOR AND FET CHARACTERISTICS The transistor was invented in 1947 by John Bardeen, Walter Brattain and William Shockley at Bell Laboratory in America. A transistor is a semiconductor device, commonly used as an Amplifier or an electrically Controlled Switch. There are two types of transistors: 1) Unipolar Junction Transistor 2) Bipolar Junction Transistor In Unipolar transistor, the current conduction is only due to one type of carriers i.e., majority charge carriers. The current conduction in bipolar transistor is because of both the types of charge carriers i.e., holes and electrons. Hence it is called as Bipolar Junction Transistor and it is referred to as BJT. BJT is a semiconductor device in which one type of semiconductor material is sand witched between two opposite types of semiconductor i.e., an n-type semiconductor is sandwiched between two p-type semiconductors or a p-type semiconductor is sandwiched between two n-type semiconductor. Hence the BJTs are of two types. They are: 1) n-p-n Transistor 2) p-n-p Transistor The two types of BJTs are shown in the figure below. The arrow head represents the conventional current direction from p to n. Transistor has three terminals. 1) Emitter 2) Base 3) Collector Transistor has two p-n junctions. They are: 1) Emitter-Base Junction 2) Collector-Base Junction
  • 162.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 147 Emitter: Emitter is heavily doped because it is to emit the charge carriers. Base: The charge carriers emitted by the emitter should reach collector passing through the base. Hence base should be very thin and to avoid recombination, and to provide more collector current base is lightly doped. Collector: Collector has to collect the most of charge carriers emitted by the emitter. Hence the area of cross section of collector is more compared to emitter and it is moderately doped. Transistor can be operated in three regions. 1) Active region. 2) Saturation region. 3) Cut-Off region. Active Region: For the transistor to operate in active region base to emitter junction is forward biased and collector to base junction is reverse biased. Saturation Region: Transistor to be operated in saturation region if both the junctions i.e., collector to base junction and base to emitter junction are forward biased. Cut-Off Region: For the transistor to operate in cut-off region both the junctions i.e., base to emitter junction and collector to base junction are reverse biased. Transistor can be used as 1) Amplifier 2) Switch For the transistor to act as an amplifier, it should be operated in active region. For the transistor to act as a switch, it should be operated in saturation region for ON state, and cut-off region for OFF state. Transistor Operation: Working of a n-p-n transistor: The n-p-n transistor with base to emitter junction forward biased and collector base junction reverse biased is as shown in figure. As the base to emitter junction is forward biased the majority carriers emitted by the n- type emitter i.e., electrons have a tendency to flow towards the base which constitutes the emitter current IE. As the base is p-type there is chance of recombination of electrons emitted by the emitter with the holes in the p-type base. But as the base is very thin and lightly doped only few electrons emitted by the n-type emitter less than 5% combines with the holes in the p-type base, the remaining more than 95% electrons emitted by the n-type emitter cross over into the collector region constitute the collector current. The current distributions are as shown in fig IE = IB + IC
  • 163.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 148 Working of a p-n-p transistor: The p-n-p transistor with base to emitter junction is forward biased and collector to base junction reverse biased is as show in figure. As the base to emitter junction is forward biased the majority carriers emitted by the p- type emitter i.e., holes have a tendency to flow towards the base which constitutes the emitter current IE. As the base is n-type there is a chance of recombination of holes emitted by the emitter with the electrons in the n-type base. But as the base us very thin and lightly doped only few electrons less than 5% combine with the holes emitted by the p-type emitter, the remaining 95% charge carriers cross over into the collector region to constitute the collector current. The current distributions are shown in figure. IE = IB + IC Current components in a transistor: The figure below shows the various current components which flow across the forward- biased emitter junction and reverse-biased collector junction in P-N-P transistor. Figure. Current components in a transistor with forward-biased emitter and reverse-biased collector junctions. The emitter current consists of the following two parts: 1) Hole current IpE constituted by holes (holes crossing from emitter into base). 2) Electron current InE constituted by electrons (electrons crossing from base into the emitter). Therefore, Total emitter current IE = IpE (majority)+ InE (Minority) , The holes crossing the emitter base junction JE and reaching the collector base junction JC constitutes collector current IpC. Not all the holes crossing the emitter base junction JE reach collector base junction JC because some of them combine with the electrons in the n-type base.
  • 164.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 149 Since base width is very small, most of the holes cross the collector base junction JC and very few recombine, constituting the base current (IpE – IpC). When the emitter is open-circuited, IE=0, and hence IpC=0. Under this condition, the base and collector together current IC equals the reverse saturation current ICO, which consists of the following two parts: IPCO caused by holes moving across IC from N-region to P-region. InCO caused by electrons moving across IC from P-region to N-region. ICO = InCO + IpCO In general, IC = InC + IpC Thus for a P-N-P transistor, IE = IB + IC Transistor circuit configurations: Following are the three types of transistor circuit configurations: 1) Common-Base (CB) 2) Common-Emitter (CE) 3) Common-Collector (CC) Here the term „Common‟ is used to denote the transistor lead which is common to the input and output circuits. The common terminal is generally grounded. It should be remembered that regardless the circuit configuration, the emitter is always forward-biased while the collector is always reverse-biased. Fig. Common – Base configuration Fig. Common – emitter configuration Fig. Common – Collector configuration
  • 165.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 150 Common – Base (CB) configurations: In this configuration, the input signal is applied between emitter and base while the output is taken from collector and base. As base is common to input and output circuits, hence the name common-base configuration. Figure show the common-base P-N-P transistor circuit. Fig. Common – base PNP transistor amplifier. Current Amplification Factor ( ) : When no signal is applied, then the ratio of the collector current to the emitter current is called dc alpha ( dc) of a transistor. dc I C I E    ,…………… (1) (Negative sign signifies that IE flows into transistor while IC flows out of it). „ ‟ of a transistor is a measure of the quality of a transistor. Higher is the value of „ ‟, better is the transistor in the sense that collector current approaches the emitter current. By considering only magnitudes of the currents, IC =  IE and hence IB = IE - IC Therefore, IB = IE - IE = IE(1- ) …………. (2) When signal is applied, the ratio of change in collector current to the change in emitter current at constant collector-base voltage is defined as current amplification factor, dc I C I E    V V …………… (3) For all practical purposes, dc  = ac = and practical values in commercial transistors range from 0.9 to 0.99. Total Collector Current: The total collector current consists of the following two parts: i)  IE , current due to majority carriers ii) ICBO, current due to minority carriers  Total collector current IC =  IE + ICBO ………… (4) The collector current can also be expressed as IC =  (IB+IC) + ICBO (Q IE = IB + IC) (1 ) BC CBO I I I     1 1 1 I I IBC CBO                     …. (5)
  • 166.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 151 Common-Emitter (CE) configuration: In this configuration, the input signal is applied between base and emitter and the output is taken from collector and emitter. As emitter is common to input and output circuits, hence the name common emitter configuration. Figure shows the common-emitter P-N-P transistor circuit. Fig. Common-Emitter PNP transistor amplifier. Current Amplification Factor (β): When no signal is applied, then the ratio of collector current to the base current is called dc beta ( ) dc  of a transistor. I C dc IB    ………………. (1) When signal is applied, the ratio of change in collector current to the change in base current is defined as base current amplification factor. Thus, I C dc IB    V V …………..(2) From equation (1), I IBC  Almost in all transistors, the base current is less than 5% of the emitter current. Due to this fact, „β‟ ranges from 20 to 500. Hence this configuration is frequently used when appreciable current gain as well as voltage gain is required. Total Collector Current: , The Total collector current IC =  IB + ICEO ………… (3) Where ICEO is the leakage current. But, we have, 1 1 1 I I IBC CBO                    ………….(4) Comparing equations (3) and (4), we get 1      and 1 1 I I CEO CBO   ...........(5) Relation between  and  : We know that I C IE   and I C IB  
  • 167.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 152 I I IE B C   (or) I I IB E C   Now 1 1 I C I IC E II I CE C IE          ……………. (6) (1 )     (or) (1 )    1      ….………… (7) It can be seen that 11 1      ……………. (8) Common – Collector (CC) Configuration: In this configuration, the input signal is applied between base and collector and the output is taken from the emitter. As collector is common to input and output circuits, hence the name common collector configuration. Figure shows the common collector PNP transistor circuit. Fig. Common collector PNP transistor amplifier. Current Amplification Factor ( ): When no signal is applied, then the ratio of emitter current to the base current is called as dc gamma ( dc) of the transistor. IE dc IB    …………… (1) When signal is applied, then the ratio of change in emitter current to the change in base current is known as current amplification factor „ ‟. IE ac IB    V V ……………..(2) This configuration provides the same current gain as common emitter circuit as I I E C V V but the voltage gain is always less than one. Total Emitter Current: We know that I I IE B C   Also IC =  IE + ICBO IE = IB + ( IE + ICBO)
  • 168.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 153 (1 )E B CBO I I I    1 1 II CBOBIE        (or) (1 ) (1 )I I IE B CBO      ……………… (3) 1 1 1          Q Relation between  and : We know that IE IB   and I C IB   Also I I IB E C   Now 1 1 1 1 IE II I CE C IE         1 1     Q ……………………. (4) Relation between  and  : We know that 1 1 1      Q From equation (4), 1 1 1      ……………………. (5) Characteristics of Common-Base Circuit: The circuit diagram for determining the static characteristic curves of an NPN transistor in the common base configuration is shown in fig. below. Fig. Circuit to determine CB static characteristics. Input Characteristics: To determine the input characteristics, the collector-base voltage VCB is kept constant at zero volts and the emitter current IE is increased from zero in suitable equal steps by increasing VEB. This is repeated for higher fixed values of VCB. A curve is drawn between emitter current IE and emitter-base voltage VEB at constant collector-base voltage VCB.
  • 169.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 154 The input characteristics thus obtained are shown in figure below. Fig. CB Input characteristics. Early effect (or) Base – Width modulation: As the collector voltage VCC is made to increase the reverse bias, the space charge width between collector and base tends to increase, with the result that the effective width of the base decreases. This dependency of base-width on collector-to-emitter voltage is known as Early effect (or) Base-Width modulation. Thus decrease in effective base width has following consequences: i. Due to Early effect, the base width reduces, there is a less chance of recombination of holes with electrons in base region and hence base current IB decreases. ii. As IB decreases, the collector current IC increases. iii. As base width reduces the emitter current IE increases for small emitter to base voltage. iv. As collector current increases, common base current gain ( ) increases. Punch Through (or) Reach Through: When reverse bias voltage increases more, the depletion region moves towards emitter junction and effective base width reduces to zero. This causes breakdown in the transistor. This condition is called “Punch Through” condition. Output Characteristics: To determine the output characteristics, the emitter current IE is kept constant at a suitable value by adjusting the emitter-base voltage VEB. Then VCB is increased in suitable equal steps and
  • 170.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 155 the collector current IC is noted for each value of IE. Now the curves of IC versus VCB are plotted for constant values of IE and the output characteristics thus obtained is shown in figure below. Fig. CB Output characteristics From the characteristics, it is seen that for a constant value of IE, IC is independent of VCB and the curves are parallel to the axis of VCB. Further, IC flows even when VCB is equal to zero. As the emitter-base junction is forward biased, the majority carriers, i.e., electrons, from the emitter are injected into the base region. Due to the action of the internal potential barrier at the reverse biased collector-base junction, they flow to the collector region and give rise to IC even when VCB is equal to zero. Transistor Parameters: The slope of the CB characteristics will give the following four transistor parameters. Since these parameters have different dimensions, they are commonly known as common base hybrid parameters (or) h-parameters. i) Input Impedance (hib): It is defined as the ratio of change in (input) emitter to base voltage to the change in (input) emitter current with the (output) collector to base voltage kept constant. Therefore, VEBh ib IE    , VCB constant It is the slope of CB input characteristics curve. The typical value of hib ranges from 20Ω to 50Ω. ii) Output Admittance (hob): It is defined as the ratio of change in the (output) collector current to the corresponding change in the (output) collector-base voltage, keeping the (input) emitter current IE constant. Therefore, I Ch ob V CB    , IE constant It is the slope of CB output characteristics IC versus VCB. The typical value of this parameter is of the order of 0.1 to 10µmhos. iii) Forward Current Gain (hfb):
  • 171.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 156 It is defined as a ratio of the change in the (output) collector current to the corresponding change in the (input) emitter current keeping the (output) collector voltage VCB constant. Hence, I Ch fb IE    , VCB constant It is the slope of IC versus IE curve. Its typical value varies from 0.9 to 1.0. iv) Reverse Voltage Gain (hrb): It is defined as a ratio of the change in the (input) emitter voltage and the corresponding change in (output) collector voltage with constant (input) emitter current, IE. Hence, VEBh rb V CB    , IE constant. It is the slope of VEB versus VCB curve. Its typical value is of the order of 10-5 to 10-4 . Characteristics of Common-Emitter Circuit: The circuit diagram for determining the static characteristic curves of the an N-P-N transistor in the common emitter configuration is shown in figure below. Fig. Circuit to determine CE Static characteristics. Input Characteristics: To determine the input characteristics, the collector to emitter voltage is kept constant at zero volts and base current is increased from zero in equal steps by increasing VBE in the circuit. The value of VBE is noted for each setting of IB. This procedure is repeated for higher fixed values of VCE, and the curves of IB versus VBE are drawn. The input characteristics thus obtained are shown in figure below.
  • 172.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 157 Fig. CE Input Characteristics. When VCE=0 , the emitter-base junction is forward biased and he junction behaves as a forward biased diode. When VCE is increased, the width of the depletion region at the reverse biased collector-base junction will increase. Hence he effective width of the base will decrease. This effect causes a decrease in the base current IB. Hence, to get the same value of IB as that for VCE=0, VBE should be increased. Therefore, the curve shifts to the right as VCE increases. Output Characteristics: To determine the output characteristics, the base current IB is kept constant at a suitable value by adjusting base-emitter voltage, VBE. The magnitude of collector-emitter voltage VCE is increased in suitable equal steps from zero and the collector current IC is noted for each setting of VCE. Now the curves of IC versus VCE are plotted for different constant values of IB. The output characteristics thus obtained are shown in figure below. Fig. CE Output characteristics The output characteristics of common emitter configuration consist of three regions: Active, Saturation and Cut-off regions. Active Region: The region where the curves are approximately horizontal is the “Active” region of the CE configuration. In the active region, the collector junction is reverse biased. As VCE is increased, reverse bias increase. This causes depletion region to spread more in base than in collector, reducing the
  • 173.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 158 changes of recombination in the base. This increase the value of dc . This Early effect causes collector current to rise more sharply with increasing VCE in the active region of output characteristics of CE transistor. Saturation Region: If VCE is reduced to a small value such as 0.2V, then collector-base junction becomes forward biased, since the emitter-base junction is already forward biased by 0.7V. The input junction in CE configuration is base to emitter junction, which is always forward biased to operate transistor in active region. Thus input characteristics of CE configuration are similar to forward characteristics of p-n junction diode. When both the junctions are forwards biased, the transistor operates in the saturation region, which is indicated on the output characteristics. The saturation value of VCE, designated ( )VCE Sat , usually ranges between 0.1V to 0.3V. Cut-Off Region: When the input base current is made equal to zero, the collector current is the reverse leakage current ICEO. Accordingly, in order to cut off the transistor, it is not enough to reduce IB=0. Instead, it is necessary to reverse bias the emitter junction slightly. We shall define cut off as the condition where the collector current is equal to the reverse saturation current ICO and the emitter current is zero. Transistor Parameters: The slope of the CE characteristics will give the following four transistor parameters. Since these parameters have different dimensions, they are commonly known as Common emitter hybrid parameters (or) h-parameters. i) Input Impedance (hib): It is defined as the ratio of change in (input) base voltage to the change in (input) base current with the (output) collector voltage (VCE), kept constant. Therefore, VBEhie IB    , ∆VCE constant It is the slope of CB input characteristics IB versus VBE. The typical value of hie ranges from 500Ω to 2000Ω. ii) Output Admittance (hoe): It is defined as the ratio of change in the (output) collector current to the corresponding change in the (output) collector voltage. With the (input) base current IB kept constant. Therefore, I Choe V CE    , IB constant It is the slope of CE output characteristics IC versus VCE. The typical value of this parameter is of the order of 0.1 to 10µmhos. iii) Forward Current Gain (hfe): It is defined as a ratio of the change in the (output) collector current to the corresponding change in the (input) base current keeping the (output) collector voltage VCE constant. Hence,
  • 174.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 159 I Ch fe IB    , VCE constant It is the slope of IC versus IB curve. Its typical value varies from 20 to 200. iv) Reverse Voltage Gain (hre): It is defined as a ratio of the change in the (input) base voltage and the corresponding change in (output) collector voltage with constant (input) base current, IB. Hence, VBEhre V CE    , IE constant. It is the slope of VBE versus VCE curve. Its typical value is of the order of 10-5 to 10-4 . Characteristics of common collector circuit: The circuit diagram for determining the static characteristics of an N-P-N transistor in the common collector configuration is shown in fig. below. Fig. Circuit to determine CC static characteristics. Input Characteristics: To determine the input characteristic, VEC is kept at a suitable fixed value. The base- collector voltage VBC is increased in equal steps and the corresponding increase in IB is noted. This is repeated for different fixed values of VEC. Plots of VBC versus IB for different values of VEC shown in figure are the input characteristics.
  • 175.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 160 Fig. CC Input Characteristics. Output Characteristics: The output characteristics shown in figure below are the same as those of the common emitter configuration. Fig. CC output characteristics. Comparison: Table: A comparison of CB, CE and CC configurations Property CB CE CC Input Resistance Low (About 100Ω) Moderate (About 750Ω) High (About 750kΩ) Output Resistance High (About 450kΩ) Moderate (About 45kΩ) Low (About 25Ω) Current Gain 1 High High Voltage Gain About 150 About 500 Less than 1
  • 176.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 161 Phase Shift between input and output voltages 0o (or) 360o 180o 0o (or) 360o Applications For high frequency circuits For Audio frequency circuits For impedance matching Problem: 1 A Germanium transistor used in a complementary symmetry amplifier has ICBO=10µA at 27o C and hfe=50. (a) find IC when IB=0.25mA and (b) Assuming hfe does not increase with temperature; find the value of new collector current, if the transistor‟s temperature rises to 50o C. Solution: Given data: ICBO = 10µA and hfe (=β) = 50 a) IC = βIB+(1+β)ICBO = 50x(0.25x10-3 )+(1+50)x(10x10-6 )A =13.01mA b) I‟CBO (β=50) = ICBO x 2(T 2 -T 1 )/10 = 10 X 2(50-27)/10 = 10 x 22.3 µA = 49.2µA IC at 50o C is IC= βIB+(1+β)I‟CBO = 50x(0.25x10-3 )+(1+50)x(49.2x10-6 ) =15.01 mA
  • 177.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 145 UNIT-IV FET CHARACTERISTICS SYLLABUS: FIELD EFFECT TRANSISTORS: Junction Field Effect Transistor (JFET) - principle of operation, volt ampere characteristics, advantages of JFET over BJT, Introduction to MOSFETs - depletion and enhancement type MOSFETs, operation and volt-ampere characteristics. LECTURE PLAN S. No. Topic to be covered Periods required 1 Construction of JFET, Principle of operation of JFET(Both n-channel and p-channel) 2 2 Small signal model of JFET 1 3 MOSFET Construction, Operation and Characteristics of Enhancement and Depletion Modes. 2 4 Introduction to SCR 1 5 Introduction to UJT 1 6 Problems 1 Total 8
  • 178.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 146 FIELD EFFECT TRANSISTOR Introduction: The filed effect transistor (abbreviated as FET) is a three terminal uni-polar semiconductor device in which current is controlled by an electric field. As current conduction is only by majority carriers, FET is said to be a uni-polar device. Based on the construction, the FET can be classified into two types as: a) Junction Field Effect Transistor (JFET) b) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or Insulated Gate Field Effect Transistor (IGFET) Depending upon the majority carriers, JFET has been classified into two types, namely, (1) N-Channel JFET with electrons as the majority carriers, and (2) P-Channel JFET with holes as the majority carriers. Construction of N-Channel JFET: It consists of a N-type bar which is made of Silicon. Ohmic contacts (terminals), made at the two ends of the bar, are called Source and Drain. Source (S) : This terminal is connected to the negative pole of the battery. Electronics which are the majority carriers in the N-type bar enter the bar through this terminal. Drain (D) : This terminal is connected to the positive pole of the battery. The majority carriers leave the bar through this terminal. Gate (G) : Heavily doped P-type silicon is diffused on both sides of the N-type silicon bar by which PN junctions are formed. These layers are joined together are called Gate (G). Channel : The region BC of the N-type bar between the depletion regions is called the Channel. Majority carriers move from the source to drain when a potential difference VDS is applied between the source and drain. FIG. JFET construction Structure and symbol of n-channel JFET: The structure and symbol of n-channel JFET are shown in figure below.
  • 179.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 147 The electrons enter the channel through the terminal called ‘source’ and leave through the terminal called ‘drain’. The terminals taken out from heavily doped electrodes of p-type material are called ‘gates’. Usually, these electrodes are connected together and only one terminal is taken out, which is called ‘gate. Structure and Symbol of P-Channel JFET: The structure and symbol of P-Channel JFET is shown in the figure. The device could be made of P- type bar with two N-type gates as shown in the figure. Then this will be P-Channel JFET is similar; the only difference being that in N-Channel JFET the current is carried by the electrons while in P- Channel JFET, it is carried by holes. Operation of N-Channel JFET: The operation of N-Channel JFET can be understood with the help of figure below. Fig. Operation of FET. Before considering the operation, let us consider that how the depletion layers are formed. Let us first suppose that the gate has been reverse-biased by gate battery VGG and the drain battery VDD is not connected. When VGS=0 and VDS=0: When no voltage is applied between drain and source, and gate and source, the thickness of the depletion regions round the P-N junction is uniform as shown in figure below.
  • 180.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 148 When VDS=0 and VGS is decreased from zero: In this case, the P-N junctions are reverse-biased and hence the thickness of the depletion region increases. As VGS is decreased from zero, the reverse bias voltage across the P-N junction is increased and hence, the thickness of the depletion region in the channel increases until the two depletion regions make contact with each other. In this condition, the channel is said to be cut-off. The value of VGS which is required to cut-off the channel is called the cut-off voltage VC. When VGS=0 and VDS is increased from zero: Drain is positive with respect to the source. Now the majority carriers (electrons) flow through the N-Channel from source to drain. Therefore the conventional current ID flows from drain to source. The magnitude of the current will depend upon the following factors: 1. The conductivity of the channel. 2. The length of the channel. 3. The cross sectional area ‘A’ of the channel. 4. The magnitude of the applied voltage VDS. Thus the channel acts as a resistor of resistance ‘R’ is given by, L R = A  DS DS D V AV I = = R ρL Where ‘ρ’ is the resistivity of the channel. As VDS increases, the reverse voltage across the P-N junction increase and hence the thickness of the depletion region also increases. Therefore, the channel is wedge shaped as shown in fig. below. As VDS is increase, at a certain value VP of VDS, the cross sectional area of the channel becomes minimum. At this voltage, the channel is said to be pinched off and the drain voltage VP is called the pinch-off voltage. As a result of the decreasing cross-section of the channel with the increase of VDS, the following results are obtained. Fig. Drain characteristics.
  • 181.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 149 i) As VDS is increased from zero, ID increases linearly along OP, this region from VDS=0 to VDS=VP is called the ohmic region. In this region, the FET acts as a voltage variable resistor (VVR) or voltage dependent resistor (VDR). ii) When VDS=VP, ID becomes maximum. When VDS is increased beyond VP, the length of the pinch-off (or) saturation region increases. Hence, there is no further increase of ID. iii) At a certain voltage corresponding to the point B, ID suddenly increases. This effect is due to the Avalanche multiplication of electrons caused by breaking of covalent bonds of silicon atoms in the depletion region between the gate and the drain. The drain voltage at which the breakdown occurs is denoted by BVDGO. When VGS is negative and VDS is increased: When the gate is maintained at a negative voltage less than the negative cut-off voltage, the reverse voltage across the junction is further increased. Hence for a negative value of VGS, the curve of ID versus VDS is similar to that for VGS=0, but the values of VP and BVDGO are lower. The drain current ID is controlled by the electric field that extends into the channel due to reverse biased voltage applied to the gate, hence, this device has been given the name Field Effect Transistor. Characteristics Parameters of the JFET: In a JFET, the drain current ID depends upon the drain voltage VDS and the gate voltage VGS. Any one of these variables may be fixed and the relation between the other two is determined. These relations are determined by the three parameters which defined below. 1) Mutual Conductance (or) transconductance, gm: It is the slope of the transfer characteristic curves, and is defined by, DS IDgm VDS V         = ID VGS   , VDS held constant 2) Drain resistance, rd : It is the reciprocal of the slope of the drain characteristics and is defined as, GS VDSr d ID V        = VDS ID   , VGS held constant The reciprocal of rd is called the drain conductance. It is denoted gd (or) gm. 3) Amplification Factor, µ: It is defined by, D V DS VGS I           = V DS V GS    , ID held constant. Relationship among FET parameters: As ID on VDS and VGS, the functional equation can be expressed as ID = f (VDS, VGS) D GS DS I ID DI V V DS GSV VDS GSV V                      
  • 182.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 150 D GS DS VI II DSD D V V V VGS DS GS GSV V                              If ID is constant, then DI VGS   =0 Therefore, we have 0 GS DS VI IDSD D V V VDS GS GSV V                             1 0 ( ) gmr d              Hence, r gmd    g rm d   Expression for Saturation Drain Current: 2 1 GS DS DSS P V I I V           IDS = saturation Drain Current. IDSS = the value of IDS when VGS=0. VP = the pinch-off voltage. Comparison of JEFT and BJT 1. FET operation depends only on the flow of majority carriers – holes for p-channel FET’s and electrons for N-channel FET’s. Therefore, they are called Uni-Polar devices. Bipolar transistor (BJT) operation depends on both minority and majority current devices. 2. As FET has no junctions and the conduction is through an N-type (or) P-type semiconductor material, FET is less noisy than BJT. 3. As the input circuit of FET is reverse biased, FET exhibits a much higher input impedance (in the order of 100MΩ) and lower output impedance and there will be a high degree of isolation between input and output. So, FET can acts as an excellent buffer amplifier but the BJT has low input impedance because its input circuit is forwards biased. 4. FET is a voltage controlled device, i.e., voltage at the input terminal controls the output current, whereas BJT is a current controlled device, i.e., the input current controls the output current. 5. FET’s are much easier to fabricate and are particularly suitable for IC’s because they occupy less space than BJT’s. 6. The performance of BJT is degraded by neutron radiation because of the reduction in minority-carrier life time, whereas FET can tolerate a much higher level of radiation since they do not rely on minority carriers for their operation. 7. The performance of FET is relatively unaffected by ambient temperature changes. As it has a negative temperature co-efficient at high current levels, it prevents the FET from thermal breakdown. The BJT has a positive temperature co-efficient at high current levels which leads to thermal breakdown.
  • 183.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 151 8. Since FET does not suffer from minority carrier storage effects, it has higher switching speeds and cut-off frequencies. BJT suffers from minority carrier storage effects and therefore has lower switching speed and cut-off frequencies. 9. FET amplifiers have low gain bandwidth product due to the junction capacitive effects and produce more signal distortion except for small signal operation. 10. BJT‘s are cheaper to produce than FET’s. Comparison of N-channel with P-Channel FET’s 1. In an N-channel JFET the current carriers are electrons, whereas the current carriers are holes in a P-channel JFET. 2. Mobility of electrons is large in N-channel JFET, mobility of holes is poor in P-channel JFET. 3. The input noise is less in N-channel JFET than that of P-channel JFET. 4. The transconductance is larger in N-channel JFET than that of P-channel JFET. Applications of JFET 1. FET is used as a buffer in measuring instruments, receivers since it has high input impedance and low output impedance. 2. FET’s are used in Radio Frequency amplifiers in FM (Frequency Mode) tuners and communication equipment for the low noise level. 3. Since the input capacitance is low, FET’s are used in cascade amplifiers in measuring and test equipments. 4. Since the device is voltage controlled, it is used as voltage variable resistor in operational amplifiers and tone controls 5. FET’s are used in mixer circuits in FM and TV receivers, and communication equipments because inter modulation distortion is low. 6. It is used in oscillator circuits because frequency drift is low. 7. As the coupling capacitor is small, FET’s are used in low frequency amplifiers in hearing aids and inductive transducers. 8. FET’s are used in digital circuits in computers, LSD and a memory circuit because of it is small size. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) MOSFET is the common term for the Insulated Gate Field Effect Transistor (IGFET). There are two basic forms of MOSFET, they are: i) Enhancement MOSFET and ii) Depletion MOSFET Principle: By applying a transverse electric field across an insulator, deposited on the semi conducting material, the thickness and hence the resistance of conducting channel of a semi conducting material can be controlled. In depletion MOSFET, the controlling electric field reduces the number of majority carriers available for conduction, whereas in the enhancement MOSFET, application of electric field causes an increase in the majority carrier density in the conducting regions of the transistor. Enhancement MOSFET Construction: The construction of an N-channel enhancement MOSFET is shown in figure (a) below and the circuit symbols for an N-Channel and a P-channel enhancement MOSFET are shown in figures (b) and (c) respectively. As there is no continuous channel in an enhancement MOSFET, this condition is represented by the broken line in the symbols.
  • 184.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 152 (a) (b) N-Channel (c) P-Channel Fig. (a) N-Channel Enhancement MOSFET (b) and (c) Circuit symbols for enhancement MOSFET Two highly doped N+ regions are diffused in a lightly doped substrate of p-type silicon. One N+ region is called the source S and the other one is called the drain D. They are separated by 1 milli (10-3 inch). A thin insulating layer of SiO2 is grown over the surface of the structure and holes are cut into the oxide layer, allowing contact with source and drain. Then a thin layer of metal aluminum is formed over the layer of SiO2. Thus metal layer covers the entire channel region and it forms the gate G. The metal area of the gate, in conjunction with the insulating oxide layer of SiO2 and the semi conductor channel forms a parallel plate capacitor. This device is called the insulated gate FET because of the insulating layer of SiO2. This layer gives extremely high input impedance for the MOSFET. Operation: If the substrate is grounded and a positive voltage is applied at the gate, the positive charge on G induces an equal negative charge on the substrate side between the sourced drain regions. Thus, an electric field is produced between the source and drain regions. The direction of the electric field is perpendicular to the plates of the capacitor through the oxide. . The negative charge of electrons which are minority carriers in the p-type substrate forms an inversion layer. As the positive voltage on the gate increases, the induced negative charge in the semi conductor increases. Hence, the conductivity increases and current flows from source to drain through the induced channel. Thus the drain current is enhanced by the positive gate voltage as shown in figure below.
  • 185.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 153 (b) (a) Fig V-I (or) drain characteristics of MOSFET. (a) n-channel enhancement MOSFET (b) p-channel enhancement MOSFET (c) (d) Fig Transfer characteristics of MOSFET. (a) n-channel enhancement MOSFET (b) p-channel enhancement MOSFET Depletion MOSFET: Construction: The construction of an N-channel where an N-channel is diffused between the source and drain to the basic structure of MOSFET. The circuit symbols for an N-channel and P-channel depletion MOSFET are shown in figure (b) and (c) respectively.
  • 186.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 154 Fig (a) N-channel depletion MOSFET. (b) and (b) N-channel & P-channel circuit symbols. When VGS=0 and the drain D at a positive potential with respect to the source, the electrons (majority carriers) flow through the n-channel from source to drain. Therefore, the conventional current ID flows through the channel from drain to source. If gate voltage is made negative, positive charge consisting of holes is induced in the channel through SiO2 of the gate-channel capacitor. The introduction of the positive charge causes depletion of mobile electrons in the channel. Thus a depletion region is produced in the channel. The shape of the depletion region depends on VGS and VDS. Hence the channel will be wedge shaped as shown in figure. When VDS is increased, ID increases and it becomes practically constant at a certain value of VDS, called the pinch-off voltage. The drain current ID almost gets saturated beyond the pinch- off voltage. The depletion MOSFET may also be operated in an enhancement mode: It is only necessary to apply a positive gate voltage so that negative charges are induced into the n-type channel. Hence, the conductivity of the channel increases and ID increases. As the depletion MOSFET can be operated with bipolar input signals irrespective of doping of the channel, it is also called as dual mode MOSFET. Fig: Drain characteristics of MOSFET. (a) n-channel depletion MOSFET (b) p-channel depletion MOSFET
  • 187.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 155 Fig: Transfer characteristics of MOSFET. (a) n-channel depletion MOSFET (b) p-channel depletion MOSFET Comparison of MOSFET with JFET i) In enhancement and depletion types of MOSFET, the transverse electric field induced across an insulating layer deposited on the semi conductor material controls the conductivity of the channel. In the JFET the transverse electric field across the reverse biased PN-junction controls the conductivity of the channel. ii) The gate leakage current in a MOSFET is of the order of 10-12 A. Hence the input resistance of a MOSFET is very high in the order of 1010 to 1015 Ω. The gate leakage current of a JFET is of the order of 10-9 A and its input resistance is of the order of 108 Ω. iii) The output characteristics of the JFET are flatter than those of the MOSFET and hence, the drain resistance of a JFET (0.1 to 1MΩ) is much higher than that of a MOSFET (1 to 50KΩ). iv) JFET’s are operated only in the depletion mode. The depletion type MOSFET may be operated in both depletion and enhancement mode. v) Comparing to JFET, MOSFET’s are easier to fabricate. vi) MOSFET is very susceptible to over load voltage and needs special handling during installation. It gets damaged easily if it is not properly handled. vii) MOSFET has zero off set voltage. As it is a symmetrical device, the source and drain can be interchanged. These two properties are very useful in analog signal switching. viii) Special digital CMOS circuits are available which involve near-zero power dissipation and very low voltage and current requirements. This makes them most suitable for portable systems. MOSFET’s are widely used in digital VLSI circuits than JFET’s because of their advantage. Comparison of N-channel with P-channel MOSFET’s: 1. The p-channel enhancement MOSFET is very popular because it is much easier and cheaper to produce than the n-channel device. 2. The hole mobility is nearly 2.5 times lowe than the electron mobility. Thus, a p-channel MOSFET occupies a larger area than an n-channel MOSFET having the same ID rating. 3. The drain resistance of p-channel MOSFET is three times higher than that for an identical n- channel MOSFET. 4. The n-channel MOSFET has the higher packing density which makes it faster in switching applications due to the smaller junction areas and lower inherent capacitances. 5. The n-channel MOSFET is smaller for the same complexity than p-channel device. 6. Due to the positively charged contaminants, the n-channel MOSFET may turn ON prematurely. Whereas p-channel device will not be affected.
  • 188.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 156 UNIJUNCTION TRANSISTOR: Uni Junction Transistor (UJT) is a three terminal semi conductor switching device. As it has only one PN junction and three leads, it is commonly called as Uni Junction Transistor. The three terminals are: Emitter (E), Base1 (B1) and Base2 (B2). Construction and Symbol: The basic structure and symbol of UJT is shown in figure below. It consists of a lightly doped n-type silicon bar with a heavily doped p-type material alloyed to its one side closer to B2 for producing single PN junction. Fig. UJT (a) Basic structure (b) Circuit symbol Here the emitter leg is drawn at an angle to the vertical and the arrow indicates the direction of the conventional current. Operation of UJT: The inter base resistance between B2 and B1 of the silicon bar is, RBB=RB1+ RB2. With emitter terminal open, if voltage VBB is applied between the two bases, a voltage gradient is established along the n-type bar. The voltage drop across RB1 is given by 1V VBB , where the intrinsic stand-off ratio 1 1 2 R B R RB B    . The typical value of  ranges from 0.56 to 0.75. This voltage V1 reverse biases the PN-junction and emitter current is cut-off. But a small leakage current flows from B2 to emitter due to minority carriers. The equivalent circuit of UJT is shown in figure below. Fig. UJT equivalent circuit.
  • 189.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 157 If a negative voltage is applied to the emitter, PN-junction remains reverse biased and the emitter current is cut-of. The device is now in the ‘OFF’ state. If a positive voltage VE is applied to the emitter, the PN-junction will remain reverse biased so long as VE is less than V1. If VE exceeds V1 by the cut-in voltage vγ, the diode becomes forward biased. Under this condition, holes are injected into n-type bar. These holes are repelled by the terminal B2 and are attracted by the terminal B1. Accumulations of holes in E to B1 region reduce the resistance in this section and hence emitter current IE is increased and is limited by VE. The device is now in the ‘ON’ state. Characteristics of UJT: Figure below shows the input characteristics of UJT. Here, up to the peak point P, the diode is reverse biased and hence, the region to the left of the peak point is called cut-off region. At P, the peak voltage V V VP BB   , the diode starts conducting and holes are injected into n-layer. Hence, resistance decreases thereby decreasing VE for the increase in IE. SO there is a negative resistance region from peak point P to valley point V. After the valley point, the device is driven into saturation and behaves like a conventional forward biased PN-junction diode. The region to the right of the valley point is called saturation region. In the valley point, the resistance is changes from negative to positive. The resistance remains positive in the saturation region. Due to the negative resistance property, a UJT can be employed in a variety of applications, viz., a saw-tooth wave generator, pulse generator, switching, timing and phase control circuits. UJT Relaxation Oscillator: The Relaxation oscillator using UJT which is meant for generating saw-tooth waveform is shown in figure below: Fig: UJT Relaxation Oscillator.
  • 190.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 158 It consists of a UJT and a capacitor CE which is charged through RE as the supply voltage VBB is switched ON. The voltage across the capacitor increases exponentially and when the capacitor voltage reach the peak point voltage VP, the UJT starts conducting and the capacitor voltage is discharged rapidly through EB1 and R1. After the peak point voltage of UJT is reached, it provides negative resistance to the discharge path which is useful in the working of the relaxation oscillator. As the capacitor voltage reaches zero, the device then cuts off and capacitor CE starts to charge again. This cycle is repeated continuously generating a saw-tooth waveform across CE. The inclusion of external resistors R2 and R1 in series with B2 and B1 provides spike waveforms. When the UJT fires, the sudden surge of current through B1 causes drop across R1, which provides positive going spikes. Also, at the time of firing, fall of VEB1 causes I2 to increase rapidly which generates negative going spikes across R2. By changing the values of capacitance CE (or) resistance RE, frequency of the output waveform can be changed as desired, since these values control the time constant RECE of the capacitor changing circuit. Frequency of oscillations: The time period and hence the frequency of the saw-tooth wave can be calculated as follows. Assuming that the capacitor is initially uncharged, the voltage VC across the capacitor prior to breakdown is given by / 1 t R C E EV V eBBC           Where RECE = charging time constant of resistor-capacitor circuit, and t= time from the commencement of the waveform. The discharge of the capacitor occurs when VC is equal to the peak-point voltage VP, i.e,
  • 191.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 159 / 1 t R C E EV V V eP BB BB            / 1 t R C E Ee     / 1 t R C E Ee     1 log 1 t R C eE E           1 2.303 log 10 1 R CE E          If the discharge time of the capacitor is neglected, then t=T, the period of the wave. Therefore, frequency of oscillations of saw-tooth wave, 1 1 1 2.3 log 10 1 f T R CE E           SCR (SILICON CONTROLLED RECTIFIER) The basic structure and circuit symbol of SCR is shown in figure below. It is a four layer three terminal device in which the end p-layer acts as anode, the end n- layer acts as anode, the end n-layer acts as cathode and p-layer nearer to cathode acts as gate. As leakage current in silicon is very small compared to germanium, SCR’s are made of silicon and not germanium. (a) Basic Structure (b) Circuit symbol Fig, Basic structure and circuit symbol of SCR.
  • 192.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 160 Operation of SCR: The operation of SCR is divided into two categories, i) When gate is open: Consider that the anode is positive with respect to cathode and gate is open. The junctions J1 and J3 are forward biased and junctions J2 is reverse biased. There is depletion region around J2 and only leakage current flows which is negligibly small. Practically the SCR is said to be ‘OFF’. This is called forward blocking state of SCR and voltage applied to anode and cathode with anode positive is called forward voltage. This is shown in figure (a) below. (a) J1, J3 Forward biased. J2 Reverse biased. With gate open, if cathode is made positive with respect to anode, the junctions J1, J3 become reverse biased and J2 forward biased. Still the current flowing is leakage current, which can be neglected as it is very small. The voltage applied to make cathode positive is called reverse voltage and SCR is said to be in reverse blocking state. This is shown in the figure (b) below. (a) J1, J3 Reverse biased. J2 Forward biased. Fig. Operation of SCR when gate is open (a), (b).
  • 193.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 161 2. When gate is closed: Consider that the voltage is applied between gate and cathode when the SCR is in forward blocking state. The gate is made positive with respect to the cathode. The electrons from n-type cathode, which are majority in number, cross the junction J3 to reach to positive of battery. While holes from p-type move towards the negative of battery. This constitutes the gate current. This current increases the anode current as some of the electrons cross junction J2. As anode current increases, more electrons cross the junction J2 and the anode current further increases. Due to regenerative action, within short time, the junction J2 breaks and SCR conducts heavily. The connections are shown in the figure. The resistance R is required to limit the current. Once the SCR conducts, the gate loses its control. Fig. Operation of SCR when gate is closed. Characteristics of SCR: The characteristics are divided into two sections: i) Forward characteristics ii) Reverse characteristics i) Forward characteristics: It shows a forward blocking region, when IG=0. It also shows that when forward voltage increases up to VBO, the SCR turns ON and high current results. It also shows that, if gate bias is used then as gate current increases, less voltage is required to turn ON the SCR. If the forward current falls below the level of the holding current IH, then depletion region begins to develop around J2 and device goes into the forward blocking region. When SCR is turned on from OFF state, the resulting forward current is called latching current IL. The latching current is slightly higher than the holding current ii) Reverse characteristics: If the anode to cathode voltage is reversed, then the device enters into the reverse blocking region. The current is negligibly small and practically neglected. If the reverse voltage is increases, similar to the diode, at a particular value avalanche breakdown occurs and a large current flows through the device. This is called reverse breakdown and the voltage at which this happens is called reverse breakdown voltage
  • 194.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 162 Fig. Characteristics of SCR. Two Transistor Analogy: The easiest way to understand how SCR works it ot visualize it separately into two halves, as shown in the figure. The left half is a p-n-p transistor and right half is n-p-n transistor. This is also called two transistor model of SCR. The collector current of T1 becomes base current of T2 and collector current of T2 becomes base current of T1. Fig, Two transistor model of SCR. Mathematical Analysis: Let IC1 and IC2 are collector currents, IE1 and IE2 are emitter currents while IB1 and IB2 are base currents of transistors T1 and T2.
  • 195.
    Department of Electronicsand Communication Engineering UNIT-IV -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 163 Let both the transistors are operating in active region. From transistor analysis we can write, 1 1 1 I IE I C CO   and 2 2 2 I IE I C CO   Where ICO = Reverse current (or) leakage current. And 1      Now, IE2 = IC2 + IB2 IA = Anode current = IE1 IK = Cathode current = IE2 IG = Gate current Now, IK = IA + IG 2 2 2 I I I I I E A G C B      But IB2 = IC1 + IG 2 1 I I I I I A G C C G      Substituting IC1 and IC2, 1 1 1 2 2 2 I IE I IE I A CO CO        2 1 1 2 I I I I I I A A G A CO CO        2 1 2 1 2 I I I I I I A A A G CO CO           2 1 2 1 21 G CO COI I I I A          In blocking state 1 and 2 are small. Thus IA is small. As 1 2  approaches unit, the SCR is ready to enter into conduction. Thus due to positive gate current, the regenerative action takes place and SCR conducts.
  • 196.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 179 UNIT-V BIASING AND STABILISATION SYLLABUS: BJT BIASING: Need for biasing, operating point, load line analysis, bias stabilization techniques: fixed bias, collector to base bias, self-bias, stabilization against variations in Ico, VBE and  for the self bias circuit, bias compensation techniques, thermal runaway and thermal stability. FET BIASING: Biasing techniques: fixed bias, source self-bias, voltage divider bias. LECTURE PLAN S. No. Topic to be covered Periods required 1 Introduction to Biasing, Operating Point, DC Equivalent Model, Criterion for fixing operating point. 2 2 Fixed Bias, Analysis and related problems 1 3 Collector to Base Bias, Analysis and related problems 1 4 Self Bias, Analysis and related problems 1 5 Calculation of Stabilization factors s, s', s" 1 6 Compensation techniques against variation in Vbe, Ico.Thermal runaway and thermal stability. 1 7 Related Problems 1 Total 08
  • 197.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 180 UNIT-V BIASING & STABILIZATION Introduction: The basic function transistor is to do amplification. The process of raising the strength of a weak signal without any change in its shape is known as faithful amplification. For faithful amplification, the following three conditions must be satisfied: i) The emitter-base junction should be forward biased, ii) The collector-base junction should be reverse biased. iii) Three should be proper zero signal collector current. The proper flow of zero signal collector current (proper operating point of a transistor) and the maintenance of proper collector-emitter voltage during the passage of signal is known as „transistor biasing‟. When a transistor is not properly biased, it work inefficiently and produces distortion in the output signal. Hence a transistor is to be biased correctly. A transistor is biased either with the help of battery (or) associating a circuit with the transistor. The latter method is generally employed. The circuit used with the transistor is known as biasing circuit. In order to produce distortion-free output in amplifier circuits, the supply voltages and resistances in the circuit must be suitably chose. These voltages and resistances establish a set of d.c. voltage VCEQ and current ICQ to operate the transistor in the active region. These voltages and currents are called quiescent values which determine the operating point (or) Q-Point for the transistor. The process of giving proper supply voltages and resistances for obtaining the desired Q- Point is called biasing. DC Load Line: Consider common emitter configuration circuit shown in figure below: In transistor circuit analysis generally it is required to determine the value of IC for any desired value of VCE. From the load line method, we can determine the value of IC for any desired value of VCE. The output characteristics of CE configuration is shown in figure below:
  • 198.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 181 By applying KVL to the collector circuit 0V I R VC C C CE    V I R V CC C C CE    V V I R CE CC C C    If the bias voltage VBB is such that the transistor is not conducting then IC=0 and VCE= VCC. Therefore, when IC=0, VCE= VCC this point is plotted on the output characteristics as point A. If VCE=0 then 0 V I R CC C C   VCCIC RC   Therefore, VCE=0, VCCIC RC  this point is plotted on the output characteristics as point B. The line drawn through these points is straight line „d.c load line‟. The d.c. load line is plot of IC versus VCE for a given value of RC and a given level of VCC. Hence from the load line we can determine the IC for any desired value of VCE. Operating Point (or) Quiescent Point: In designing a circuit, a point on the load line is selected as the dc bias point (or) quiescent point. The Q-Point specifies the collector current IC and collector to emitter voltage VCE that exists when no input signal is applied. The dc bias point (or) quiescent point is the point on the load line which represents the current in a transistor and the voltage across it when no signal is applied. The zero signal values of IC ad VCE are known as the operating point. Biasing: The process of giving proper supply voltages and resistances for obtaining the desired Q- point is called „biasing‟. How to choose the operating point on DC load line: The transistor acts as an amplifier when it is operated in active region. After the d.c. conditions are established in the circuit, when an a.c. signal is applied to the input, the base current varies according to te amplitude of the signal and causes IC to vary consequently producing an output voltage variation. This can be seen from output characterizes. Fig. Operating point near saturation region gives clipping at the positive peak.
  • 199.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 182 Consider point A which is very near to the saturation point, even though the base current is varying sinusoidally the output current and output voltage is seen to be clipped at the positive peaks. This results in distortion of the signal. Consider point B which is very near to the cut-off region. The output signal is now clipped at the negative peak. Hence this two is not a suitable operating point. Fig. Operating point near cut-off region given clipping at the negative peak. Consider point C which is the mid point of the DC load line then the output signal will not be distorted. Fig. Operating point at the centre of active region is most suitable. A good amplifier amplifies signals without introducing distortion. Thus always the operating point is chosen as the mid point of the DC load line. Stabilization: The maintenance of operating point stable is known as „Stabilization’. There are two factors which are responsible for shifting the operating point. They are: i) The transistor parameters are temperature dependent. ii) When a transistor is replaced by another of same type, there is a wide spread in the values of transistor parameters. So, stabilization of the operating point is necessary due to the following reasons: i) Temperature dependence of IC. ii) Individual variations and iii) Thermal runaway.
  • 200.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 183 Temperature dependence of IC: The instability of IC is principally caused by the following three sources: i) The ICO doubles for every 10o C rise in temperature. ii) Increase of β with increase of temperature. iii) The VBE decreases about 2.5mV per o C increase in temperature. Individual variations: When a transistor is replaced by another transistor of the same type, the values of β and VBE are not exactly the same. Hence the operating point is changed. So it is necessary to stabilize the operating point irrespective of individual variations in transistors parameters. Thermal Runaway: Depending upon the construction of a transistor, the collector junction can withstand maximum temperature. The range of temperature lies between 60o C to 100o C for „Ge‟ transistor and 150o C to 225o C for „Si‟ transistor. If the temperature increases beyond this range then the transistor burns out. The increase in the collector junction temperature is due to thermal runaway. When a collector current flows in a transistor, it is heated i.e., its temperature increases. If no stabilization is done, the collector leakage current also increases. This further increases the transistor temperature. Consequently, there is a further increase in collector leakage current. The action becomes cumulative and the transistor may ultimately burn out. The self-destruction of an unstabilized transistor is known as thermal runaway. The following two techniques are used for stabilization. 1) Stabilization techniques: The technique consists in the use of a resistive biasing circuit which permits such a variation of base current IB as to maintain IC almost constant in spite of ICO, β and VBE. 2) Compensation techniques: In this technique, temperature sensitive devices such as diodes, thermistors and sensistors etc., are used. Such devices produce compensating voltages and current in such a way that the operating points maintained stable. Stability factors: Since there are three variables which are temperature dependent, we can define three stability factors as below: i) S: The stability factor „S‟ is defined as the ration of change of collector current IC with respect to the reverse saturation current ICO, keeping β and VBE constant i.e., I I C CS I I CO CO       VBE, β constant ii) S’: The stability factor S‟ is defined as the rate of change of IC with respect to VBE, keeping ICO and β constant i.e., ' I I C CS V VBE BE       ICO, β constant iii) S’’: The stability factor S‟‟ is defined as the rate of change of IC with respect to β, keeping ICO and VBE constant i.e., ' I I C CS         ICO, VBE constant
  • 201.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 184 Ideally, stability factor should be perfectly zero to keep operating point stable. Practically, stability factor should have the value as minimum as possible. Derivation of Stability Factor (S): For a common emitter configuration collector current is given as, I I IBC CEO    1I I IBC CO      ………….. (1) Differentiating equation (1) w.r.t. IC keeping β constant, we get  1 1 II COB I I C C          1 1 II COB I I C C          1 1 I C II BCO I C          1 1 IB I C S         ………… (2) To obtain S’ and S’’: In standard equation of IC, replace IB in terms of VBE to get S‟. Differentiating equation of IC w.r.t. β after replacing IB in terms of VBE to get S‟‟. Methods of Biasing: Some of the methods used for providing bias for a transistor are as follows: 1) Fixed bias (or) base resistor method. 2) Collector to base bias (or) biasing with feedback resistor. 3) Voltage divider bias. 1). Fixed bias (or) base resistor method: A CE amplifier used fixed bias circuit is shown in figure below: Fig. Fixed bias circuit.
  • 202.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 185 In this method, a high resistance RB is connected between positive terminal of supply VCC and base of the transistor. Here the required zero signal base current flows through RB and is provided by VCC. In figure, the base-emitter junction is forward biased because the base is positive w.r.t. emitter. By a proper selection of RB, the required zero signal base current (and hence IC=βIB) can be made to flow. Circuit Analysis: Base Circuit: Consider the base-emitter circuit loop of the above figure. Writing KVL to the loop, we obtain 0V I R VB B BECC    V I R VB B BECC   V VBECCIB RB    But I I IBC CEO  As ICEO is very small, I IBC  V VBECCIC RB              β, VCC, VBE are constant for a transistor  IC depends on RB. Choose suitable value of RB to get constant IC in active region.  V VBECC RB IC    (or) VCCRB IC    V VBE CCQ Collector Circuit: Consider the collector-emitter circuit loop of the circuit. Writing KVL to the collector circuit, we get 0V I R VB BCC CE    V V I RCE CC C C   Stability factor S: The stability factor S is given by, 1 1 IB I C S        We have V VBECCIB RB   = constant 0 IB IC     1S   
  • 203.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 186 If β=100 then S=101. This shows that IC changes 101 times as much as any changes in ICO. Thus IC is dependent upon ICO and temperature. The value of S is high and has very poor stability. Stability factor S’: We have  1I I IBC CO     But V VBECCIB RB    1 V VBECCI IC CORB                Differentiating the above equation w.r.t. IC, We get 1 VBE R IB C      'S R B     Stability factor S’’: We have  1I I IBC CO     Differentiating the above equation w.r.t. β, We get IC I IB CO     '' I CS    (Q ICO is very small & ICIB   ) Problem: 1) Figure below shows a silicon transistor with β=100 and biased by base resistor method. Determine the operating point. Solution: Given VCC=10V, VBE=0.7V (Silicon transistor), β=100, RB=930kΩ. Applying KVL to base-emitter loop, V VBECCV V I R IBE B B BCC RB     
  • 204.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 187 10 0.7 100 3930 10 1 V VBECCI IBC RB mA                     Applying KVL to collector-emitter loop, V V I R V V I RCC CE C C CE CC C C      3 310 1 10 4 10 6VCE V       Operating point is (6V, 1mA) 2. For the following circuit shown in figure below, find the operating point. Solution: DC equivalent of above circuit is shown below. KVL to base-emitter loop is   0V I R V I I RB B BE B ECC C      I R I R I R V VB B B E B B BECC     1 V VBECCIB R RB E       20 0.7 3430 51 10 40.1IB A       2.01I IBC mA  KVL to collector-emitter loop is 0V I R V I RECC C C CE C      V V I R RECE CC C C    3 320 2.01 10 (2 1) 10VCE      =20-6.03 = 13.97V  Operating point is Q (13.97V, 2.01mA)
  • 205.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 188 Advantages of fixed bias circuit: 1. This is a simple circuit which uses very few components. 2. The operating point can be fixed anywhere in the active region of the characteristics by simply changing the values of RB. Thus, it provides maximum flexibility in the design. Disadvantages of fixed bias circuit: 1. With the rise in temperature the operating point if not stable. 2. When the transistor is replaced by another with different value of β, the operating point with shift i.e., the stabilization of operating point is very poor in fixed bias circuit. Because of these disadvantages, fixed bias circuit required some modifications. In the modified circuit, RB is connected between collector and base. Hence the circuit is called „collector to base‟ bias circuit. 2). Collector to Base bias (or) Biasing with feedback resistor: A CE amplifier using collector to base bias circuit is shown in the figure. In this method, the biasing resistor is connected between the collector and the base of the transistor. Fig. Collector–to–Base bias circuit. Circuit Analysis: Base Circuit: Consider the base-emitter circuit, applying the KVL to the circuit we get,   0V I I R I R VB B B BECC C C      V I R R I R VB B BECC C C C     V V I RBECC C CIB R RBC      …………….. (1) But IC = βIB  V I R VBECC C C IC R RBC       …………….. (2)
  • 206.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 189 Collector circuit: Consider the collector-emitter circuit, applying the KVL to the circuit we get   0V I I R VBCC C C CE      V V I I RBCE CC C C    ……………. (3) Stability factor S: The stability factor S is given by, 1 1 IB I C S        We have V V I RBECC C CIB R RB C     = constant Differentiating the above equation w.r.t. IC we get RI CB I R RBC C      1 1 S RC R RBC        ……………… (4) The stability factor S is smaller than the value obtained by fixed bias circuit. Also „S‟ can be made smaller by making RB small (or) RC large. Stability factor S’: We have  V V I RBECC C C IC R RBC      Differentiating the above equation w.r.t. IC, We get 1 RV CBE R R I R RB BC C C          1 R VC BE R R R R IB BC C C          R R R VBC C BE R R R R IB BC C C            ' 1 S R R B C        ………………….. (5)
  • 207.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 190 Stability factor S’’: We have  V V I RBECC C C IC R RBC      Differentiating the above equation w.r.t. β, We get I V V R IBEC CC C CICR R R RB BC C                    1 I R V V I RBEC C CC C C R R R RB BC C                    1 IC R R V V I RB BEC CC C C               '' 1 V V I RBECC C CS R RB C           '' 1 I R RBC CS R RB C       ……………… (6) Problems: 3. An N-P-N transistor with β=50 is used in a CE circuit with VCC=10V, RC=2kΩ. The bias is obtained by connecting a 100kΩ resistance from collector to base. Assume VBE=0.7V. Find i) the quiescent point and ii) Stability factor „S‟ Solution: i) Applying KVL to the base circuit,  V I I R I R VB B B BECC C C    V I R R I R VB B BECC C C C     V V I RBECC C CIB R RBC       V V I RBECC C C IC R RBC        350 10 0.7 2 10 3102 10 IC IC       2.3CI mA  Applying KVL to the collector circuit,  V I I R VBCC C C CE   V V I I RBCE CC C C    6 3 310 46 10 2.3 10 2 10        5.308V VCE  The quiescent point is (5.308V, 2.3mA)
  • 208.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 191 ii) Stability factor, S: 1 1 S RC R RBC       51 25.75 320 10 1 50 3102 10 S               4. A transistor with β=45 is used with collector to base resistor RB biasing with quiescent value of 5V for VCE. If VCC=24V, RC=10kΩ, RE=270Ω, find the value of RB. Solution: Applying KVL to collector and emitter loop, we have 0V I R V I RE ECC C C CE     V V I R I I RB ECC CE C C C      1V V R R IE BCC CE C          1 V VBECCIB R REC       24 5 45 10 50 0.27      =0.041 mA Further, 0V I R I R V I RB B BE E ECC C C      1V V R I I R R IBE B B B E BCC C       ` 24 0.7 45 10 50 0.27I RB B          23.3 450 12.420.041 RB       105.87BR K   3). Voltage Divider Bias (Or) Self-Bias (Or) Emitter Bias: The voltage divider bias circuit is shown in figure. Fig. Voltage divider bias circuit.
  • 209.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 192 In this method, the biasing is provided by three resistors R1, R2 and RE. The resistors R1 and R2 acts as a potential divider giving a fixed voltage to the base. If collector current increases due to change in temperature (or) change in β, the emitter current IE also increases and the voltage drop across RE increases, reducing the voltage difference between base and emitter (VBE). Due to reduction in VBE, base current IB and hence collector current IC is also reduces. Therefore, we can say that negative feedback exists in the emitter bias circuit. This reduction in collector current IC components for the original change in IC. Circuit Analysis: Let current flows through R1. As the base current IB is very small, the current flowing through R2 can also be taken as I. The calculation of collector current IC is as follows: The current „I‟ flowing through R1 (or) R2 is given by 1 2 VCCI R R   …………………… (1) The voltage V2 developed across R2 is given by, 2 2 1 2 VCCV R R R           ………….……. (2) Base Circuit: Applying KVL to the base circuit, we have 2V V V V I RBE E BE E E    2V V I RBE EC    I IE CQ 2V VBEIC RE    …………….. (3) Hence IC is almost independent of transistor parameters and hence good stabilization is ensured. Collector Circuit: Applying KVL to the collector circuit, we have V I R V I RE ECC C C CE   V I R V I RECC C C CE C     I IE CQ  V V I R RECE CC C C    ………………. (4) Circuit analysis using Thevenin’s Theorem: The Thevenin equivalent circuit of voltage-divider bias is as shown below:
  • 210.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 193 Fig. Simplified equivalent circuit. From above figure we have, 2 2 1 2 R V V VCCTh R R            ………………… (5) 1 2 1 2 1 2 R R R R RTh R R    P ………………… (6) Applying KVL to the base-emitter circuit, we have  V I R V I I RB BE B ECTh Th    ……………….. (7) Applying KVL to the collector-emitter circuit, we have  V V I R RECE CC C C    I IBC Q ………….…….. (8) From equation (8), we have V VCC CEIC R REC     Substituting this value of IC in equation (7), we have V VCC CEV I R V R IB BE E BTh Th R REC              (or) R V R VE ECC CEV I R V R IB BE E BTh Th R R R RE EC C        From equation (9) we can calculate the value of collector voltage VCE for each value of IB. Stability factor (S): For determining stability factor „S‟ for voltage divider bias, consider the Thevenin‟s equivalent circuit.
  • 211.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 194 Hence, Thevenin‟s equivalent voltage VTh is given by 2 1 2 R V VCCTh R R   and the R1 and R2 are replaced by RB which is the parallel combination of R1 and R2. 1 2 1 2 R R RB R R    Applying KVL to the base circuit, we get  V I R V I I RB B BE B ECTh     Differentiating w.r.t. IC and considering VBE to be independent of IC we get,  0 I IB BR R RB E EI IC C           IB R R RE B EIC       I RB E I R RE BC       We have already seen the generalized expression for stability factor „S‟ given by 1 1 S IB IC        Substituting value of IB IC   in the above equation, we get 1 1 S RE R RE B                        1 1 1 R R R RE B E BS R R R R RB E E B E                  1 1 1 RB RES RB RE                     The ratio RB RE controls value of stability factor „S‟. If 1 RB RE  then above equation reduces to   1 1 1 1 S            
  • 212.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 195 Practically 0 RB RE  But to have better stability factor „S‟, we have to keep ration RB RE as small as possible. Stability factor „S‟ for voltage divider bias (or) self bias is less as compared to other biasing circuits studied. So, this circuit is most commonly used. Stability factor (S’): Stability factor S‟ is given by ' ICS VBE    ICO, β constant It is the variation of IC with VBE when ICO and β are considered constant. We know that,  1I I IBC CO     1I IC COIB      and  V I R V I I RB B BE B ECTh      V V R R I R IBE E B B E CTh    By substituting IB in the above equation, we get    1I IC COV V R R R IBE E B E CTh                    1R R I R R IE B E BC COV R IE CTh              11 R R IR R I E BE B COCV VBE Th               Differentiating the above equation w.r.t VBE with ICO and β constant, we get  1 1 0 0 IR R CB E VBE                 1 IC V R RBE B E           1 'S R RB E        Stability Factor S’’: Stability factor S‟‟ is given by '' ICS     ICO, VBE constant We have,     11 R RR R I E BB E CV V IBE COTh                    
  • 213.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 196  1 ' R R IB E CV VTh            Where      1 ' R RE BV I R R IE BCO CO                 1 Q Therefore, we write the above equation in terms of IC, we get  1 'V V VBETh IC R RB E            Differentiating above equation w.r.t. taking V‟ independent of β, we get,      1 ' 2 1 'R R V V V V V V RI B E BE BE ETh ThC R RB E                        Multiplying numerator and denominator by (1+β) we get,           1 1 1 1 'R R V V VI B E BEThC R R R RB E B E                             1 1 'S V V VBETh R RB E                1 1 R RB ES R RB E                  Q Multiplying numerator and denominator by β, we get        11 1 'V V V SI I SBEThC C R RB E                     1 'V V VBETh IC R RB E                  Q  1 " I I SC CS          where 1 1 S RE R RE B               . Problems: 5. For the circuit shown in figure, determine the value of IC and VCE. Assume VBE=0.7V and β=100 Solution: 35 101 10 3 310 10 5 101 2 3.33 R V VB CCR R V          We know that 3.33 0.7 2.63V V VE B BE V     and 2.63 500 5.26 V VEIE RE mA   We know that 32.63 10 52.08 1 101 IEI AB        and IC=βIB=100x52.08x10-6 = 5.208mA
  • 214.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 197 Applying KVL to the collector circuit we get 0V I R V I RE ECC C C CE   V V I R I RE ECE CC C C    =10-5.208x10-3 x1x103 - 5.26x10-3 x500 2.162V V CE   6. In the circuit shown, if IC=2mA and VCE=3V, Calculate R1 and R3. Solution: From collector circuit, 15 = ICR3 + VCE + IER4 = 2 x1 0 - 3 xR3 + 3 + (1 + β )I B x5 0 0 32 10312 2 10 101 5003 100 R        5.495 3 R k   From Base circuit, 2 2 1 2 R V VCCR R   310 10 152 310 101 V R       But,  0.6 0.6 12 4 4V V V I R I RBE E E B       32 10 0.6 101 500 1.612 100 V V        31 10 1.61 15 310 101R       3 310 10 93.17 101R      83.171R k  
  • 215.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 198 7. For the circuit shown below, calculate VE, IE, IC and VC. Assume VBE=0.7V. Solution: From Base circuit, 4 0.7V V VBE E E    3.3V VE  3.3I RE E  3.3 1 33.3 10 I mAE    But IE=IB+IC = (1+β)IB Assume β=100, 1 0.0099 101 mA I mAB   IC=βIB = 100x0.0099mA = 0.99mA From Collector circuit, 10 100 0.99 4.7 5.347V I R mA KC C C V       Bias Compensation Techniques: The biasing circuits provide stability of operating point in case variations in the transistor parameters such as ICO, VBE and β. The stabilization techniques refer to the use of resistive biasing circuits which permit IB to vary so as to keep IC relatively constant. On the other hand, compensation techniques refer to the use of temperature sensitive devices such as diodes, transistors, thermistors, sensistors etc., to compensate for the variation in currents. Sometimes for excellent bias and thermal stabilization, both stabilization as well as compensation techniques are used. The following are some compensation techniques: 1) Diode compensation for instability due to VBE variation. 2) Diode compensation for instability due to ICO variation. 3) Thermistor compensation. 4) Sensistor compensation. 1) Diode compensation for instability due to VBE variation: For germanium transistor, changes in ICO with temperature contribute more serious problem than for silicon transistor. On the other hand, in a silicon transistor, the changes of VBE with temperature possesses significantly to the changes in IC. A diode may be used as compensation element for variation in VBE (or) ICO. The figure below shows the circuit of self bias stabilization technique with a diode compensation for VBE. The Thevenin‟s equivalent circuit is shown in figure.
  • 216.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 199 Fig. Self bias with stabilization and compensation Fig. Thevenin‟s equivalent circuit The diode D used here is of the same material and type as the transistor. Hence the voltage VD across the diode has same temperature coefficient (-2.5mV/o C) as VBE of the transistor. The diode D is forward biased by the source VDD and resistor RD. Applying KVL to the base circuit, we get 0V I R V I R VB BE E E DTh Th       V V V I R R I IBE D B E E CTh Th      …………………. (1) But  1I I IBC CO    ………………... (2) From equation (1), we get  V V V R I R R IBE D E E BCTh Th     Substituting the value of IB from equation (2), we get    1I IC COV V V R I R RBE D E ECTh Th                        1V V V R I R R I I R RBE D E E EC C COTh Th Th                   1 1V V V I R R I R RBE D E ECO CTh Th Th                   1 1 V V V I R RBE D ECOTh Th IC R RETh             …………… (3) Since variation in VBE with temperature is the same as the variation in VD with temperature, hence the quantity (VBE-VD) remains constant in equation (3). So the current IC remains constant in spite of the variation in VBE. 2) Diode compensation for instability due to ICO variation: Consider the transistor amplifier circuit with diode D used for compensation of variation in ICO. The diode D and the transistor are of the same type and same material.
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    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 200 In this circuit diode is kept in reverse biased condition. The reverse saturation current IO of the diode will increase with temperature at the same as the transistor collector saturation current ICO. From figure V V VBECC CCI R R    = constant. The diode D is reverse biased by VBE. So the current through D is the reverse saturation current IO. Now base current IB=I-IO But  1I I IBC CO       1I I I IC O CO      If β>>1, I I I IC O CO     In the above expression, I is almost constant and if IO of diode D and ICO of transistor track each other over the operating temperature range, then IC remains constant. 3) Thermistor Compensation: This method of transistor compensation uses temperature sensitive resistive elements, thermistor rather than diodes (or) transistors: It has a negative temperature coefficient, its resistance decreases exponentially with increasing temperature as shown in the figure. Slope of this curve RT T    RT T   is the temperature coefficient for thermistor, and the slope is negative. So we can say that thermistor has negative temperature coefficient of resistance.
  • 218.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 201 Figure below shows thermistor compensation technique. As shown in figure, R2 is replaced by thermistor RT in self bias circuit. Fig. Thermistor compensation technique. With increase in temperature, RT decreases. Hence voltage drop across it also decreases. This voltage drop is nothing but the voltage at the base with respect to ground. Hence, VBE decreases which reduces IB. This behavior will tend to offset the increase in collector current with temperature. We know,  1I I IBC CO    In this equation, there is increase in ICBO and decreases in IB which keeps IC almost constant. Consider another thermistor compensation technique shown in figure. Here, thermistor is connected between emitter and VCC to minimize the increase in collector current due to change in ICO, VBE (or) β with temperature. Fig. Thermistor compensation technique.
  • 219.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 202 IC increase with temperature and RT decreases with increase in temperature. Therefore, current flowing through RE increases, which increases the voltage drop across it. Emitter to Base junction is forward biased. But due to increase in voltage drop across RE, emitter is made more positive, which reduces the forward bias voltage VBE. Hence, base current reduces. IC is given by,  1I I IBC CO    As ICBO increases with temperature, IB decreases and hence IC remain fairly constant. 4) Sensistor Compensation: This method of transistor compensation uses sensistor, which is temperature sensitive resistive element. Sensistor has a positive temperature coefficient, i.e., its resistance increases exponentially with increasing temperature. Slope of this curve RT T    RT T   is the temperature coefficient for sensistor, and the slope is positive. So we can say that sensistor has positive temperature coefficient of resistance. As shown in figure R1 is replaced by sensistor RT in self bias circuit. As temperature increases, RT increases which decreases the current flowing through it. Hence current through R2 decreases which reduces the voltage drop across it. Fig. Sensistor compensation technique. As voltage drop across R2 decreases, IB decreases. It means, when ICBO increases with increase in temperature, IB reduces due to variation in VBE, maintaining IC fairly constant.
  • 220.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 203 Thermal Runaway: The collector current for the CE circuit is given by  1I I IBC CO    The three variables in the equation, β, IB and ICO increase with rise in temperature. In particular, the reverse saturation current (or) leakage current ICO changes greatly with temperature. Specifically, it doubles for every 10o C rise in temperature. The collector current IC causes the collector-base junction temperature to rise which, in turn, increase ICO, as a result IC increase still further, which will further rise the temperature at the collector-base junction. This process is cumulative and it is referred to as self heating. The excess heat produced at the collector-base junction may even burn and destroy the transistor. This situation is called “Thermal Runaway” of the transistor. Thermal Resistance: Transistor is a temperature dependent device. In order to keep the temperature within the limits, the heat generated must be dissipated to the surroundings. Most of the heat within the transistor is produced at the collector junction. If the temperature exceeds the permissible limit, the junction is destroyed. For Silicon transistor, the temperature is in the range 150o C to 225o C. For Germanium, it is between 60o C to 100o C. Let TA o C be the ambient temperature i.e., the temperature of surroundings air around transistor and Tj o C, the temperature of collector-base junction of the transistor. Let PD be the power in watt dissipated at the collector junction. The steady state temperature rise at the collector junction is proportional to the power dissipated at the junction. It is given by T T T Pj DA     Where θ = constant of proportionality The θ, which is constant of proportionality, is referred to as thermal resistance. T Tj A PD    The unit of θ, the thermal resistance, is o C/watt. The typical values of θ for various transistors vary from 0.2o C/watt for a high power transistor to 1000 o C/watt for a low power transistor. Heat Sink: As power transistors handle large currents, they always heat up during operation. The metal sheet that helps to dissipate the additional heat from the transistor is known as heat sink. The heat sink avoids the undesirable thermal effect such as thermal runaway. The ability of heat sink depends on the material used, volume, area, shape, constant between case and sink and movement of air around the sink. The condition for Thermal Stability: As we know, the thermal runaway may even burn and destroy the transistor, it is necessary to avoid thermal runaway. The required condition to avoid thermal runaway is that the rate at which heat is released at the collector junction must not exceed the rate at which the heat can be dissipated. It is given by P PC D T Tj j      ………………(1)
  • 221.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 204 But we know, from thermal resistance T T Pj DA   …………….. (2) Differentiating equation (2) w.r.t. Tj we get 1 PD Tj     1PD Tj      ………………. (3) Substituting equation (3) in equation (1), we get 1PD Tj      ……………… (4) This condition must be satisfied to prevent thermal runaway. By proper design of biasing circuit it is possible to ensure that the transistor cannot runaway below a specified ambient temperature (or) even under any condition. Let us consider voltage divider bias circuit for the analysis. Fig. Voltage divider bias circuit. From fig., PC = heat generated at the collector junction. = DC power input to the circuit – the power lost as I2 R in RC and RE. If we consider I IEC  we get  2P V I I R REC CC C C C   ……………….. (6) Differentiating equation (6) w.r.t IC we get  2 PC V I R RECC C CIC      ……………….. (7)
  • 222.
    Department of Electronicsand Communication Engineering UNIT-V -ED ___________________________________________________________________________ _____________________________________________________________________________________________________________ VARDHAMAN COLLEGE OF ENGINEERING, SHAMSHABAD, HYDERABAD 205 From equation (4) 1 . P IC C I TjC       ……………….. (8) In the above equation IC Tj   can be written as ' " I I VC CO BES S S T T T Tj j j j            ………………. (9) Since junction temperature affects collector current by affecting ICO, VBE, and β. But as we are doing analysis for thermal runaway the affect of ICO dominates. Thus we can write I IC COS T Tj j      …………………….. (10) As the reverse saturation current for both Silicon and Germanium increases about 7 percent per o C, we can write 0.07 ICO ICOTj    ……………………. (11) Substituting equation (11) in equation (10), we get 0.07 IC S ICOTj     ……………………. (12) Substituting equations (7) and (12) in equation (8), we get      1 2 0.07V I R R S IECC C C CO        ………………….. (13) As S, ICO and θ are positive; we see that the inequality in equation (13) is always satisfied provided that the quantity in the square bracket is negative.  2V I R RECC C C    2 VCC I R REC C   ……………….. (14) Applying KVL to the collector circuit of voltage divider bias circuit we get,  V V I R RECE CC C C    I IEC Q  I R R V VEC C CC CE    Substituting the value of  I R REC C  in equation (14), we get 2 VCC V VCC CE   2 VCCV VCC CE   2 VCCVCE  Thus if 2 VCCVCE  , the stability is ensured.