The document discusses the hardware design of wireless sensor network nodes or "motes". It covers topics such as the microprocessor system, radio frequency design considerations including propagation and antennas, data packet design, input/output interfaces, and sensor modalities. The goal is to design low-power, integrated hardware that meets interface standards and supports a variety of sensor applications in a cost-effective way. Examples are given of several generations of mote designs from 1999 to 2009.

1. Two-day Course : Self-Organizing Wireless Networks (SOWN) 813.205.2661 World Bridge innovations, LLC Wbi@mac.com Low-power, wireless node networks Chapter III: Hardware 20-21 July 2009 JHU/APL Laurel, Maryland Timothy D. Cole World Bridge innovations (WBi) LLC

2. AGENDA INTRODUCTION BACKGROUND MOTE DESIGN CASE STUDIES DESIGN CONSIDERATIONS

3. MOTE DESIGN (HW): Agenda Hardware Design goals Microprocessor system Summary of RF propagation issues & considerations RF transceiver implementation TOS Data packet definition & implementation I/O design approaches & considerations Network Management System (NMS) Software Sensor Modalities

4. MOTE DESIGN (HW): Objectives CHAPTER III Objectives: System overview, hardware perspective Microcontroller (mC) system description Top level behind purpose & performance of RF modulation Comprehend and use range equation to produce first order performance results. Evaluate sensor modalities Discuss principles behind packet radio Aware of link detractors Antenna design review -- first order evaluation of performance Understand IEEE standards Define packet definitions for the WSN system (e.g., TOS) I/O design considerations © Timothy D. Cole, 2009

5. MOTE DESIGN (HW): Design goals Ultra-low power consumption and requirements Matched RF & sensor (e.g. range) performance Efficient RF spectrum usage High integration capability Readily reconfigurable hardware/firmware Satisfy interface requirements (standards) and compliance Supports software SDK environments Robust design and execution Supported functionality with cost-effective components Maintain suitable performance Promotes standard interfaces (sensor integration) Adequate microcontroller characteristics (mem size, ADC bits, …)

6. MOTE DESIGN (HW): Design results – Myriad of small sensors, for WSN apps

7. MOTE DESIGN (HW) : System Overview RF/Processing Board Sensor Board Interface Board The RF/Processor Board (MPR300CB) which contains the micro controller that will provide all of the necessary control, processing, and communication signals to the sensors as well as the transmission of data over the wireless link station. The Sensor Board (MTS310CA), which contains the sensors and connects on top of the RF/Processor Board via a 51 pin connector. This board contains anywhere from 2-5 sensors and is responsible for gathering data. The Interface Board (MIB300CA), which acts as a Base Station and is used for programming the RF/Processor Board, or transferring data collected by the sensors to a PC via the serial port, or communication port.

8. MOTE DESIGN (HW): Microprocessor system Wisenet mote Sensor board Interface board Processing board

9. INTRODUCTION: Concepts involved (moteiv Tmote Sky)

10. MOTE DESIGN (HW): Concepts involved (Tmote Sky diagram) Mote core RF Antenna Sensors Radio stack Microcomputer (w/ADC) Memory I/O I/O

11. MOTE DESIGN (HW): Mote evolution, 1999-2003

12. MOTE DESIGN (HW): NEST Hardware, mote + relay -- XSM, TXSM, XSS (Stargate relays) Extreme Scale Mote (XSM) MICA II (listener & basemote) XSM & Tactical XSM (TXSM) Low Level Node – Extreme Scaling Mote (XSM) Atmel Atmega 128L Micro-controller 4Mbit of Flash Sensors (Magnetic, Acoustic, Passive Infrared) Radio (Chipcon CC1000) 51-pin MICA2 connector Weather proof package Batteries (two alkaline AA) Relay Node – Extreme Scaling Stargate (XSS) Intel PXA255 RISC Processor (400 MHz) 64 MB SDRAM, 32 MB Flash Wireless/802.11 Card WAAS GPS and antenna Ethernet, Serial, JTAG, and USB ports 51-pin MICA2 connector Weather proof package Battery pack/Batteries TIER 1 TIER 2

13. MOTE DESIGN (HW): XSM Mote, 2004 passive infrared acoustic magnetic Mote

14. MOTE EVOLUTION -- 2007 25.4mm 18.0mm 16-bit Microcontroller 8MHz, 10kB RAM, 48kB Flash Serial bus connectivity 1MB EEPROM Storage with write-protected segments IEEE 802.15.4 Radio 0dBm and +20dBm output FCC/IC certified Multiple Antenna Options External U.Fl connector or Soldered PCB antennas Dual-functionality Device Soldered OEM mote miniSD PDA connectivity

15. MOTE DESIGN (HW): RF design and considerations RF link metrics & issues RF spectrum use RF propagation concerns RF antenna designs Data packet design & implementation Transceiver (chipset) approach TOS Messages

16. MOTE DESIGN (HW): RF Link Metrics

17. MOTE DESIGN (HW): Common RF Link Problems

18. MOTE DESIGN (HW): Radio Signal Propagation

19. MOTE DESIGN (HW): MultiPath

20. MOTE DESIGN (HW): Indoor Propagation

21. MOTE DESIGN (HW): RF Solutions - Signal Power & Wavelength

22. MOTE DESIGN (HW): RF Solutions - Distortion fvom local environs

23. MOTE DESIGN (HW): RF Solutions - RF & data comms

24. MOTE DESIGN (HW): RF Issues

25. MOTE DESIGN (HW): Debugging Hints

26. MOTE DESIGN (HW): RF Frequencies & Channels

27. MOTE DESIGN (HW): RF Signal Measure, RSS

28. MOTE DESIGN (HW): RF Solutions - Next-Gen RF Technology RF Antenna Resonator design Reduces “ground” effect Testing ~ Oct 07

29. TXSM (433 MHz) Tier 1 MEASURED RANGE PERFORMANCE

30. MOTE DESIGN (HW): RF Solutions - Standard Was CC1OOO

31. MOTE DESIGN (HW): Comparison of Radiostacks

32. MOTE DESIGN (HW): MICA2 TOS Wireless Packet

33. MOTE DESIGN (HW): RF CONCLUSION

34. MOTE DESIGN (HW): Finally, I/O design and considerations I/O interfaces JTAG SPI (SDIO) USB (WUSB, USB3) UART I2C (SMBus)