This presentation describes the unique, ground-breaking development of persistent SDC-equivalent timing constraints within industry-standard OpenAccess design database.

1. Into the Depths of OpenAccess:
Timing Constraints Implementation
Timothy J. Ehrler
Senior Principal Engineer
Design Technology Group
Philips Semiconductors
tim.ehrler@philips.com
6th OpenAccess Conference – April 2005

2. Introduction
• OpenAccess coalition requested timing constraints
– Change Team categorized as high priority
– Constraints considered crucial
• User design flow & environment migration
• EDA and proprietary application development
– Working group formed to address
• Functional requirements specification created
• Presented to and approved by Change Team
– System integrator had insufficient resources to implement
• Resources committed to 2.2 release completion
• Philips Semiconductors volunteered resources
– Essential requirement for migration within Philips
• Enables 3rd party tool development in critical areas
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– Development investment accelerates migration
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3. Overall System Realization Process
CS CA
PS PIA SRA PC
OpenAccess
Change CRS Integration
Team
Timing
Constraints FRS
Work group
Implementers PIF PMP Sched
S/W UTR
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UsM
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4. Simple Development Plan … NOT!
schedule timeline
oaRule schema (2.1)
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oaConstraint schema (2.2)
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5. Organization & Relationships
base tech design
oaValue oaTechValue oaDesignValue
oaObject oaTechObject oaDesignObject
oaConstraint oaTechConstraint oaDesignConstraint
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6. Private Subtypes & Public Types …
offsetT
s s
Subtype e Value Type e Value
q q
stS u 0x0 tT u T
e e
stS+1 n 0x1 tT +1 n T+1
t t
stS+2 i 0x2 tT +2 i T+2
a a
l l
• Defined private subtypes identify internal data
– Sequential within class of data
• Offset added yields enumerated public types
– Sequential within class of data
– Offset is the value of first type
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• Public types visible to applications
Must be consistent among releases for compatibility
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7. … and Enforced Compatibility
Subtype Value Type n Value
s
stS e 0x00 tS o T
q n
stS+1 0x01 tT+1 - T+1
u
stS+2 e 0x02 tT+2 s T+2
n e
stS+3 0x03 tT+3 q T+3
t
stS+4 i 0x04 u
a
tT+4 e T+12
stS+5 0x05 n
l tT+5 T+13
t
stS+6 0x06
i
stS+7 0x07 tT+6 a T+15
tT+7 l T+16
stS+8 0x08
stS+9 0x09
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tT+8 T+18
tt+9 T+19
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8. Virtual Persistence
pubic class private class data tables data storage
visible to manipulates object data persistent
application
oaValue resident
oaValueTbl data
data
oaTechValue oaTechValueTbl
API object table object data table database
oaDesignValueTbl
storage
oaDesignValue
oaTimingValue oaTimingValueTbl
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9. Constraint Object Implementation
• Prerequisite related element creation
– Constraint related value objects
– Constraint parameter definition objects
– Constraint definition objects
– Constraint objects
– Design logic related objects
– Clock related objects
• Classified constraint categories
– general - simple value applied to a logic point
– edge – general constraint with state transition
– clock related – edge constraint relative to clock with state transition
– path - constraint applied to logic path with state transitions
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– driver - driving signal applied to design object
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10. Design Logic Paths
( , )
otA ( ) ( )
onC
oitD SET
D Q
oitB
( , ) CLR
Q
• Path points - unordered array of points on a logic path
• Logic points - path points with state transitions
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• Logic path - ordered array of logic points
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11. Clocks & Waveforms
design
logic
oaWaveform
oaClock oaClock
(created) (derived)
• “conventional” clock waveform • divided – divided source frequency
– logical - only ‘0’ & ‘1’ transitions • multiplied – multiplied source frequency
– ideal - ‘0.0’ edge transition time • edge – subset of source edges
– circular - 1st edge start is last edge • shifted edges – shifted subset of source
end
edges
• Complex waveforms for future use 1
1
1
0
multiplied
HiZ ? 0
divided
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0 1
ideal & logical complex 1
0
shifted edges
0
edges
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12. Unit Testing
• Test approach to reuse source distributed test cases
– Modify, enhance, adapt, copy existing test benches
– Avoid development “from scratch” – consistent testing
– Provides regression test capability
• Test objectives:
– Ensure no errors introduced into otherwise stable areas
– Verify new elements don’t impact similar existing ones
– Verify expected functionality of new elements
– Confirm suspected existing issues
• Testing scope covers:
– Data value classes
– Clock and waveform classes
– Logic path and related classes
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– Timing constraint and definition classes
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13. Test Case Coverage
Test Case Test Case Verification Usage
State
oaConstraint Unchanged No regression
oaConstraintDef Unchanged No regression
New constraint definitions
oaConstraintParam Unchanged No regression
oaConstraintParamDef Unchanged No regression
New constraint parameter definitions
oaValue Modified No regression
New value types
oaClock New New clock and waveform objects
oaLogicPath New New logic path objects
oaDesignConstraint New New constraints
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oaSimpleConstraint Modified Confirm other test case failure
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14. Delivery
• Deliverables catagorized:
– project documentation - documents used to provide visibility into
planning and development
– development aids - applications and test cases used to assist in
the development of the product
– product documentation - documents that define, and otherwise
specify, the interface, use model, and other application related
information of the developed product
– product source code - source code employed to implement the
reference implementation of the developed product
• Specific delivery on 1 March 2005
– Test cases
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– Unit test report
– Development source code
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15. Summary & Recommendations
• Extensive preparation mandatory
– Change in philosophy from rules to constraints
• Significant impact on task priorities & resources
• Ensure resource availability
– Expect less availability, effectiveness than assumed
• Heavy impact on development and delivery
– Provide contingency for alternate resources
• Stay closely involved with integrator (Cadence)
– Any questions or concerns – ask them!
– Review implementation with them as it develops
– Code reviews work – consult early and often
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