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淺談-從FW看C語言
feathertw@gmail.com
翔翔
Issue?
● What's the different between SOC and MCU?
● What’s a 32bit architecture mean?
● What’s ARM and ST relationship?
● What is stack point, link register, program counter in Cortex-M?
● How to program C code with considering BUS architeture?
● Assembly is really neccessary in Cortex-M when init C code environment?
● How an OS use CPU mode to protect task without MMU?
● Choose Cortex-M4 is good for running DSP code?
C Program
語法
平台編譯
C規格、資料結構…
CPU、Periperal、OS…Compiler、Linker、Debuger…
SOC & MCU
ARM Cortex-A Series
ARM Cortex-M Series
ARM & ST
● CPU
○ Cortex
A,R,M
● Debug
● ToolChain
● Software
Ecosystem
● (BUS)
● Package
○ LQFP144
○ BGA
● Memory
○ Flash
○ Ram
● Peripheral
○ Timer
○ Uart
IC Industry Chain
Cortex-M4F
● 32bit、3stage pipeline
● FPU、SIMD、MAC instruction
● CMSIS
○ Core info
○ Vendor Peripheral Mapping
○ OS interface
○ Library
○ Function
■ __disable_irq()
■ __ROR()
■ __WFI()
BUS-AMBA
Register
NVIC
● Nested, Vector Table
● Priority
○ vendor implement
○ group priority、subpriority
○ low number means high priority
● Exception stack frame
○ R0、R1、R2、R3、R12、LR、PC、xPSR
● Exception return
○ Return to Handler mode 0XFFFFFFF1
○ Return to Thread mode and using MSP 0xFFFFFFF9
○ Return to Thread mode and using PSP 0xFFFFFFFD
● Vector Table Offset Register (VTOR)
Thumb-2 ISA
● 16bit、32bit instruction(16bit with low register)
○ .N .W
○ MOVW、MOVT
○ CLZ
● Instruction with postfix ‘S’
● Access memory
○ LDR R2, [R3] ;R2 = mem32[R3]
○ LDR R2, [R3, #4] ;R2 = mem32[R3 + 4]
○ LDR R2, [R3,#4]! ;R2 = mem32[R3 + 4] ; R3 = R3 + 4
○ LDR R2, [R3], #4 ;R2 = mem32[R3] ; R3 = R3 + 4
● IF-THEN Instruction
○ if else in 4 instruction
RTOS
● Systick
● Processor mode
○ Thread mode、Handler mode
○ Unprivileged、Privileged
○ MSP、PSP
○ Control register
○ SVC #
● MPU
Toolchain
.c .s .o .elf .bin
gcc as ld objcopy
● Toolchain
○ cross-compiler
○ gcc、as、ld、objcopy、objdump、gdb
Compile
● Section
○ CODE
○ DATA
○ BSS
● Linker
● C Programming Initial
● AAPCS
● Const issue
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000,
LENGTH = 0x00040000
RAM (rwx) : ORIGIN = 0x01000000,
LENGTH = 0x00040000
}
SECTIONS
{
.text :
{
_stext = . ;
*(vectors)
*(.text)
_etext = . ;
} > FLASH
.data : AT(_etext)
{
_sdata = . ;
*(.rodata*)
*(.data)
_edata = . ;
} > RAM
data_size = _edata - _sdata ;
.bss :
{
_sbss = . ;
*(.bss)
_ebss = . ;
} > RAM
bss_size = _ebss - _sbss ;
}
FPU
● gcc parameter
○ -mfloat-abi=soft
○ -mfloat-abi=softfp
○ -mfloat-abi=hard
● Lazy stacking feature
● Floating-point register with context switch
Q&A
Do you really know how do program run?
#include <stdio.h>
#include <unistd.h>
int main()
{
int i;
for(i=0; i<3; i++)
{
fork();
printf("-");
}
return 0;
}
$ gcc fork.c -o fork && ./fork | wc -c
Explain output number!
THX

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C from FW

  • 2. Issue? ● What's the different between SOC and MCU? ● What’s a 32bit architecture mean? ● What’s ARM and ST relationship? ● What is stack point, link register, program counter in Cortex-M? ● How to program C code with considering BUS architeture? ● Assembly is really neccessary in Cortex-M when init C code environment? ● How an OS use CPU mode to protect task without MMU? ● Choose Cortex-M4 is good for running DSP code?
  • 4. SOC & MCU ARM Cortex-A Series ARM Cortex-M Series
  • 5. ARM & ST ● CPU ○ Cortex A,R,M ● Debug ● ToolChain ● Software Ecosystem ● (BUS) ● Package ○ LQFP144 ○ BGA ● Memory ○ Flash ○ Ram ● Peripheral ○ Timer ○ Uart
  • 7. Cortex-M4F ● 32bit、3stage pipeline ● FPU、SIMD、MAC instruction ● CMSIS ○ Core info ○ Vendor Peripheral Mapping ○ OS interface ○ Library ○ Function ■ __disable_irq() ■ __ROR() ■ __WFI()
  • 10. NVIC ● Nested, Vector Table ● Priority ○ vendor implement ○ group priority、subpriority ○ low number means high priority ● Exception stack frame ○ R0、R1、R2、R3、R12、LR、PC、xPSR ● Exception return ○ Return to Handler mode 0XFFFFFFF1 ○ Return to Thread mode and using MSP 0xFFFFFFF9 ○ Return to Thread mode and using PSP 0xFFFFFFFD ● Vector Table Offset Register (VTOR)
  • 11. Thumb-2 ISA ● 16bit、32bit instruction(16bit with low register) ○ .N .W ○ MOVW、MOVT ○ CLZ ● Instruction with postfix ‘S’ ● Access memory ○ LDR R2, [R3] ;R2 = mem32[R3] ○ LDR R2, [R3, #4] ;R2 = mem32[R3 + 4] ○ LDR R2, [R3,#4]! ;R2 = mem32[R3 + 4] ; R3 = R3 + 4 ○ LDR R2, [R3], #4 ;R2 = mem32[R3] ; R3 = R3 + 4 ● IF-THEN Instruction ○ if else in 4 instruction
  • 12. RTOS ● Systick ● Processor mode ○ Thread mode、Handler mode ○ Unprivileged、Privileged ○ MSP、PSP ○ Control register ○ SVC # ● MPU
  • 13. Toolchain .c .s .o .elf .bin gcc as ld objcopy ● Toolchain ○ cross-compiler ○ gcc、as、ld、objcopy、objdump、gdb
  • 14. Compile ● Section ○ CODE ○ DATA ○ BSS ● Linker ● C Programming Initial ● AAPCS ● Const issue MEMORY { FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 RAM (rwx) : ORIGIN = 0x01000000, LENGTH = 0x00040000 } SECTIONS { .text : { _stext = . ; *(vectors) *(.text) _etext = . ; } > FLASH .data : AT(_etext) { _sdata = . ; *(.rodata*) *(.data) _edata = . ; } > RAM data_size = _edata - _sdata ; .bss : { _sbss = . ; *(.bss) _ebss = . ; } > RAM bss_size = _ebss - _sbss ; }
  • 15. FPU ● gcc parameter ○ -mfloat-abi=soft ○ -mfloat-abi=softfp ○ -mfloat-abi=hard ● Lazy stacking feature ● Floating-point register with context switch
  • 16. Q&A
  • 17. Do you really know how do program run? #include <stdio.h> #include <unistd.h> int main() { int i; for(i=0; i<3; i++) { fork(); printf("-"); } return 0; } $ gcc fork.c -o fork && ./fork | wc -c Explain output number!
  • 18. THX