Resume of Zikai Cai

1. Zikai (Kevin) Cai
1476 1/2 W 37th
Pl, Los Angeles, CA 90007
zikaicai@gmail.com 323-621-2063
EDUCATION
University of Southern California (USC), Los Angeles, CA May 2021
Master of Science in Computer Science; GPA: 4.0/4.0
Core courses: Analysis of Algorithms (A), Artificial Intelligence (A), Computer Systems Organization (A).
University of Science and Technology of China (USTC), Hefei, Anhui, China July 2019
Bachelor of Science in Computer Science; GPA (major): 90.83/100
Core courses: Operating System (94/100), Parallel Computing (95/100), Computer Architecture (93/100).
Hong Kong Polytechnic University (PolyU), Hong Kong, China September 2017 – January 2018
Exchange Program; GPA (overall): 3.7/4.0
SKILLS
Adept in C, System Verilog, C++, Python, MATLAB, HTML, JavaScript, PHP, MySQL, Java
Frequent user of ISE, Vivado, FPGA, Keras, scikit-learn, OpenMP, MPI
EXPERIENCE
Design Verification Intern | Apple Inc. June 2020 - August 2020
Design verification on error handling of a media IP
 Built cover points for different kinds of errors and counted the number of injections for analysis.
 Tuned the distribution as needed to cover more corner cases. Cleaned up the stimulus code and built an error list
to control multi error injection.
Research Assistant | Computer Architecture Lab, USTC February 2018 - August 2019
Develop of accelerators for different neural networks use on RISC-V based SoC
 Developed a hardware accelerator on FPGA for different Neural Networks with High-Level Synthesis (HLS)
tools in a group of seven; obtained higher performance and lower power usage.
 Rewrote RISC-V Based SoC and toolchain; increased efficiency of frequent machine learning operations on
different systems with accelerator.
RISC-V Processor Analysis and Computer Architecture Lab Design
 Analyzed performance of several RISC-V processors quantitatively on hardware simulator; built benchmarks
and test cases to discover bottleneck of RISC-V ISA.
 Led other TAs to assist professor to design lab sections of course 011135-Computer Architecture, including ISA
extension, CPU analyses, cache consistency and multi-core design.
Summer Intern | YLAB, University of Chicago July 2018 - September 2018
Design of Machine learning model for detecting Silent data corruption
 Collected hardware data by using injection technique from established programs.
 Designed a machine learning model using scikit-learn and Keras for detecting silent data corruption in other
programs with high recall and reasonable precision.
PROJECTS
Course Project | CSCI 561-Foundations of Artificial Intelligence, USC August 2019 - November 2019
USC A.I. competition in 2019 (Halma Game)
 Built a high-performance Halma game agent with several game-playing techniques, including minimax
algorithm, alpha-beta pruning, and time managing with iterative deepening search.
 Beat every other agent in whole class and got first prize in competition. (rank 1/724)
Visiting Student | Deep Learning Workshop, University of Florida January 2018 - February 2018
Titanic problem on Kaggle and Deep Learning on Fashion-MNIST
 Researched a classic binary classification algorithm by using different kinds of classification and data
preprocessing techniques from scikit-learn; accuracy reached 80.382% (rank 1/24).
 Trained on a dataset for benchmarking machine learning algorithms (Fashion-MINST) in a team of 5;
implemented WRN-28-10 with Random Erasing by PyTorch. Accuracy reached 95.67% (rank 1/5).
Research Assistant | Computer Hardware Lab Center, USTC June 2017 - August 2017
4 Ways Out-of-order MIPS CPU Design
 Partnered with 3 researchers to implement a 4 ways out-of-order MIPS CPU with Verilog and ran on an FPGA;
responsible for front-end design (Cache, Branch Predictor, Reg Renaming, etc.).
 Connected CPU to an open-source SoC and controlled I/O port, then ran a test program for verification.