1. RS 232 TO E1 CONVERTER
AN INTERNSHIP REPORT
Submitted
In the partial fulfillment of the requirements for
the award of the degree of
Bachelor of Technology in
Electronics and Communication Engineering
By
BALA RAJESWARI ELCHURI
[Reg. No.121FA05063]
Under the guidance of Under the guidance of
Ms.J.Prathiba Mr.M.Naresh
Asst. Professor Assistant Project Manager
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
VIGNAN’S FOUNDATION FOR SCIENCE, TECHNOLOGYAND RESEARCH
UNIVERSITY
VADLAMUDI, GUNTUR – 522 213, INDIA. NAAC ’A’Accredited
May-2016
2.
3. CERTIFICATE
This is to certify that the internship report entitled RS-232 TO E1 CONVETER that is
being submitted by BALA RAJESWARI bearing Regd. No.121FA05063 in partial fulfilment
for the award of B.Tech degree in Electronics and Communication Engineering to Vignan’s
Foundation for Science Technology and Research University, is a record of bonafide work
carried out by them at EFFTRONICS under the supervision of Mr.M.Naresh and the internal
guidance of Ms.J.Prathiba of ECE Department.
Signature of the faculty guide Signature of Head of the Department
Ms. J. Prathiba Dr. N. Usha Rani
Asst. Professor Professor
4. DECLARATION
I hereby declare that the internship work entitled RS-232 TO E1 CONVERTER is being
submitted to Vignan’s Foundation for Science, Technology and Research, University, in partial
fulfillment for the award of B.Tech degree in Electronics and Communication Engineering.
The work was originally designed and executed by me under the guidance of my supervisor
Mr.M.Naresh with Ms.J.Prathiba as faculty guide at Department of Electronics and
Communication Engineering, Vignan’s Foundation for Science Technology and Research
University and was not a duplication of work done by someone else. I hold the responsibility
of the originality of the work incorporated into this thesis.
Signature of the candidate
E. Bala Rajeswari
5. ACKNOWLEDGEMENT
I take immense pleasure in thanking Dr.D.Rama Krishna (CEO, Efftronics Systems Pvt.
Ltd.) for having permitted me to carry out this internship work. Also, I would wish to express
my gratitude to Dr.L.Rathaiah (Director of VIGNAN’S University) for providing us the
greatest opportunity to have industrial exposure and to carry out the Live Projects.
I would like to specially thank Dr.N.Usha Rani (Head Of the Department, ECE,
VIGNAN’S University), Mr.G.Polaiah (Regional Coordinator, Vignan’s university,
Vadlamudi) for their help and support during the program.
I wish to express my deep sense of gratitude to my Technical Guide,
Ms.J.Prathiba (Asst.Professor, Vignan’s University), and my operational guide,
Mr.Sk.Sadulla (Asst.Professor, Vignan’s University) for their able guidance and useful
suggestions, which helped me in completing the project work, in time.
It’s my privilege to thank Mr. Naresh Marella (Asst. Project Manager) and who had been
a source of inspiration and for their timely guidance in the conduct of my project work.
I wish to express my heart full thanks to my parents for their support and encouragement
throughout my life.
BALA RAJESWARI ELCHURI
6. TABLE OF CONTENTS
CHAPTER 1:PROFILE OF INDUSTRY Page No.
1.1 Electrical Industry 1
1.2 Future Outlook Of Electronics And Electrical 2
CHAPTER 2:INTRODUCTION TO COMPANY
2.1 Company Profile 5
2.1.1 Vision 6
2.1.2 Mission 6
2.1.3 Key Persons in the Organization 6
2.1.4 Career at EFFTRONICS means 7
2.2 Product Profile 7
2.2.1 List of products developed by Efftronics 7
2.2.1.1 Railways 7
2.2.1.2 Defense 8
2.2.1.3Water Management 8
2.2.1.4 Power 8
2.2.1.5 Meteorology 8
2.2.1.6 Transport 8
2.2.2 Product Development Process at Efftronics 9
2.2.3 Tools & Software’s used in this Organization 10
2.3 Organization Structure 10
2.3.1 Departments and their Functions 11
7. CHAPTER 3: COMMUNICATIONS
3.1 Need For Communication 19
3.2 Characteristics Of Communication Systems 20
3.3 Types Of Communication Media 21
3.3.1 Wired Network 22
3.3.1.1 Twisted Pair Wires 22
3.3.1.2 Coaxial Cables 22
3.3.1.3 Fibre Optics 23
3.3.2 Wireless Network 24
3.3.2.1 Serial communication 24
3.3.2.2 Parallel communication 25
3.3.2.3Serial vs Parallel Communication 26
3.3.2.4 Major Factors Limiting Parallel Communication 27
3.3.2.5 Advantages of Serial over Parallel 27
3.3.2.6 How is Data sent Serially? 27
3.3.2.7 Serial Transmission Modes 28
3.3.2.7.1 Asynchronous Data Transfer 28
3.3.2.7.2 Synchronous Data Transfer 29
3.3.2.8 Serial Communication Terminologies 29
3.3.2.9 Importance of Baud Rate 30
3.3.2.10 UART and USART 30
3.3.2.11 Serial Communication Protocols 31
CHAPTER 4: E1 COMMUNICATIONS
8. 4.1 E1 Carrier 38
4.2 E1 Frame Structure 38
4.2.1 Special Time slots 40
4.2.2 Frame Alignment 40
4.2.3 Frame Alignment Signal 40
4.2.4 Multi Frame CRC-4 41
4.2.5 Signaling Channel 41
4.3 Terms Used In E1 Concept 41
4.3.1 Alarm Indication signal (AIS) 41
4.3.2 HDB3 Coding 42
4.4 Pcm Framing 42
4.4.1 The Primary Frame 43
4.4.2 Frame alignment 44
4.4.3 Frame Alignment Signal (FAS) 44
4.4.4 FAS 45
4.4.5 Frame Alignment Signal(NFAS) 45
4.4.6 Sa bits 45
4.4.7 Frame Synchronization 46
4.5 Signalling 47
4.5.1 E & M signalling 47
4.5.2 Channel-associated signalling (CAS) 48
4.5.3 Signalling Multiframe 48
4.5.4 Pulse Dialling 49
4.6 Cyclic Redundancy Check (Crc) 50
4.6.1 CRC-4 method 51
11. LIST OF TABLES
Table Title Page
3.1 Difference between Serial vs Parallel communication 26
3.2 Pin Configuration Names of 232F 34
3.3 RS232 Pin names 35
3.4 Key Characteristics of RS-232 and RS-485 37
4.1 Truth Table of FAS 44
4.2 Truth Table of NFAS 45
4.3 Assignments of bits in time slot 16 of a signalling multiframe for channel associated
signalling 49
4.4 Interface Requirements 59
5.1 Ordering Information 62
6.1 Truth Table of counter block 69
6.2 Truth table of combinational block 71
6.3 Truth table of FPGA latch 73
12. LIST OF FIGURES
Figure Title Page
2.1 Product Development Process at Efftronics 9
2.2 Organizational Structures 11
2.3 QMS sequence of interaction 17
3.1 Communication System Function Model 20
3.2 Communication Channel 21
3.3 Twisted pair wire 22
3.4 Coaxial cables 22
3.5 Fibre optics 23
3.6 Serial communication 25
3.7 Parallel communication 25
3.8 Serial vs parallel communication 26
3.9 Serial Data Transfer 28
3.10 Asynchronous data transfer 29
3.11 Synchronous data transfer Timing diagram 29
3.12 Types of Serial Communication 30
3.13 Timing diagram of I2C 32
3.14 USB pin diagram 33
13. 3.15 232 levels 33
3.16 RS-232 Level Data Transmission 34
3.17 RS-232 Data Transmission 35
3.18 Pin diagram of DB9 36
3.19 TTL and RS232 voltage levels 36
3.20 Block diagram of USB to RS485 37
4.1 E1 Fame Structure 39
4.2 HDB3 Coding 42
4.3 Principle of TDM 43
4.4 Timeslots of PCM31 System 43
4.5 Timeslots of PCM30 System 44
4.6 The FAS and NFAS Signals 44
4.7 2048kbit/s transmission system 46
4.8 E& M signaling 47
4.9 Channel associated signalling 47
4.10 Signalling Time Slot 48
4.11 Signalling Multiframe 48
4.12 Updating the signalling information at 2ms sampling intervals 49
4.13 Synchronization caused by simulation of frame alignment signal 50
4.14 Schematic diagram f CRC-4 function 51
4.15 CRC-4 multiframes 52
14. 4.16 Alarm messages 55
4.17 Droop in a waveform 57
4.18 Converting binary signals to HDB3 58
4.19 Interface and line codes used for 2048kbit/s 59
5.1 Functional diagram of DS26521 61
5.2 Block diagram of DS26521 64
5.3 Detailed block diagram of DS26522 65
6.1 Block diagram of FPGA 67
6.2 Counter block timing diagram 68
15. ABSTRACT
This document mainly explains about the works performed at Efftronics, during the
Industrial Training Period and detailed explanation about the organization and its standards
and organizational structure.
In this Industrial Training the job that was performed is to explore new Technologies as per
the R&D requirement and implement it in the project RS232 TO E1 CONVERTER. The
implementation of design in FPGA framed mode in RS232 TO E1 CONVERTER. The test
cases are also performed for framed and unframed modes at various baud rates and verified the
data, whether at any baud rate, data corruption occurs.
The testing of RS485 cables is also done by checking the flow of data with quarter, half and
full throughputs at different baud rates and found issues at full throughput of 57600 and 115200
baud rates.