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Richard_Baker-Intel_I-32_Processor_Architecture_Overview
- 1. Richard Baker SG360 ComputerOrganization And Assembly Language 8/16/2006 Research Project #1 Intel IA-32 Processor Architecture Overview
- 2. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 2 7/16/2013 Table of Contents Introduction to Intel IA-32 Processors…………………………………………..………..3 Intel IA-32 Processor Architecture…………………………………………………..……4 Intel IA-32 Memory Management…………………………………………………...……5 Intel IA-32 Microcomputer Components…………….………………………………..…..6 Conclusion………………………………………………………………………….……..7 Glossary of Terms…………………………………………………………………………8 Bibliography……………………………………………………………………………..12
- 3. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 3 7/16/2013 Introduction to Intel IA-32 Processors The Intel® IA-32 line of microprocessors is based upon a 32-bit architecture. This family of processors started with the Intel386, and continues to the present with the Pentium 4. Several advances in technology have been made to the internal architecture of this family of processors, such as pipelining, superscalar, branch prediction, and hyperthreading. In addition, there have been numerous changes to the instruction set extensions, in order to support multimedia processing and graphics calculations. The instruction set is based upon RISC Technology. The entire line of IA-32 Processors are designed to be backwards compatible. The IA-32 Processor Architecture has 3 primary modes of operation (Protected Mode, Real-Address Mode, and System Management Mode): Protected Mode: This is the native state of the processor, in which the processor defaults to when booting up. Protected Mode means that programs are given separate memory areas called segments, and the processor “protects” each separate memory area, so that the programs won’t “step” on each other (won’t write to each other’s memory). Real-Address Mode: Real-Address Mode causes the processor to run as an Intel 8086 Processor. In addition, this mode allows the ability to switch into other modes. Both Windows 95 and Windows 98 use this mode when booting into MS-DOS. System Management Mode (SMM). This mode allows the operating system to control functions such as power management and system security (these functions are usually provided by the OEM). Virtual-8086 Mode: This is a special case of Protected Mode. In this mode, the processor is able to run Real-Address Mode programs, such as MS-DOS programs.
- 4. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 4 7/16/2013 Intel IA-32 Processor Architecture The Intel IA-32 Processor contains 8 general-purpose registers, 6 segment registers, a processor status flag register (denoted as EFLAGS), and an Instruction Pointer (EIP), also known as a Program Counter (PC). The Instruction Pointer keeps track of the next instruction (the actual address) that the program will execute (at a particular moment in time). Following is a breakdown of the general-purpose registers: EAX: This register is automatically used for multiplication and division instructions. It is also known as the “Extended Accumulator” register. ECX: The CPU automatically uses the ECX register as a loop counter. ESP: The ESP register addresses data on the stack. It is also known as the “Extended Stack Pointer” register. ESI: Used by high-speed memory transfer instructions. It is also known as the “Extended Source Index” register. EDI: Used by high-speed memory transfer instructions. It is also known as the “Extended Destination Index” register. EBP: High-level languages use this register to reference function parameters and local variables on the stack. It is also known as the “Extended Frame Pointer” register. Segment Registers: Real-address mode: Segment registers keep track of the base addresses of segment memory areas. Protected mode: Segment registers maintain pointers FPU (Floating Point Unit): The IA-32 Floating Point Unit performs high-speed floating- point arithmetic functions. The FPU consists of 8 80-bit floating-point data registers, named ST(0), ST(1), ST(2), ST(3), ST(4), ST(5), ST(6), and ST(7). In addition, it has an Opcode Register, and a 48-bit FPU IP (Instruction Pointer) The CPU also has 8 64-bit registers that are used by the MMX (MultiMedia Extensions) instruction set, which provides enhancements in regards to speed for audio, video, graphics, and modem operations. In addition, there are 8 128-bit XMM registers used for single-instruction, multiple-data (SIMD) operations. The Pentium processor has several performance improvements added, such as a superscalar design that utilizes 2 parallel execution pipelines. This technology allows 2 instructions to be decoded and executed simultaneously. In addition, the Pentium processor uses a 32-bit address bus with a 64-bit internal data path in order to improve performance. Also, MMX technology was added to the Pentium processor line as well.
- 5. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 5 7/16/2013 Intel IA-32 Memory Management Following are the 3 different modes that the Intel IA-32 Processor can run in: Protected Mode: In Protected Mode, a program can address 4GB of memory (full 32-bit architecture). In this mode, the processor can perform multitasking. Real-Address Mode: In Real-Address Mode, the processor can access only 1,048,476 bytes of memory (1MB). In this mode, the processor can only run 1 program at a time (no multitasking allowed). This is the mode that MS-DOS runs in. In addition, both Windows 95 and Windows 98 can be booted into Real-Address mode. Virtual-8086 Mode: In this mode, the processor can run MS-DOS programs in a safe multitasking environment (while being in Protected Mode). If an MS-DOS program crashes, it will not affect other programs while running in Virtual-8086 mode. There are several types of memory that are used in Intel-based systems: ROM: A program that is permanently burned into a chip and can’t be erased. EPROM: Can be erased and reprogrammed using ultraviolet light. DRAM: Where programs and data reside while a program is running. Also known as main memory. SRAM: Primarily used for expensive, high-speed cache memory, used by the CPU for caching, in order to increase overall CPU performance and speed. VRAM: Special video memory that holds video data. CMOS RAM: A battery-powered memory that maintains the system time, date, hard disk, and other PC hardware configuration settings. The CMOS RAM is located directly on the motherboard.
- 6. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 6 7/16/2013 Intel IA-32 Microcomputer Components Following are the primary components of an Intel IA-32 Microcomputer: Motherboard: A CPU Socket (to hold the microprocessor). Memory Slots (DIMM or SIMM) that hold the computer’s RAM. BIOS: Firmware computer chips that contain the system software. CMOS RAM: A battery-powered memory that maintains the system time, date, hard disk, and other PC hardware configuration settings. Hard drives and CD-ROMs connectors. USB device connectors. Keyboard connector. Mouse connector. PCI bus slots. Parallel device connector. Serial device connector. Additional optional components: An integrated sound processor. An integrated video graphics adapter. An integrated network adapter. An integrated AGP bus connector. An integrated FireWire connector. Motherboard Chipset (coprocessor chips that work with the CPU): Intel 8237 DMA controller – controls transfer of data between external devices and RAM. Intel 8259A Interrupt Controller – controls requests from the hardware in order to interrupt the CPU when necessary. 8254 Timer Counter – controls the system clock, the memory refresh timer, and the time-of-day clock. Microprocessor local bus to PCI bridge. PCI bus to ISA bus bridge. Intel 8042 keyboard and mouse microcontroller.
- 7. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 7 7/16/2013 Conclusion Although the Intel IA-32 Processor family has come a long way in terms of technology (power, scalability, etc.), it is still based upon a 32-bit architecture, and so, in my humble opinion, has already become obsolete. Other microprocessor-manufacturing competitors (such as AMD, for instance), are hot on the heels of Intel. As a matter of fact, AMD has outsold Intel (for the first time, in the first 2 quarters of 2006) in sales of the Athelon 64, a 64-bit Dual-Core Processor vs. the Pentium Processor (Intel has just recently release their own version of a dual-core processor, and therefore are playing catch-up). I believe that the future of microprocessors will be processors designed to run in sub-zero temperatures (using Liquid Helium II, for instance), in order to speed-up electrons, and in doing so, increase the overall processor speed. In addition, I think that the future will also bring microprocessors that transmit their data at the speed of light on busses consisting of fiber optic technology. Also, I feel that the currently limited FSB (Front Side Bus) speeds only serve as a severe bottleneck, and therefore, the bandwidth needs to be seriously increased in order to keep up with even faster processors in the future.
- 8. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 8 7/16/2013 Glossary of Terms AGP: Accelerated Graphics Port. A high-speed graphics port from Intel that provides a connection between the display adapter and memory, running at a speed of 66MHz. AMD: Advanced Micro Devices. A very strong competitor of Intel in regards to microprocessor design and manufacturing. BIOS: Basic Input-Output System. The BIOS is a set of instructions that are the first to be loaded into main memory, in order to detect and test the different peripherals connected to the computer. Branch Prediction: The ability of a processor to “guess” or predict what the next branch in the program will be. Bridge: To cross from 1 circuit to another circuit. CD-ROM: Compact Disc – Read Only Memory. A type of media to store programs, data, video, and audio files. Chipset: An integrated set of coprocessor chips of microprocessors and controllers that work with the CPU. They are mounted directly on the motherboard. CMOS: Complimentary Metal Oxide Semiconductor. The primary type of integrated circuit used for digital processors and different types of memory. CPU: Central Processing Unit. The primary processing unit inside a microprocessor. DIMM: Dual In-Line Memory Module (see SIMM). Display Adapter: A video expansion board that plugs into a PC slot on the motherboard. DMA: Direct Memory Access. A technology that allows devices to directly access main memory. DRAM: Dynamic Random Access Memory. The most common type of computer memory. EPROM: Erasable Programmable Read Only Memory. Memory that retains its programming, unless being erased (by ultraviolet light).
- 9. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 9 7/16/2013 FireWire: A special high-speed serial bus developed by both Apple and Texas Instruments, that allows for the connection of up to 63 devices. It is also known as the IEEE 1394 standard. Firmware: A special category of memory chips that retain their contents, even when the power is off (see ROM). FPU: Floating Point Unit: The Floating Point Unit is contained within the CPU (in Intel IA-32 Processors), and performs high-speed floating-point arithmetic functions. FSB: Front Side Bus. The data bus on the motherboard that handles data I/O. Hyperthreading: The ability of a processor to run multiple threading programs. IEEE: Institute of Electrical and Electronics Engineers. A membership organization (founded in 1906) that sets standards for both computers and communications. Intel386: The Intel 80386 Microprocessor. The first CPU in the Intel IA-32 Processor family. I/O: Input/Output. An I/O device handles both input and output of data. IP: Instruction Pointer. Also known as a Program Counter (see PC). ISA: Industry Standard Architecture. A peripheral expansion 16-bit bus used in computers (originally called the AT bus, named after the IBM 80286 AT PC). MB: Megabyte. 1 million bytes. MHz: Megahertz. A million cycles per second. MMX: MultiMedia Extensions. A special instruction set, which provides enhancements in regards to speed for video, audio, graphics, and modem operations. Motherboard: The “heart” of a microprocessor. Everything in a computer is ultimately connected to the Motherboard. MS-DOS: Microsoft® Disk Operating System. This is the first OS that was created by Microsoft. Multitasking: The ability of an OS to be able to run multiple tasks simultaneously. OEM: Original Equipment Manufacturer. The vendor of a particular PC brand name.
- 10. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 10 7/16/2013 Opcode: Operation Code. The part of a machine instruction that tells the computer what to do. OS: Computer Operating System. PC: Personal Computer. PC: Program Counter: A special register in the CPU that keeps track of the next instruction to be executed in a program. PCI: Peripheral Component Interconnect. A standardized peripheral 32-bit bus used in computers. Motherboards typically have several PCI slots. Pipelining: The ability for a program to queue instructions, in order to increase processing speed and performance. PC: Program Counter. A special internal CPU register that keeps track of the next instruction to be executed in a program. RAM: Random Access Memory. The area of main memory in a computer. Register: A high-speed storage location, located within the CPU. RISC: Reduced Instruction Set. A large instruction set that performs memory- addressing, bit shifting, arithmetic functions, data movement, and logical operations. ROM: Read Only Memory. Special memory that can only be read from, but not written to. Segment: A separate area of memory. Programs typically run in segments (when running in Microsoft Windows). SIMD: Single Instruction Multiple Data Stream. A computer architecture that performs 1 operation on multiple sets of data. SIMM: Single In-Line Memory Module. A printed circuit board that holds memory chips. SMM: System Management Mode. A mode of operation of the Intel IA-32 Processor. SRAM: Static Random Access Memory. A memory chip that requires power in order to retain its contents.
- 11. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 11 7/16/2013 Stack: A special set of hardware registers or memory that is used for arithmetic calculations, and to keep track of program subroutine addresses and their parameters. Superscaler: A multi-core processor that has 2 or more execution pipelines. USB: Universal Serial Bus. A standardized serial connection in which to connect different type of devices and peripherals to a computer. VRAM: Video Random Access Memory. A special (very fast) type of memory that is used in a display adapter.
- 12. Richard Baker SG360 ComputerOrganization And Assembly Language Research Project #1 Intel IA-32 Processor Architecture Overview Page 12 7/16/2013 Bibliography Book: “Assembly Language for Intel-Based Computers” ~ 5th Edition, by Kip R. Irvine Book: “The Computer Desktop Encyclopedia” ~ 2nd Edition, by Alan Freedman http://www.google.com/ ~ Google Corporation http://en.wikipedia.org/wiki/Main_Page ~ Wikipedia, The Free Encyclopedia http://www.cs.iastate.edu/~prabhu/Tutorial/title.html ~ Iowa State University, Birthplace of the Electronic Digital Computer, “Computer Architecture Tutorial” by Gurpur M. Prabhu http://www.intel.com/ ~ Intel Corporation http://www.embedded.com/2000/0003/0003ia2.htm ~ Embedded Systems Programming, “An Introduction to USB Development” by Jack G. Ganssle http://library.westwood.edu/ico/sg/sg360.html ~ Westwood College Online Library, “Assembly Language for Intel-Based Computers” http://www.osdata.com/topic/language/asm/register.htm ~ OSdata.com, “Assembly Language register set”