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AADDIITTHHYYAA NNEERREELLLLAA
Address: Plot no: 73, Valmikinagar, near ph colony, Adilabad, Pin Code: 504001.
Contacts: Email id:adithyasai95@gmail.com, Phone: +91-9441838004
Software Developing Aspirant - ECE
Career Objective:
To be part of an organization where I can gain professional and technical skill and continuously upgrade myself
to the upcoming technologies. I aim at obtaining sustainable growth along with my organizational goals.
Academics:
COURSE INSTITUTE UNIVERSITY / BOARD YEAR PERCENTAGE
B.Tech. (E.C.E.) CMR ENGINEERING COLLEGE J.N.T.U. 2016 61% (Till 4-1)
M.P.C SRINARAYANA JUNIOR COLLEGE Board Of Intermediate 2012 71%
10TH Board KRISHNAVENI TALENT SCHOOL S.S.C. 2010 69%
Project Summary:
PROJECT 1:
ProjectName: Implementation of Elevator Controller
Description: Inmodern life, elevators have become a key requirement for any public or commercial complex.
This project explains the technical side of the elevator on how it is controlled overits physical movement. It also
coversabout the controls to limit its capacity in terms of weight.
PROJECT 2:
ProjectName: Implementation of Low Power Area Efficiency Using Full Adder
Description:Designof power-efficientand high-speed data path logic systems are one of the most substantial
areas of research in VLSI system design. In digital adders, the speed of addition is limited by the time required
to propagate a carry through the adder. The CSLA is not area efficient because it uses multiple pairs of Ripple
Carry Adders (RCA) to generate partial sum and carry by considering carry input, then the final sum and carry
are selected by the multiplexers (mux).
2
Skills &Achievements
I T Skills: Proficientwiththe use of MS Excel,Word, PowerPoint,Visio.
 Participated in the PAPERPRESENTATION“ILLUMINATE-2K14”in“AZURA2K13” conductedby
CMRIT.
 Participated in the READY FOR PLACEMENTS“ILLUMINATE-2K14”in“AZURA2K13” conductedby
CMRIT.
 Participated in cultural activities(Dancing,singing ,anchoring) at school and college.
 I was awarded as best ANCHOR by our principal in intermediate.
 Been part of College Inter Batches Cricket Leagues
 Stood at the second position at the District levelshuttle competition.
 Participated in GROUP DISSCURTIONS held in CMREC
 Participated QUIZcomputation in schooling .
Strengths:
 Logical Thinking
 Problem Solving
 Flexible to change
 Quickon learning
Hobbies:
 Playing Cricket
 Watching Movies
 Browsing apps
PERSONAL INFORMATION: Date of Birth: 09th May, 1995 ♦ Languages Known: English, Hindi & Telugu ♦
References: Available upon request

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Resume - Adithya Nerella

  • 1. 1 AADDIITTHHYYAA NNEERREELLLLAA Address: Plot no: 73, Valmikinagar, near ph colony, Adilabad, Pin Code: 504001. Contacts: Email id:adithyasai95@gmail.com, Phone: +91-9441838004 Software Developing Aspirant - ECE Career Objective: To be part of an organization where I can gain professional and technical skill and continuously upgrade myself to the upcoming technologies. I aim at obtaining sustainable growth along with my organizational goals. Academics: COURSE INSTITUTE UNIVERSITY / BOARD YEAR PERCENTAGE B.Tech. (E.C.E.) CMR ENGINEERING COLLEGE J.N.T.U. 2016 61% (Till 4-1) M.P.C SRINARAYANA JUNIOR COLLEGE Board Of Intermediate 2012 71% 10TH Board KRISHNAVENI TALENT SCHOOL S.S.C. 2010 69% Project Summary: PROJECT 1: ProjectName: Implementation of Elevator Controller Description: Inmodern life, elevators have become a key requirement for any public or commercial complex. This project explains the technical side of the elevator on how it is controlled overits physical movement. It also coversabout the controls to limit its capacity in terms of weight. PROJECT 2: ProjectName: Implementation of Low Power Area Efficiency Using Full Adder Description:Designof power-efficientand high-speed data path logic systems are one of the most substantial areas of research in VLSI system design. In digital adders, the speed of addition is limited by the time required to propagate a carry through the adder. The CSLA is not area efficient because it uses multiple pairs of Ripple Carry Adders (RCA) to generate partial sum and carry by considering carry input, then the final sum and carry are selected by the multiplexers (mux).
  • 2. 2 Skills &Achievements I T Skills: Proficientwiththe use of MS Excel,Word, PowerPoint,Visio.  Participated in the PAPERPRESENTATION“ILLUMINATE-2K14”in“AZURA2K13” conductedby CMRIT.  Participated in the READY FOR PLACEMENTS“ILLUMINATE-2K14”in“AZURA2K13” conductedby CMRIT.  Participated in cultural activities(Dancing,singing ,anchoring) at school and college.  I was awarded as best ANCHOR by our principal in intermediate.  Been part of College Inter Batches Cricket Leagues  Stood at the second position at the District levelshuttle competition.  Participated in GROUP DISSCURTIONS held in CMREC  Participated QUIZcomputation in schooling . Strengths:  Logical Thinking  Problem Solving  Flexible to change  Quickon learning Hobbies:  Playing Cricket  Watching Movies  Browsing apps PERSONAL INFORMATION: Date of Birth: 09th May, 1995 ♦ Languages Known: English, Hindi & Telugu ♦ References: Available upon request