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Output compare

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Output compare

  1. 1. Structure of Microcontroller EA, RST, ALE, PSEN ROM COUNTER INPUTS OSC INTERRUPT CONTROL 4 I/O PORTS BUS CONTROL SERIAL PORT EXTERNAL INTERRUPTS CPU ON - CHIP RAM ETC TIMER 0 TIMER 1 ADDRESS/DATA TXD RXD P0 P1 P2 P3
  2. 2. Structure of Microcontroller
  3. 3. What are Interrupts? <ul><li>A hardware event is something that happens in the micro-controller's hardware. </li></ul><ul><li>An example of an event is the RESET that occurs when pin 9 is set low. </li></ul><ul><li>Micro-controllers are micro-computers whose architecture has been optimized to respond quickly to external events. </li></ul>
  4. 4. Output Compare Interrupts <ul><li>Output compare interrupts are hardware interrupts that are tied to timer events and this means that they can be used by a micro-controller to enforce the real-time processing of events. </li></ul><ul><li>The output compare event can also be used to effect specific output pins. </li></ul>
  5. 5. Output Compare Interrupts <ul><li>In particular, you will use the output compare interrupt to build a system that outputs a specified voltage using a pulse-width modulation scheme. </li></ul>
  6. 6. Output Compare Interrupts <ul><li>In the Microcontroller output compare events are tied to a 16-bit hardware register (also called a timer) </li></ul><ul><li>This register is incremented at a rate that can be specified by the programmer. </li></ul>
  7. 7. Output Compare Interrupts <ul><li>When the value of timer register equals the value stored in another output compare register , then an output compare event occurs and the Microcontroller responds by issuing an output compare interrupt . </li></ul><ul><li>The counter register cannot be reset or stopped by the user. </li></ul>
  8. 8. Output Compare Interrupts <ul><li>So to generate timing events, we compare the value in timer register against another number that is held in an output compare register . </li></ul><ul><li>When the value in timer register matches the number in the output compare register, we trigger an output-compare event . </li></ul>
  9. 9. Output Compare Interrupts <ul><li>Output compare events are generated in the micro-controller's hardware. </li></ul><ul><li>This event will result in a hardware interrupt (also called an output compare interrupt) being generated if the interrupt is enabled </li></ul>
  10. 10. Output Compare Interrupts <ul><li>Enabling the interrupt means that the software pays attention to the interrupt. </li></ul><ul><li>We enable all interrupts by setting the I bit in the condition code register of the micro-controller. This is bit is usually set in the init() function </li></ul>
  11. 11. IEN0 - Interrupt enable register 0
  12. 12. CMOD - PCA counter mode register (address D9H) bit allocation
  13. 13. CMOD - PCA counter mode register (address D9H) bit allocation
  14. 14. CCON - PCA counter control register (address 0D8H) bit description
  15. 15. CCON - PCA counter control register (address 0D8H) bit description
  16. 16. CCAPMn - PCA modules compare/capture register
  17. 17. CCAPMn - PCA modules compare/capture register
  18. 18. PCA IN COMPARE MODE
  19. 19. PCA IN COMPARE MODE <ul><li>The 16-bit software timer mode is used to trigger interrupt routines, which must occur at periodic intervals. </li></ul><ul><li>It is setup by setting both the ECOM and MAT bits in the module’s CCAPMn register </li></ul>
  20. 20. PCA IN COMPARE MODE <ul><li>The PCA timer will be compared to the module’s capture registers (CCAPnL and CCAPnH) </li></ul><ul><li>when a match occurs, an interrupt will occur, if the ECCFn (CCAPMn SFR) bit for the module is set. </li></ul>
  21. 21. <ul><li>XEM VÍ DỤ MÔ PHỎNG </li></ul><ul><li>vd3 Output Compare </li></ul>

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