Hard IP based SoC
Design
E.Prabakaran
Outline
 Introduction
 Challenges
 Reusable

Components
 Communication-Based Design
 Platform-Based Design
 Networks...
Chip Overview
 Several

millions of
transistors available
 A processor core needs
only some hundred K gates
 Several pr...
Reuse
 Transistors

increases 60% / year
 Design productivity increases 20% / year
 Design gap is growing
 Combat by r...
Challenges
 Core-based







design solves all problems?

Maybe, but several challenges remain:
Core description
S...
Reusable Components
 Intellectual

Property (IP)
 Intellectual Property Rights (IPR)
 Synthesizable Core – Technology
I...
Synthesizable Core
 High-Level

Description (e.g. VHDL or Verilog)
 Functional Verification Completed
 Synthesis is req...
Soft Core
 Technology

Dependent Gate-Level Netlist
 May be parameterizable
 Layout is required
 Size and Speed somewh...
Firm Core
 Encrypted

Black-Box
 Technology Dependent Gate-Level Netlist
 Floor-planning guidelines available
 Layout ...
Hard Core
 Encrypted

Black-Box
 Technology Specific Layout
 Size and Speed Determined
 May cause routing blockages an...
Why use Hard Cores
Why use Hard Cores
 Implementation


Level

Microarchitecture Level

 Specialized

Logic Architecture
 Application Spe...
Why use Hard Cores
 High

Performance
 Low Power Consumption
 Predictable
 Memories
 Processor Cores
 FPGAs
 Analog...
Questions


Q: What is the difference between soft cores and firm cores?


A: Firm cores are secret and the systems comp...
Area Constraint


Since it is in the form of Layout


The size can not be changed



It occupies more area comparing wi...
Hard ip based SoC design
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Hard ip based SoC design

  1. 1. Hard IP based SoC Design E.Prabakaran
  2. 2. Outline  Introduction  Challenges  Reusable Components  Communication-Based Design  Platform-Based Design  Networks On-Chip
  3. 3. Chip Overview  Several millions of transistors available  A processor core needs only some hundred K gates  Several processors fit on one chip
  4. 4. Reuse  Transistors increases 60% / year  Design productivity increases 20% / year  Design gap is growing  Combat by reuse  Reuse by IPRs  Requires new specification, methodology and tools
  5. 5. Challenges  Core-based       design solves all problems? Maybe, but several challenges remain: Core description System description Core intercommunication Verification Production volume
  6. 6. Reusable Components  Intellectual Property (IP)  Intellectual Property Rights (IPR)  Synthesizable Core – Technology Independent  Soft Core – Technology Dependent Netlist  Firm Core – Technology Dependent Netlist  Hard Core – Fixed Layout
  7. 7. Synthesizable Core  High-Level Description (e.g. VHDL or Verilog)  Functional Verification Completed  Synthesis is required  Layout is required  Size and Speed not predictable
  8. 8. Soft Core  Technology Dependent Gate-Level Netlist  May be parameterizable  Layout is required  Size and Speed somewhat predictable  Floorplanning guidelines necessary
  9. 9. Firm Core  Encrypted Black-Box  Technology Dependent Gate-Level Netlist  Floor-planning guidelines available  Layout is required  Size and Speed highly predictable
  10. 10. Hard Core  Encrypted Black-Box  Technology Specific Layout  Size and Speed Determined  May cause routing blockages and problems with chip layout  Not portable to other vendors
  11. 11. Why use Hard Cores
  12. 12. Why use Hard Cores  Implementation  Level Microarchitecture Level  Specialized Logic Architecture  Application Specific Processor Core  General Purpose Processor Core  Architecture Level  Component and Communication Selection
  13. 13. Why use Hard Cores  High Performance  Low Power Consumption  Predictable  Memories  Processor Cores  FPGAs  Analog and Mixed Signal Cores
  14. 14. Questions  Q: What is the difference between soft cores and firm cores?  A: Firm cores are secret and the systems company never get information of the internal architecture.  Q: What advantages do hard cores have?  A: High performance, low power, small, predictable
  15. 15. Area Constraint  Since it is in the form of Layout  The size can not be changed  It occupies more area comparing with Soft core based cell  Constraints are pre defined and generated layout

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