three phase fault analysis with auto reset for temporary fault and trip for permanent fault full report

Three phase fault analysis with auto reset for temporary fault and trip for permanent fault
Reva Institute of Technology & Management Page 1
CONTENTS
1. Introduction
1.1. Introduction
1.2. Objective of the project
1.3. Statement of problem
1.4. Scope of project
2. Project details
2.1. Block diagram
2.2. Circuit diagram
2.3. Hardware used
3. Hardware and software description
3.1. Hardware Description
3.1.1. Microcontroller (89S52)
3.1.1.1. Pin details of 89S52
3.1.1.2. Power circuit
3.1.1.3. Reset circuit
3.1.1.4. Program memory
3.1.1.5. Data memory
3.1.2. Liquid Crystal Display (LCD)
3.1.2.1. Technical specification
3.1.2.2. Precautions
3.1.4. GSM Modem
3.1.4.1. GSM Modem characteristics
3.1.4.2. LED status indicator

3.1.4.3. GSM Services
3.1.4.4. GSM Architecture
3.1.4.5. Communication management
3.1.4.6. Call routing
3.1.4.7. Power control
3.1.4.8. GSM commands
3.1.5. Power supply
3.1.7. Max 232
3.1.8. Push buttons
3.1.9. Transformer
3.1.9.1. Principle of transformer
3.1.9.2. Terminal
3.1.10. Voltage Regulator
3.1.10.1. Feature
3.1.11. Capacitors
3.1.12. Opto coupler
3.1.13. Relay
3.1.14. Other components
3.1.14.1. Resistor
3.1.14.2. Current transducer
3.2. Software Aspect
3.2.1. Keil
3.2.2. Software development cycle
3.2.3. Compiling in DOS environment

3.2.4. Program loader
4. Embedded C page
5. PCB fabrication page (
5.1 PCB fabrication process
6. Result and conclusion
6.1. Result
6.2. Conclusion
7. Future enhancement
8. References
9. Appendix
10. Hardware Circuit With Model

INTRODUCTION
INTRODUTION
Faults on transmission line can be caused by lightning strikes, flash over on
contaminated insulator surface, broken conducting line, short circuit between
conducting lines, etc. Electromagnetic transients in power systems result from a
variety of disturbances on transmission lines, such as faults, are extremely
important. A fault occurs when two or more conductors come in contact with each
other or ground in three Phase systems, faults are classified as Single line-to
ground faults, Line-to-line faults, double line- to-ground faults, and three phase
faults. For it is at such times that the power system components are subjected to the
greater stress from excessive current.
STATEMENT OF PROBLEM
70 to 90% of the faults are transient in nature such as insulator flash over,
lightning, swinging wires and temporary contact with foreign objects.
Remaining 10-20% faults are permanent in nature. Example: a small branch falling
onto the line, broken wire causing a phase to open or a broken pole causing the
phases to short, faults on underground cables.
These faults give rise to serious damage to power system equipment. Fault which
occurs on transmission lines not only affect the equipment but also the power
quality.
OBJECTIVE OF THE PROJECT
The main objective of the project is auto reclosing of the supply in case of
temporary fault and trip in case of permanent. The type of fault (LG OR LL/
transient or permanent) as well as the line in which fault has occurred will be
displayed on LCD and the relevant message will be sent to the concerned person
via GSM modem.

SCOPE OF THE PROJECT
This project can be used to protect the equipment’s such as 3 phase motors,
equipment’s connected to the transmission lines. From control room itself it can be
known in which line what type of fault has occurred can be known.

CHAPTER 2
PROJECT DETAILS
BLOCK DIAGRAM
Fig 2.1.1 Detailed block diagram of three phase fault analysis with auto reset for
temporary and trip for permanent.

CIRCUIT DIAGRAM

2.3 HARDWARE USED
1. TRANSFORMERS 17
2. VOLTAGE REGULATOR (LM7805)
3. FILTER (capacitive)
4. RECTIFIER
5. 555 TIMER 32
6. LM358
7. RELAYS
8. BC547
9. 1N4007
10.RESISTOR
11.CAPACITOR
12.MICROCONTROLLER (AT89S52)
13.PUSH BUTTONS
14.LCD (16×2)
15.MAX232
16.GSM MODEM
17.LED
18. OPTO COUPLER

CHAPTER 3
HARDWARE AND SOFTWARE DESCRIPTION
3.1 TRANSFORMER
Transformers convert AC electricity from one voltage to another with a little loss
of power. Step-up transformers increase voltage, step-down transformers reduce
voltage. Most power supplies use a step-down transformer to reduce the
dangerously high voltage to a safer low voltage.
Fig 3.1 Transformer
The input coil is called the primary and the output coil is called the secondary.
There is no electrical connection between the two coils; instead they are linked by
an alternating magnetic field created in the soft-iron core of the transformer. The
two lines in the middle of the circuit symbol represent the core. Transformers
waste very little power so the power out is (almost) equal to the power in. Note that
as voltage is stepped down and current is stepped up.

The ratio of the number of turns on each coil, called the turn‘s ratio, determines the
ratio of the voltages. A step-down transformer has a large number of turns on its
primary (input) coil which is connected to the high voltage mains supply, and a
small number of turns on its secondary (output) coil to give a low output voltage.
TURNS RATIO = (Vp / Vs) = ( Np / Ns )
Where,
Vp = primary (input) voltage.
Vs = secondary (output) voltage
Np = number of turns on primary coil
Ns = number of turns on secondary coil
Ip = primary (input) current
Is = secondary (output) current.
3.2 VOLTAGE REGULATOR 7805
Features
• Output Current up to 1A.
• Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V.
• Thermal Overload Protection.
• Short Circuit Protection.
• Output Transistor Safe Operating Area Protection.
Fig 3.2 7805 regulator

Description
The LM78XX/LM78XXA series of three-terminal positive regulators are available
in the TO-220/D-PAK package and with several fixed output voltages, making
them useful in a Wide range of applications. Each type employs internal current
limiting, thermal shutdown and safe operating area protection, making it
essentially indestructible. If adequate heat sinking is provided, they can deliver
over 1A output Current. Although designed primarily as fixed voltage regulators,
these devices can be used with external components to obtain adjustable voltages
and currents.
3.3 555 TIMER
The 555 Timer IC is an integrated circuit (chip) implementing a variety of timer
and multi vibrator applications. The IC was designed by Hans R. Camenzind in
1970 and brought to market in 1971 by Signe tics (later acquired by Philips). The
original name was the SE555 (metal can)/NE555 (plastic DIP) and the part was
described as ―The IC Time Machine‖. It has been claimed that the 555 gets its
name from the three 5 Kω resistors used in typical early implementations, [2] but
Hans Camenzind has stated that the number was arbitrary. The part is still in wide
use, thanks to its ease of use, low price and good stability. As of 2003, it is
estimated that 1 billion units are manufactured every year.
Fig 3.3 555timer

Description
Depending on the manufacturer, the standard 555 package includes over 20
transistors, 2 diodes and 15 resistors on a silicon chip installed in an 8-pin mini
dual-in-line package (DIP-8).
The 555 has three operating modes:
 Constable mode: in this mode, the 555 functions as a ―one-shot‖.
Applications include timers, missing pulse detection, bounce free switches,
touch switches, frequency divider, capacitance measurement, pulse-width
modulation (PWM) etc.
 As table – free running mode: the 555 can operate as an oscillator. Uses
include LED and lamp flashers, pulse generation, logic clocks, tone
generation, security alarms, pulse position modulation, etc.
 Bistable mode or Schmitt trigger: the 555 can operate as a flip-flop, if the
DIS pin is not connected and no capacitor is used. Uses include bounce free
latched switches, etc.
Usage The connection of the pins is as follows:
Pin Name Purpose
1. GND Ground, low level (0 V)
2. TRIG OUT rises, and interval starts, when this input falls below 1/3 VCC.
3. OUT This output is driven to +VCC or GND.
4. RESET A timing interval may be interrupted by driving this input to GND.
5. CTRL ―Control‖ access to the internal voltage divider (by default, 2/3
VCC).
6. THR The interval ends when the voltage at THR is greater than at CTRL.
7. DIS Open collector output; may discharge a capacitor between intervals.
8. V+, VCC Positive supply voltage is usually between 3 and 15 V.

Fig 3.4 555 timer pin diagram
Using the 555 as a monostable.
The 555 can be used as a monostable using the circuit shown:
Fig3.5 555TIMER AS A MONOSTABLE
 The output is normally low but will go high for a short length of time
depending on the values of the other components.

 R and C determine the time period of the output pulse
 The input is normally high and goes low to trigger the output (falling edge
triggered).
 The length of the input pulse must be less than the length of the output pulse.
 The 47Uf capacitor ‗decouples ‘the supply to avoid affecting other parts of
the circuit.
 It is standard to add a 10Nf capacitor from pin5 to gnd.
T = 1.1 R C
T – Seconds, R – ohms, C – Farads
The minimum value of R should be about 1k to avoid too much current flowing
into the 555. The maximum value of R should be about 1M so that enough current
can flow into the input of the 555 and there is also current to allow for the
electrolytic capacitors leakage current. The minimum value of C = 100Pf to avoid
the timing equation being too far off. The maximum value of C should be about
1000μF as any bigger capacitors will discharge too much current through the chip.
These maximum and minimum values give a minimum period of 0.1 μs and a
maximum period of 1000s.

Using the 555 as an astable
The 555 can be used as an astable using the circuit shown:-
Fig 3.6 555 TIMER AS A ASTABLE
 The output will oscillate between high and low continuously – the circuit is
not stable in any state
 Ra, Rb and C determine the time period of the output
 The reset, pin 4, must be held high for the circuit to oscillate. If pin 4 is held
low then the output remains low. Pin 4 can be used to turn the astable ‗on‘
and ‗off‘ in effect
 The 47Uf capacitor ‗decouples‘ the supply to avoid affecting other parts of
the circuit
 It is standard to add a 10Nf capacitor from pin5 to gnd.

T = 0.7 ( Ra + 2Rb ) C
T – seconds, R – ohms, C – Farads
As with the monostable the minimum value of Ra should be about 1k to avoid too
much current Flowing into the 555. The maximum value of Ra or Rb should be
about 1M so that enough current can flow into the input of the 555 and there is also
current to allow for the electrolytic capacitors leakage current. The minimum value
of C = 100Pf to avoid the timing equation being too far off. The maximum value of
C should be about 1000μF as any bigger capacitors will discharge too much
current through the chip. These maximum and minimum values give a minimum
frequency of 0.001 Hz and a maximum frequency of 4.8 MHz (in reality it would
not be able to attain these frequencies).
Considering the oscillations in more detail:
The output is controlled by the charging and discharging of the capacitor.
The capacitor charges through Ra and Rb.
But discharges through the discharge pin (pin 7) and thus only through Rb.
The time that the capacitor takes to charge or discharge is given as T = 0.7 R C.
Thus the charge time is 0.7 (Ra + Rb) C.
The discharge time is 0.7 Rb C.
Giving a total time of (0.7 (Ra + Rb) C) + (0.7 Rb C) = 0.7 (Ra + 2Rb) C.
The time the output is high (mark) is thus always longer than the time the output is
low (space).
The 555 astable cannot produce a square wave!
Operation of the 555
It is not necessary to know how the 555 works. In fact a systems approach to
electronics would never consider how any such sub-block works. However, a

knowledge of how the 555 functions is useful. A much simplified block diagram of
the 555 timer is shown:-
Fig 3.7 OPERATION OF 555TIMER
1. The resistors are arranged across the power supply to form a potential divider.
The voltages at the junctions of the potential divider are 2/3 Vcc and 1/3 Vcc.
They are connected to the inputs to a pair of comparators.
2. One comparator, switching at 2/3 Vcc is controlled via the threshold input.
3. The voltage at which the threshold comparator switches can be changed from
2/3 Vcc by applying a voltage to the control pin. This pin is usually decoupled
to ground via a 10Nf capacitor and, in this case, the comparator switches at 2/3
Vcc as expected.
4. One comparator, switching at 1/3 Vcc is controlled via the trigger input.
5. The outputs from the two comparators control a set-reset flip flop (bistable).

6. The reset pin of the 555 (not of the bistable) is usually held high. Taking this
pin momentarily low apply a voltage to the reset pin of the flip flop and the
output falls to zero.
7. The output of the flip flop is connected to the output pin via a power amplifier
circuit which includes short circuit protection etc.
8. The output goes high when the trigger input is less than 1/3 Vcc.
9. The output then remains high until the threshold input rises above 2/3 Vcc.
10. When the output is low, the discharge pin is connected to ground via a
transistor. The capacitor can be organized to discharge through this pin but the
value of the capacitor should be less than 1000μF to avoid damaging the
transistor.
3.4 LM358
General Description
The LM358 series consists of two independent, high gain; internally frequency
compensated operational amplifiers which were designed specifically to operate
from a single power supply over a wide range of voltages. Operation from split
power supplies is also possible and the low power supply current drain is
independent of the magnitude of the power supply voltage. Application areas
include transducer amplifiers, dc gain blocks and all the conventional op amp
circuits which now can be more easily implemented in single power supply
systems. For example, the LM358 series can be directly operated off of the
standard +5V power supply voltage which is used in digital systems and will easily
provide the required interface electronics without requiring the additional ±15V
power supplies.

Unique Characteristics
 In the linear mode the input common-mode voltage range includes ground
and the output voltage can also swing to ground, even though operated from
only a single power supply voltage.
 The unity gain cross frequency is temperature compensated.
 The input bias current is also temperature compensated.
Advantages
 Two internally compensated op amps.
 Eliminates need for dual supplies.
 Allows direct sensing near GND and VOUT also goes to GND.
 Compatible with all forms of logic.
 Power drain suitable for battery operation.
Features
 Available in 8-Bump micro SMD chip sized package.
 Internally frequency compensated for unity gain.
 Large dc voltage gain: 100 Db.
 Wide bandwidth (unity gain): 1 MHz (temperature compensated)
 Wide power supply range:-
Single supply: 3V to 32V Or dual supplies: ±1.5V to ±16V
 Very low supply current drain (500 μA)-essentially independent of supply
voltage.
 Low input offset voltage: 2 mV
 Input common-mode voltage range includes ground.
 Differential input voltage range equal to the power supply voltage.
 Large output voltage swing

PIN CONNECTIONS
1 - Output 1
2 - Inverting input
3 - Non-inverting input
4 - VCC-
5 - Non-inverting input 2
6 - Inverting input 2
7 - Output 2
8 - VCC+
Fig 3.8 PIN DIAGRAM OF LM358
3.5 RELAYS
A relay is an electrically operated switch. Many relays use an electromagnet to
operate a switching mechanism mechanically, but other operating principles are
also used. Relays are used where it is necessary to control a circuit by a low-power
signal (with complete electrical isolation between control and controlled circuits),
or where several circuits must be controlled by one signal.

Fig 3.9 Relays
A relay is an electrically operated switch. Current flowing through the coil of the
relay creates a Magnetic field which attracts a lever and changes the switch
contacts. The coil current can be on or off so relays have two switch positions and
most have double throw (changeover) switch contacts as shown in the diagram.
Relays allow one circuit to switch a second circuit which can be completely
separate from the first. For example a low voltage battery circuit can use a relay to
switch a 230V AC mains circuit. There is no electrical connection inside the relay
between the two circuits; the link is magnetic and mechanical. The coil of a relay
passes a relatively large current, typically 30mA for a 12V relay, but it can be as
much as 100mA for relays designed to operate from lower voltages.

Most ICs (chips) cannot provide this current and a transistor is usually used to
amplify the small IC current to the larger value required for the relay coil. The
maximum output current for the popular 555 timer IC is 200mA so these devices
can supply relay coils directly without amplification. Relays are usually SPDT or
DPDT but they can have many more sets of switch contacts, for example relays
with 4 sets of changeover contacts are readily available.
The coil will be obvious and it may be connected either way round. Relay coils
produce brief high voltage 'spikes' when they are switched off and this can destroy
transistors and ICs in the circuit. To prevent damage you must connect a protection
diode across the relay coil. The figure shows a relay with its coil and switch
contacts. You can see a lever on the left being attracted by magnetism when the
coil is switched on. This lever moves the switch contacts.
Fig 3.10 RELAY WITH COIL AND SWITCH CONTACTS

There is one set of contacts (SPDT) in the foreground and another behind them,
making the relay DPDT. The relay's switch connections are usually labeled COM,
NC and NO:-
 COM = Common, always connect to this; it is the moving part of the switch.
 NC = Normally Closed, COM is connected to this when the relay coil is off.
 NO = Normally Open, COM is connected to this when the relay coil is on.
3.6 DIODE 1N4007
Diodes are used to convert AC into DC these are used as half wave rectifier or full
wave rectifier. Three points must he kept in mind while using any type of diode.
1. Maximum forward current capacity
2. Maximum reverse voltage capacity
3. Maximum forward voltage capacity
Fig 3.11 Diode 1N4007
Diodes of number IN4001, IN4002, IN4003, IN4004, IN4005, IN4006 and IN4007
have maximum reverse bias voltage capacity of 50V and maximum forward
current capacity of 1 Amp.

3.7 RESISTORS
A resistor is a two-terminal electronic component designed to oppose an electric
current by producing a voltage drop between its terminals in proportion to the
current, that is, in accordance with Ohm's law:-
V = IR
Resistors are used as part of electrical networks and electronic circuits. They are
extremely Commonplace in most electronic equipment. Practical resistors can be
made of various compounds and films, as well as resistance wire (wire made of a
high-resistivity alloy, such as nickel/chrome).
Four-band resistors
Four-band identification is the most commonly used color-coding scheme on
resistors. It consists of four colored bands that are painted around the body of the
resistor. The first two bands encode the first two significant digits of the resistance
value, the third is a power-of-ten multiplier or number-of zeroes, and the fourth is
the tolerance accuracy, or acceptable error, of the value. The first three bands are
equally spaced along the resistor; the spacing to the fourth band is wider.

Sometimes a fifth band identifies the thermal coefficient, but this must be
distinguished from the true 5-color system, with 3 significant digits.
For example: - green-blue-yellow-red is 56×104 Ω = 560 kΩ ± 2%. An easier
description can be as followed: the first band, green, has a value of 5 and the
second band, blue, has a value of 6, and is counted as 56. The third band, yellow,
has a value of 104, which adds four 0's to the end, creating 560,000 Ω at ±2%
tolerance accuracy. 560,000 Ω changes to 560 kΩ ±2% (as a kilo- is 103). Each
color corresponds to a certain digit, progressing from darker to lighter colors, as
shown in the chart below.
POTENTIOMETERS
A common element in electronic devices is a three-terminal resistor with a
continuously adjustable tapping point controlled by rotation of a shaft or knob.
These variable resistors are known as potentiometers when all three terminals are

present, since they act as a continuously adjustable voltage divider. A common
example is a volume control for a radio receiver.
Accurate, high-resolution panel-mounted potentiometers (or "pots") have
resistance elements typically wire wound on a helical mandrel, although some
include a conductive-plastic resistance coating over the wire to improve resolution.
These typically offer ten turns of their shafts to cover their full range. They are
usually set with dials that include a simple turn’s counter and a graduated dial.
Electronic analog computers used them in quantity for setting coefficients, and
delayed-sweep oscilloscopes of recent decades included one on their panels.
3.8 OPTO COUPLER
In electronics, an opto-isolator, also called an optocoupler, photo coupler, or
optical isolator, is a component that transfers electrical signals between two
isolated circuits by using light. Opto-isolators prevent high voltages from affecting
the system receiving the signal. Commercially available opto-isolators withstand
input-to-output voltages up to 10 kV and voltage transients with speeds up to
10 kV/μs.

A common type of opto-isolator consists of an LED and a phototransistor in the
same opaque package. Other types of source-sensor combinations include LED-
photodiode, LED-LASCR, and lamp-photo resistor pairs. Usually opto-isolators
transfer digital (on-off) signals, but some techniques allow them to be used with
analog signals.
Fig 3.11 OPTO COUPLER
3.1.1 MICROCONTROLLER
Computer in its simplest form needs at least three basic blocks: the central
processing unit (CPU), Input-output (I/O) and memory (RAM/ROM). The
integrated form of CPU is the microprocessor. As the use of microprocessors in
control applications is increased, development of microcontroller unit or MCU
took shape, wherein CPU, I/O and some limited memory on a single, chip was
fabricated. Intention was to reduce the chip count as much as possible.
Looking back into the history of microcomputers, one would at first come across
the development of microprocessor, I.e.., the processing element, and later on the

peripheral devices. The three basic elements – the CPU, I/O devices and memory-
have developed in distinct direction. While the CPU has been the proprietary item,
the memory devices fall into general-purpose category and the I/O devices may be
grouped somewhere in- between.
The reasons for popularity of the microcontroller are as follows:-
 Instead of focusing upon the larger word length and address space the
emphasis in development of microcontroller has been upon exceedingly fast
real time control.
 It has focused upon the integration of the facilities needed to support fast
control into single chip.
 The integration of the basic blocks of a microcomputer system into a single
chip brings about some architectural advantages.
 The execution speed of the processing is limited only by the speed of the
chip, as there is no slowdown from transferring data between memory and
CPU as in the multi-chip design.
 The inclusion of data and program memories simplifies the user’s hardware
interface problems and system implementation. As most of the peripherals
are induced in a single chip the system will be compact.
The control applications of microprocessors have different requirements, both
hardware-wise as well as software-wise. Whereas microprocessor has just
sufficient number of on-chip devices to act as the CPU, a number of other
auxiliary devices are needed to get a working microcontroller.
The family of second generation microcontrollers from Intel, the 8051 and
other related devices, has brought about a new revolution in this field. While the
early microcontrollers had only limited memory and existent serial I/O capability,
the 8051 provides for 4k PROM/ROM, 128 byte RAM and 32 I/O lines. It also

includes a universal asynchronous receive-transmit (UART) device, two 16-bit
timer/counter and elaborate Interrupt logic. Lack of multiply and divide
instructions, has also been taken care of in the 8051. For the requirement of more
memory 89C52 microcontroller was implemented in this project.
The AT89C52 is a low power, high performance CMOS 8 bit microcomputer with
8 Kbytes of flash programmable and Erasable read only memory. This device is
manufactured using Atmel’s high density non-volatile memory technology and is
compatible with the industry standard. The on chip flash allows the program
memory to be reprogrammed in system or by a conventional non-volatile memory
programmer. By combining the versatile 8 bit CPU with flash on a monolithic chip
the Atmel AT89C52 is a powerful microcomputer which provides highly flexible
and cost effective solutions to many embedded control applications.
The 89C52 is a single chip microcomputer with I/O port, timer, clock generator,
Data memory, program memory stack, ADC and serial ports etc.
 8 bit CPU with registers A and B.
 16 bit Program Counter and Data Pointer.
 8 bit Program Status Word.
 8 bit stack pointer.
 Internal ROM of 8K bytes.
 Internal RAM of 256 bytes, 4 register banks each containing 8registers.
 Two 16 bit timer / counter.
 Full duplex serial data receiver/transmitter.
 Special function registers like TCON, TMOD and SCON etc.
 Two external and three internal interrupt sources.
Microcontrollers are used in automatically controlled products and devices such as
automobile engine control systems, home security systems, hotel security and

monitoring systems, remote controls, office machines, appliances, power tools, and
toys. By reducing the size and cost compared to a design that uses a separate
microprocessor, memory, and input/output devices, microcontrollers make it
economical to digitally control even more devices and processes.
Fig 3.1.1 PIN DIAGRAM

3.1.1.1 Pin Details of 89S52
The on-chip oscillator of 8031 can be used to generator system clock. Depending
upon version of the device, crystals from 3.5 to 12 MHz may be used for this
purpose. The system clock is internally divided by 6 and the resultant time period
becomes one processor cycle. The instructions take mostly one or two processor
cycles. The ALE (address latch enable) pulse rate is 1/6th
of the system clock,
except during access of internal program memory, and thus can be used for timing
purposes.
The two internal timers are wired to the system clock and persecuting factor is
decided by the software apart from the count stored in the two bytes of the timer
control registers. One of the counters, as mentioned earlier, is used for generation
of baud rate clock for the UART. It would be of interest to point out that the 8052
has a third timer which is usually used for generation of baud rate.
VSS
Circuit ground potential.
VCC
5-volt power supply input for normal operation and program verification.
PORT 0
Port 0 is an 8-bit open drain BI directional input output port. It is also the
multiplexed low ordered address and data bus when using external memory. It is
used for data output during program verification Port 0 can sink (and in bus
operations can source) 8 LSTTL loads.
PORT 1
Port 1 is an 8 bit quasi bi-directional I/O port. It is also used for low order address
byte during program verification. Port 1 can sink / source 4 LSTTL loads.

PORT 2
Port 2 is an 8 bit quasi bi-directional I/O port. It also emits the high order address
byte when according external memory. It is used for the high order address and the
control signals during program verification. Port 2 can sink / source 4 LSTTL
loads.
PORT 3
Port 3 is an 8 bit quasi bi-directional I/O port with internal pull ups. It also serves
the function of various special features of the MCS-51th.
Family of alternate functions are listed below:-
P3.0 RXD (serial input port)
P3.1 TXD (serial input port)
P3.2 INTO (external interrupt)
P3.3 INT1 (external interrupt)
P3.4 TO (timer /counter 1 external input)
P3.5 T1 (timer/ counter 1 external input)
P3.6 WR (external data memory-write strobe)
P3.7 RD (external data memory read strobe)
The output latch corresponding to a secondary function must be
programmed to a one (1) for that function to operate. Port 3 can sink /source 4
LSTTL loads.
RST
A high on this pin for two-machine cycle while the oscillator is running rests the
devices. A small external pull down resistor (=8.2 kilo ohms) from RST to VSS
permits power on reset when a capacitor (=10 microfarad) is also connected from
this pin to VCC.

ALE
Address latch enable output for latching the low byte during access to external
memory. ALE is activated at a constant rate of 1/6 the oscillator frequency except
during an external data memory access at which time one ALE pulse is skipped.
PSEN
The program store enable output for latching the low byte of the during access to
external memory six oscillator periods except during external data memory access
PSEN remains high during internal program memory. Do not float EA during
normal operation.
XTAL 1
Input to the inverting amplifier that forms the part of the oscillator and input to the
internal clock generator. XTAL2 receives the oscillator signal when an external
oscillator used.
XTAL 2
Output of the inverting amplifier that forms the part of the oscillator and input to
the interval clock generator. XTAL2 receives the oscillator signal when an external
oscillator used.
3.1.1.2 Power Supply
The AT89C52 operates with a single +5V power supply. It consists of two power
supply pins VCC and VSS. Power supply is given to VCC with respect to VSS,
which is power supply ground.
3.1.1.3 Reset Circuit
In AT89C52 the reset input is RST pin. A reset is accomplished by holding the
RST pin high for at least two machine cycles( 24 oscillator periods), while the

oscillator is running. The CPU responds by generating an internal reset with the
timing.
The reset in AT89C52 is positive active, which means that the processor runs
when the reset pin is held low. This is in contrast to the other devices that all have
a negatively active reset. The AT89C51 has an internal pull down and RC delay
circuit built in to delay the processor setup until the built in oscillator operation has
stabilized.
Fig. 3.1.1.3 RESET CIRCUIT
3.1.1.4 Program Memory
Up to 8 Kbytes of the program memory can reside on the chip. In addition the
device addresses up to 64 Kbytes of program memory external to the chip.
3.1.1.5 Data Memory
This microcontroller has a 256 on-chip RAM. In addition it can address up to 64K
bytes of external data memory.

3.1.2 LIQUID CRYSTAL DISPLAY (LCD)
A Liquid crystal display (LCD) is a low cost, low power device capable of
displaying text and images. LCDs are extremely common in embedded systems,
since such systems often do not have video monitors like those that come standard
with desktop systems. LCDs can be found in numerous common devices like
watches, fax and copy machines, and calculators.
LCD is an electronically-modulated optical device shaped into a thin, flat panel
made up of any number of color or monochrome pixels filled with liquid crystals
and arrayed in front of a light source (backlight) or reflector.
LCDs with a small number of segments, such as the one shown in the below figure,
have individual electrical contacts for each segment. An external dedicated circuit
supplies an electric charge to control each segment. This display structure is
unwieldy for more than a few display elements.
The LCD controller provides a relatively simple interface between a processor and
an LCD. LCDs can be added quite easily to an application and use as few as three
digital output pins for control.
Communication bus
Fig. 3.1.2 SCHEMATIC DIAGRAM OF LCD
Microcontroller
LCD controller
E
R/W
R/S
DB7-DB0

There are different types of LCDs such as reflective LCD, absorption LCD, dot
matrix LCD. Each type of LCD is able to display multiple characters. In addition,
each character may be displayed in normal or inverted fashion. The LCD may
permit a character to be blinking or may permit display of a cursor indicating the
current character. Such functionality would be difficult to be implemented using
software. Thus, an LCD controller is used to provide a simple interface to an LCD,
perhaps eight data inputs and one enable input.
This byte may be a control word, which can be an instruction or data word. The
most common connector used for the 44780 based LCDs is 14 pins in a row, with
pin centers 0.100" apart. The pins are wired as:-

PINS DESCRIPTIONS
1 Ground
2 VCC
3 Contrast Voltage
4 "R/S"_Instruction / Register Select
5 "R/S"_Read/ Write LCD Registers
6 "E" Clock
7-14 Data I/O Pins
Table 15.1 LCD Pins Description
3.1.2.1 Technical Specifications
 Display format - 16 characters x 2 lines.
 Construction - TN/STN LCD panel, Bezel, Zebra and PCB.
 Optional Edge - Array LED or EL backlight.
 Controller - KS0066U or Equivalent.
 Power - 5V single power input.
 Temperature - Normal / Custom available.
3.1.2.2 Precautions
 An LCD module is a fragile item and should not be subjected to strong
Mechanical shocks.
 Avoid applying pressure to the module surface, this will distort the glass and
Cause a change in color.
 Under no circumstances should the position of the Bezel tabs or their shape
Be modified.
 Do not modify or move location of the zebra or heat seal connectors.

Above is the quite simple schematic. The LCD panel's Enable and Register Select
is connected to the Control Port. The Control Port is an open collector / open drain
output. While most Parallel Ports have internal pull-up resistors, there are few
which don't. Therefore by incorporating the two 10K external pull up resistors, the
circuit is more portable for a wider range of computers, some of which may have
no internal pull up resistors.
In the above memory map, area up to 0F and 4F is the visible display. As one can
see, it measures 16 characters per 2 lines. The numbers in each box in memory
address that corresponds to that on screen. Thus the “Set Cursor Position”
instruction 80h tells the LCD to position the cursor. Adding the cursor Position to
80h does these sets the cursor to the required position on the screen.
It make no effort to place the Data bus into reverse direction. Therefore we hard
wire the R/W line of the LCD panel, into write mode. This will cause no bus
conflicts on the data lines. As a result we cannot read back the LCD's internal Busy
Flag which tells us if the LCD has accepted and finished processing the last
instruction. This problem is overcome by inserting known delays into our program.
The 10k Potentiometer controls the contrast of the LCD panel.
3.1.4 GSM MODEM
GSM technology is one of the new technologies in the embedded field to make the
communication between microcontroller and mobile. Now every embedded system
is used to communicate with other system using GSM and GPRS technology. In
this project MODEM is used to access the message sent by the user to display in
notice board.

3.1.4.1 GSM Modem Characteristics
 GSM modem (EGSM 900/1800 MHz) / (EGSM 900/1800/1900 MHz).
 Designed for GPRS, data, fax, SMS and voice applications.
 Fully compliant with ETSI GSM Phase 2+ specifications (Normal MS).
 Input voltage: 8V – 40V.
 Input current: 8mA in idle mode, 150ma in communication GSM 900
@12V.
 Temperature range: Operating -20 to +55 degree Celsius; Stag -25 to +70
degree Celsius.
 Overall dimensions: 80mm x 62mm x 32mm / weight 200g.
3.1.4.2 LED Status Indicator
 OFF Modem Switched off.
 ON Modem is connecting to the network.
 Flashing Slowly Modem is in idle mode.
 Flashing rapidly Modem is in transmission/communication (GSM only).
3.1.4.3 GSM Services
From the beginning, the planners of GSM wanted ISDN compatibility in terms of
the services offered and the control signaling used. However, radio transmission
limitations, in terms of bandwidth and cost, do not allow the standard ISDN B-
channel bit rate of 64 kbps to be practically achieved.
Using the ITU-T definitions, telecommunication services can be divided into
bearer services, tele services, and supplementary services. The most basic tele
service supported by GSM is telephony. As with all other communications, speech
is digitally encoded and transmitted through the GSM network as a digital stream.

There is also an emergency service, where the nearest emergency-service provider
is notified by dialing three digits (similar to 911).
A variety of data services is offered. GSM users can send and receive data, at rates
up to 9600 bps, to users on POTS (Plain Old Telephone Service), ISDN, Packet
Switched Public Data networks, and Circuit Switched Public Data Networks using
a variety of access methods and protocols, such as X.25 or X.32. Since GSM is a
digital network, a modem is not required between the user and GSM network,
although an audio modem is required inside the GSM network to interwork with
POTS.
Other data services include Group 3 facsimile, as described in ITU-T
recommendation T.30, which is supported by use of an appropriate fax adaptor. A
unique feature of GSM, not found in older analog systems, is the Short Message
Service (SMS). SMS is a bidirectional service for short alphanumeric (up to 160
bytes) messages. Messages are transported in a store-and-forward fashion. For
point-to-point SMS, a message can be sent to another subscriber to the service, and
an acknowledgement of receipt is provided to the sender. SMS can also be used in
a cell-broadcast mode, for sending messages such as traffic updates or news
updates. Messages can also be stored in the SIM card for later retrieval.
Supplementary services are provided on top of tele services or bearer services. In
the current (Phase I) specifications, they include several forms of call forward
(such as call forwarding when the mobile subscriber is unreachable by the
network), and call barring of outgoing or incoming calls, for example when
roaming in another country. Many additional supplementary services will be
provided in the Phase 2 specifications, such as caller identification, call waiting,
multi-party conversations.
GSM Technology was designed to meet the following criteria:-

 Good subjective speech quality
 Low terminal and service cost
 Support for international roaming
 Ability to support handheld terminals
 Support for range of new services and facilities
 Spectral efficiency
 ISDN compatibility
3.1.4.4 GSM Architecture
A GSM network is composed of several functional entities, whose functions and
interfaces are specified. Figure 4.16 shows the layout of a generic GSM network.
The GSM network can be divided into three broad parts.
The Mobile Station is carried by the subscriber. The Base Station Subsystem
controls the radio link with the Mobile Station. The Network Subsystem, the main
part of which is the Mobile Services Switching Center (MSC), performs the
switching of calls between the mobile users, and between mobile and fixed
network users. The MSC also handles the mobility management operations. Not
shown is the Operations and Maintenance Center, which oversees the proper
operation and setup of the network.

Fig: - Architecture of GSM Network
MOBILE STATION
The mobile station (MS) consists of the mobile equipment (the terminal) and a
smart card called the Subscriber Identity Module (SIM). The SIM provides
personal mobility, so that the user can have access to subscribed services
irrespective of a specific terminal. By inserting the SIM card into another GSM
terminal, the user is able to receive calls at that terminal, make calls from that
terminal, and receive other subscribed services.
The mobile equipment is uniquely identified by the International Mobile
Equipment Identity (IMEI). The SIM card contains the International Mobile
Subscriber Identity (IMSI) used to identify the subscriber to the system, a secret

key for authentication, and other information. The IMEI and the IMSI are
independent, thereby allowing personal mobility. The SIM card may be protected
against unauthorized use by a password or personal identity number.
BASE STATION SUBSYSTEM
The Base Station Subsystem is composed of two parts, the Base Transceiver
Station (BTS) and the Base Station Controller (BSC). These communicate across
the standardized Abis interface, allowing (as in the rest of the system) operation
between components made by different suppliers. The Base Transceiver Station
houses the radio transceivers that define a cell and handles the radio link protocols
with the Mobile Station. In a large urban area, there will potentially be a large
number of BTSs deployed, thus the requirements for a BTS are ruggedness,
reliability, portability, and minimum cost.
The Base Station Controller manages the radio resources for one or more BTSs. It
handles radio-channel setup, frequency hopping, and handovers, as described
below. The BSC is the connection between the mobile station and the Mobile
service Switching Center (MSC).
NETWORK SUBSYSTEM
The central component of the Network Subsystem is the Mobile services Switching
Center (MSC). It acts like a normal switching node of the PSTN or ISDN, and
additionally provides all the functionality needed to handle a mobile subscriber,
such as registration, authentication, location updating, handovers, and call routing
to a roaming subscriber. These services are provided in conjunction with several
functional entities, which together form the Network Subsystem. The MSC
provides the connection to the fixed networks (such as the PSTN or ISDN).
Signaling between functional entities in the Network Subsystem uses Signaling

System Number 7 (SS7), used for trunk signaling in ISDN and widely used in
current public networks.
The Home Location Register (HLR) and Visitor Location Register (VLR), together
with the MSC, provide the call-routing and roaming capabilities of GSM. The
HLR contains all the administrative information of each subscriber registered in
the corresponding GSM network, along with the current location of the mobile.
The location of the mobile is typically in the form of the signaling address of the
VLR associated with the mobile station. The actual routing procedure will be
described later. There is logically one HLR per GSM network, although it may be
implemented as a distributed database.
The Visitor Location Register (VLR) contains selected administrative information
from the HLR, necessary for call control and provision of the subscribed services,
for each mobile currently located in the geographical area controlled by the VLR.
Although each functional entity can be implemented as an independent unit, all
manufacturers of switching equipment to date implement the VLR together with
the MSC, so that the geographical area controlled by the MSC corresponds to that
controlled by the VLR, thus simplifying the signaling required. Note that the MSC
contains no information about particular mobile stations --- this information is
stored in the location registers.
The other two registers are used for authentication and security purposes. The
Equipment Identity Register (EIR) is a database that contains a list of all valid
mobile equipment on the network, where each mobile station is identified by its
International Mobile Equipment Identity (IMEI). An IMEI is marked as invalid if it
has been reported stolen or is not type approved. The Authentication Center (AuC)
is a protected database that stores a copy of the secret key stored in each

subscriber's SIM card, which is used for authentication and encryption over the
radio channel.
RADIO LINK ASPECTS
The International Telecommunication Union (ITU), which manages the
international allocation of radio spectrum (among many other functions), allocated
the bands 890-915 MHz for the uplink (mobile station to base station) and 935-960
MHz for the downlink (base station to mobile station) for mobile networks in
Europe. Since this range was already being used in the early 1980s by the analog
systems of the day, the CEPT had the foresight to reserve the top 10 MHz of each
band for the GSM network that was still being developed. Eventually, GSM will be
allocated the entire 2x25 MHz bandwidth.
MULTIPLE ACCESS AND CHANNEL STRUCTURE
Since radio spectrum is a limited resource shared by all users, a method must be
devised to divide up the bandwidth among as many users as possible. The method
chosen by GSM is a combination of Time- and Frequency-Division Multiple
Access (TDMA/FDMA). The FDMA part involves the division by frequency of
the (maximum) 25 MHz bandwidth into 124 carrier frequencies spaced 200 kHz
apart. One or more carrier frequencies are assigned to each base station. Each of
these carrier frequencies is then divided in time, using a TDMA scheme. The
fundamental unit of time in this TDMA scheme is called a burst period and it lasts
15/26 ms (or approx. 0.577 ms). Eight burst periods are grouped into a TDMA
frame (120/26 ms, or approx. 4.615 ms), which forms the basic unit for the
definition of logical channels.
Channels are defined by the number and position of their corresponding burst
periods. All these definitions are cyclic, and the entire pattern repeats
approximately every 3 hours. Channels can be divided into dedicated channels,

which are allocated to a mobile station, and common channels, which are used by
mobile stations in idle mode.
BURST STRUCTURE
There are four different types of bursts used for transmission in GSM. The normal
burst is used to carry data and most signaling. It has a total length of 156.25 bits,
made up of two 57 bit information bits, a 26 bit training sequence used for
equalization, 1 stealing bit for each information block (used for FACCH), 3 tail
bits at each end, and an 8.25 bit guard sequence, as shown in Figure 2. The 156.25
bits are transmitted in 0.577 ms, giving a gross bit rate of 270.833 kbps.
The F burst, used on the FCCH, and the S burst, used on the SCH, have the same
length as a normal burst, but a different internal structure, which differentiates
them from normal bursts (thus allowing synchronization). The access burst is
shorter than the normal burst, and is used only on the RACH.
The same initial random number and subscriber key are also used to compute the
ciphering key using an algorithm called A8. This ciphering key, together with the
TDMA frame number, use the A5 algorithm to create a 114 bit sequence that is
XORed with the 114 bits of a burst (the two 57 bit blocks). Enciphering is an
option for the fairly paranoid, since the signal is already coded, interleaved, and
transmitted in a TDMA manner, thus providing protection from all but the most
persistent eavesdroppers.
Another level of security is performed on the mobile equipment itself, as opposed
to the mobile subscriber. As mentioned earlier, each GSM terminal is identified by
a unique International Mobile Equipment Identity (IMEI) number. A list of IMEIs
in the network is stored in the Equipment Identity Register (EIR). The status
returned in response to an IMEI query to the EIR is one of the following:

White-listed The terminal is allowed to connect to the network.
Grey-listed The terminal is under observation from the network for problems.
Black-listed The terminal has either been reported stolen, or is not type
approved (the correct type of terminal for a GSM network).
3.1.4.5 Communication Management
The Communication Management layer (CM) is responsible for Call Control (CC),
supplementary service management, and short message service management. Each
of these may be considered as a separate sub-layer within the CM layer. Call
control attempts to follow the ISDN procedures specified in Q.931, although
routing to a roaming mobile subscriber is obviously unique to GSM. Other
functions of the CC sub-layer include call establishment, selection of the type of
service (including alternating between services during a call), and call release.
3.1.4.6 Call Routing
Unlike routing in the fixed network, where a terminal is semi-permanently wired to
a central office, a GSM user can roam nationally and even internationally. The
directory number dialed to reach a mobile subscriber is called the Mobile
Subscriber ISDN (MSISDN), which is defined by the E.164 numbering plan. This
number includes a country code and a National Destination Code which identifies
the subscriber's operator. The first few digits of the remaining subscriber number
may identify the subscriber's HLR within the home PLMN.
An incoming mobile terminating call is directed to the Gateway MSC (GMSC)
function. The GMSC is basically a switch which is able to interrogate the
subscriber's HLR to obtain routing information, and thus contains a table linking
MSISDNs to their corresponding HLR. A simplification is to have a GSMC handle

one specific PLMN. It should be noted that the GMSC function is distinct from the
MSC function, but is usually implemented in an MSC.
The routing information that is returned to the GMSC is the Mobile Station
Roaming Number (MSRN), which is also defined by the E.164 numbering plan.
MSRNs are related to the geographical numbering plan, and not assigned to
subscribers, nor are they visible to subscribers.
The most general routing procedure begins with the GMSC querying the called
subscriber's HLR for an MSRN. The HLR typically stores only the SS7 address of
the subscriber's current VLR, and does not have the MSRN (see the location
updating section). The HLR must therefore query the subscriber's current VLR,
which will temporarily allocate an MSRN from its pool for the call. This MSRN is
returned to the HLR and back to the GMSC, which can then route the call to the
new MSC. At the new MSC, the IMSI corresponding to the MSRN is looked up,
and the mobile is paged in its current location area.
Fig. 3.1.4.6 CALL ROUTING FOR MOBILE TERMINATING CALL

3.1.4.7 Power control
There are five classes of mobile stations defined, according to their peak
transmitter power, rated at 20, 8, 5, 2, and 0.8 watts. To minimize co-channel
interference and to conserve power, both the mobiles and the Base Transceiver
Stations operate at the lowest power level that will maintain an acceptable signal
quality. Power levels can be stepped up or down in steps of 2 dB from the peak
power for the class down to a minimum of 13 dB (20 mill watts).
Description Syntax Expected Result
Set SMS to text
mode, as opposed to
PDU mode
AT + CMGF = 1 OK
Send an SMS to
myself
AT + CMGS = “+861391818xxxx
>This is a Test
“CMGS:34
OK
Unsolicited
notification of the
SMS arriving
+CMTI:”SM”,1
Read SMS message
that has just arrived.
Note: The number
should be the same
as that given in the
+CMTI notification
AT + CMGR = 1
+CMGR:”REC UNREAD”,
“+8613918186089”,
”02/03/30,20:40:31+00”
This a test
OK
Reading the
message again
changes the status to
“READ” from
”UNREAD”
AT+CMGR=1
+CMGR:”REC READ”
“+8613918186089”,
“02/01/30,20:40:31+00”
This is a test
OK
Send another SMS
to myself
AT+CMGS=”+961391818xxxx”
>Test again
+CMGS:35
OK
Unsolicited
notification of the
SMS arriving
+CMTI:”SM”,2
+CMGL: 1,”REC READ”,
“+8613918186089”,”02/01/30,20:40:31+00”
This is a test

Listing all SMS
messages
Note: “ALL” must
be in uppercase
AT+CMGL=”ALL”
+CMGL: 2,”REC UNREAD”,”
“,”+8613918186089”
“02/01/30,20:45:12+00”
Test again
OK
Delete an SMS
message
AT+CMGD=1 OK
List all SMS
messages to show
message has been
deleted AT+CMGL=”ALL”
+CMGL: 2,”REC READ”,”
“,”+8613918186089”
“02/01/30,20:45:12+00”
Test again
OK
Send SMS using
Chinese characters
AT+CSMP=17,0,2 OK
Table. GSM Command
3.1.5 POWER SUPPLY
Main building block of any electronic system is the power supply to provide
required power for their operation. For the microcontroller, audio amplifier,
keyboard, edge connector +5V is required. The power supply provides regulated
output voltage of +5V, and non-regulated output voltage +12V.
Three terminal IC 7805 meets the requirement of +5V regulated. The secondary
voltage from the main transformer is rectified by diodes D1-D4 and is filtered by
capacitor C1. This unregulated dc voltage is supplied to input pin of regulator IC.
C2 is an input bypass capacitor and C3 is to improve ripple rejection. The IC used
are fixed regulator with internal short circuit current limiting and thermal shut
down capability.

POWER SUPPLY CIRCUIT
Power supply required for the micro controller 89C52 is 5 volts. The LM78XX
series of three terminal regulators is available with several fixed output voltages
making them useful in a wide range of applications. Initially a step down
transformer is used to step down the input voltage to be given to the rectifier,
which converts A.C voltage to D.C voltage.
The transformer produces 12 volts D.C. This is given to the 7805-voltage regulator
to produce 5 volts D.C. The voltage ranges of different 78XX series like LM7805C
used for 5V.

3.1.7 MAX 232
There are 4 serial Data transmission modes.
Fig. MAX 232
Mode 0---- Shift register mode
Mode 1---- standard UART mode
Mode 2---- multiprocessor mode
Mode 3----

In this project mode 1 is used that standard UART mode
It is 10 bit full duplex transmit and receive mode.
Transmitted data is sent as a start bit, eight data bits and a stop bit.
BAUD RATE:
If standard baud rate are desired, then an 11.0592 megahertz crystal could be
selected. To get standard baud rate of 9600 hertz then, the setting of TH 1 may be
found as follows.
TH1= 256d- (2/32 x11.0592x106
/12x 9600d)
= 253.000d
= OFDh.
3.1.8 Push button

A push-button (also spelled pushbutton) or simply button is a simple switch
mechanism for controlling some aspect of a machine or a process. Buttons are
typically made out of hard material, usually plastic or metal. The surface is usually
flat or shaped to accommodate the human finger or hand, so as to be easily
depressed or pushed. Buttons are most often biased switches, though even many
un-biased buttons (due to their physical nature) require a spring to return to their
un-pushed state. Different people use different terms for the "pushing" of the
button, such as press, depress, mash, and punch.
USES:
In industrial and commercial applications push buttons can be linked together by a
mechanical linkage so that the act of pushing one button causes the other button to
be released. In this way, a stop button can "force" a start button to be released. This
method of linkage is used in simple manual operations in which the machine or
process have no electrical circuits for control.
Pushbuttons are often color-coded to associate them with their function so that the
operator will not push the wrong button in error. Commonly used colors are red for
stopping the machine or process and green for starting the machine or process.
Red pushbuttons can also have large heads (mushroom shaped) for easy operation
and to facilitate the stopping of a machine. These pushbuttons are called
emergency stop buttons and are mandated by the electrical code in many
jurisdictions for increased safety. This large mushroom shape can also be found in
buttons for use with operators who need to wear gloves for their work and could
not actuate a regular flush-mounted push button. As an aid for operators and users
in industrial or commercial applications, a pilot light is commonly added to draw
the attention of the user and to provide feedback if the button is pushed. Typically
this light is included into the center of the pushbutton and a lens replaces the
pushbutton hard center disk.

The source of the energy to illuminate the light is not directly tied to the contacts
on the back of the pushbutton but to the action the pushbutton controls. In this way
a start button when pushed will cause the process or machine operation to be
started and a secondary contact designed into the operation or process will close to
turn on the pilot light and signify the action of pushing the button caused the
resultant process or action to start.
In popular culture, the phrase "the button" refers to a (usually fictional) button that
a military or government leader could press to launch nuclear weapons.
Push to ON button:
Fig: 3.1.8 Push ON Button
Initially the two contacts of the button are open. When the button is pressed they
become connected. This makes the switching operation using the push button.

3.2 SOFTWARE ASPECTS
3.2.1 Keil
Keil development tools for the 8051 microcontroller architecture supports every
level of software developer from the professional applications engineered to the
student just learning about embedded software development.
The Keil 8051 development tools are designed to solve the complex problems
facing embedded software developer. The keil software 8051 development tools
are programs used to compile C code, assemble source files, link and locate object
modules and libraries, create hex files, and debug the target program. Some of the
commonly used keil software 8051 development tools are:-
 µvision4 for windows is an integrated development environment that combines
project management, source code editing and program debugging in one single
powerful environment.
 The C51 ANSI optimizing C cross compiler creates re-locatable object
modules from the C source code.
 The A51 macro assembler creates re-locatable object modules from the 8051
assembly source code.
 The L51 linker/locater combines re-locatable object modules created by the
C51 compiler and the A51 assembler into object modules.
 The LIB51 library manager combines object modules into libraries that may be
used by the linker.
 The OHS51 object-HEX converter creates Intel HEX files from absolute object
modules.

3.2.2 Software Development Cycle
When the keil software tools are used, the project development cycle is roughly the
same as it is for any other software development project.
 Create a project, select the target chip from the device database, and
configure the tools settings.
 Create source files in C or assembly.
 Build the application with the project manager.
 Correct the errors in source files.
 Test the linked application.
µvision4 IDE
The µvision4 IDE combines project management, a rich-featured editor with
interactive error correction, option setup, make facility, and online help. µvision4
is used to create the source files and organize them into a project that defines the
target application. µvision4 automatically compiles, assembles and links the
embedded application and provides a single focal point for the development
efforts.
C51 Compiler and A51 Assembler
Source files are created by the µ vision4 IDE and are passed to the C51 compiler
or A51 Assembler. The compiler and assembler process source files and create re-
locatable files. The Keil C51 compiler is a full ANSI implementation of the C
programming language that supports all standard features of the C language. In
addition, numerous features for direct support of the 8751 architecture have been
added.
The Keil A51 macro assembler supports the complete instruction set of the 8051
and all derivatives.

LIB51 Library Manager
The LIB 51 library manager allows the user to create object library from the object
files created by the compiler and assembler. Libraries are specially formatted,
ordered program collections of the object modules that may be used by linker at a
later time. When the linkers process a library, only those object modules in the
library that are necessary to create the program are used.
L51 Linker/Locator
The L51 linker creates an absolute object module using the object modules
extracted from libraries and those created by the compiler and assembler. An
absolute object file or module contains no re-locatable code or data. All code or
data reside at fixed memory locations. The absolute object file may be used:
 To program an EPROM or other devices,
 With the µvision4 debugger for simulation and target debugging,
 With an in-circuit emulator for the program testing.
The keil development tools for the 8051 offer numerous features and advantages
that help the user quickly and successfully develop embedded applications. They
are easy to use and are guaranteed to help the user achieve design goals.

3.1.3 COMPILING IN WINDOWS ENVIRONMENT
Keil Software:-
Fig. Hex File Generation
It is the Software which we have used to develop the program using Embedded C
Language. It has inbuilt compiler in it which is used to convert Embedded C
program into Hex file. The hex file is dumped into the microcontroller by which it
will understand the code we have return in Embedded C language and operates
according to the logics which we have written.

3.2.4 PROGRAM LOADER
Proload:-
Fig. Program Loader
This is the programmer which we have used to dump the hexadecimal code into
the Microcontroller which we have generated using Kiel Micro vision Software.

CHAPTER-4
EMBEDDED SYSTEM
What is embedded system?
An Embedded System is a combination of computer hardware and software, and
perhaps additional mechanical or other parts, designed to perform a specific
function. An embedded system is a microcontroller-based, software driven,
reliable, real-time control system, autonomous, or human or network interactive,
operating on diverse physical variables and in diverse environments and sold into a
competitive and cost conscious market.
An embedded system is not a computer system that is used primarily for
processing, not a software system on PC or UNIX, not a traditional business or
scientific application. High-end embedded & lower end embedded systems. High-
end embedded system - Generally 32, 64 Bit Controllers used with OS. Examples
Personal Digital Assistant and Mobile phones etc. .Lower end embedded systems -
Generally 8,16 Bit Controllers used with an minimal operating systems and
hardware layout designed for the specific purpose.

SYSTEM DESIGN CALLS:
Figure 4.1: Embedded system design calls

EMBEDDED SYSTEM DESIGN CYCLE
Fig Embedded System Design Cycle
Characteristics of Embedded System
• An embedded system is any computer system hidden inside a product other
than a computer.
• They will encounter a number of difficulties when writing embedded system
software in addition to those we encounter when we write applications.
– Throughput – Our system may need to handle a lot of data in a short
period of time.
– Response–Our system may need to react to events quickly.

– Testability–Setting up equipment to test embedded software can be
difficult.
– Debugability–Without a screen or a keyboard, finding out what the
software is doing wrong (other than not working) is a troublesome
problem.
– Reliability – embedded systems must be able to handle any situation
without human intervention.
– Memory space – Memory is limited on embedded systems, and you
must make the software and the data fit into whatever memory exists.
– Program installation – you will need special tools to get your software
into embedded systems.
– Power consumption – Portable systems must run on battery power,
and the software in these systems must conserve power.
– Processor hogs – computing that requires large amounts of CPU time
can complicate the response problem.
– Cost – Reducing the cost of the hardware is a concern in many
embedded system projects; software often operates on hardware that
is barely adequate for the job.
• Embedded systems have a microprocessor/ microcontroller and a memory.
Some have a serial port or a network connection. They usually do not have
keyboards, screens or disk drives.
APPLICATIONS
1) Military and aerospace embedded software applications.
2) Communication Applications.
3) Industrial automation and process control software.
4) Mastering the complexity of applications.
5) Reduction of product design time.

6) Real time processing of ever increasing amounts of data.
7) Intelligent, autonomous sensors.
CLASSIFICATION
1) Real Time Systems.
2) RTS is one which has to respond to events within a specified deadline.
3) A right answer after the dead line is a wrong answer.
RTS CLASSIFICATION
1) Hard Real Time Systems.
2) Soft Real Time System.
HARD REAL TIME SYSTEM
1) "Hard" real-time systems have very narrow response time.
2) Example: Nuclear power system, Cardiac pacemaker.
SOFT REAL TIME SYSTEM
1) "Soft" real-time systems have reduced constrains on "lateness" but still must
operate very quickly and repeatable.
2) Example: Railway reservation system – takes a few extra seconds the data
remains valid.

CHAPTER-5
5.1 PCB FABRICATION PROCESS
1. Copper cladding or copper coated fiber plates glass Epoxy.
2. Scaling method.
3. PCB wizard pro 3.5 software.
4. After designing, take the printout of mirror image using laser jet printer
and magazine paper.
5. Cut the copper plates. Place the printout on it.
6. Iron it with some temperature for 10-15 minutes.
7. Dip the copper plates with paper into water.
8. Leave for 10 minutes.
9. Peal the paper.
10.Bring ferrous chloride and water into tray and dip this printed board into
solution and leave for 20 minutes.
11.Vibration should be passed to tray for every 5 minutes.
12.Wash with sandpaper plus soap power.
13.Drilling should be done.
14.Track testing

OPERATION EXPLANATION
WORKING:-
The project uses 6numbers step-down transformers for handling the entire circuit
under low voltage conditions of 12v only to test the 3 phase fault analysis. The
primary of 3 transformers are connected to a 3 phase supply in star configuration,
while the secondary of the same is also connected in star configuration. The other
set of 3 transformers with its primary connected in star to 3 phase have their
secondary‘s connected in delta configuration. The output of all the 6 transformers
are rectified and filtered individually and are given to 6 relay coils. 6 push buttons,
one each connected across the relay coil is meant to create a fault condition either
at star i.e. LL Fault or 3L Fault. The NC contacts of all the relays are made parallel
while all the common points are grounded. The parallel connected point of NC are
given to pin2 through a resistor R5 to a 555 timer i.e. wired in monostable mode.
The output of the same timer is connected to the reset pin 4 of another 555 timer
wired in astable mode. LED‘S are connected at their output to indicate their status.
The output of the U3 555 timer from pin3 is given to an Op-amp LM358 through
wire 11 and d12 to the non-inverting input pin3, while the inverting input is kept at
a fixed voltage by a potential divider RV2. The voltage at pin2 coming from the
potential divider is so held that it is higher than the pin3 of the Op-amp used as a
comparator so that pin1 develops zero logic that fails to operate the relay through
the driver transistor
Q1. This relay Q1 is 3CO‘relay i.e. is meant for disconnecting the load to indicate
fault conditions.
OPERATING PROCEDURE:
While the board is powered from a 3phase supply all the 6 relay coils get DC
voltage and their common point disconnects from the NC and moves on to the NO

points there by providing logic high at pin2 of 555 timer U1 i.e. that is kept on
monostable mode. While any push button across the relay is pressed it disconnects
that relay and in the process in common contacts moves to the NC position to
provide a logic low at trigger pin of 555 timer to develop an output that brings the
U3 555 timer which is used in astable mode for its reset pin to high such that the
astable operation takes place at its output which is also indicated by flashing D11
LED. If the fault is off temporary in nature i.e. if the push button pressed is
released immediately the U1 monostable disables U3 the output of which goes to
zero in the event of any push button kept pressed for a longer duration the
monostable output provides a longer 56 duration active situation for U3 the astable
timer the output of which charges capacitor C13 through R11 such that the output
of the comparator goes high that drives the relay to switch off three phase load.
The output of Op-amp remains high indefinitely through a positive feedback
provided for its pin1 to pin3 through a forward biased diode and a resistor in series.
This results in the relay permanently switched on to disconnect the load connected
at its NC contacts permanently off. In order to maintain the flow of DC supply the
star connected secondary set DC‘S are paralleled through D8,D9 & D10 for
uninterrupted supply to the circuit voltage of 12v DC and 5v DC derived out of
voltage regulator IC 7805.

Bibliography
1. Internet
2. Books (name of the books with author name
should be there)
3. Computer
4. Software
5. Source
Basically this page’s represent the source of the particular software as
well others should be used for this project.

three phase fault analysis with auto reset for temporary fault and trip for permanent fault full report

Recommended

Recommended

More Related Content

What's hot

What's hot (20)

Viewers also liked

Viewers also liked (20)

Similar to three phase fault analysis with auto reset for temporary fault and trip for permanent fault full report

Similar to three phase fault analysis with auto reset for temporary fault and trip for permanent fault full report (20)

More from Vikram Rawani

More from Vikram Rawani (7)

Recently uploaded

Recently uploaded (20)

three phase fault analysis with auto reset for temporary fault and trip for permanent fault full report