Microcontroller architecture programming and interfacing
OVERVIEW• Introduction to Embedded System – MCS51 Microcontroller Family – Architecture of MCS-51• Memory Concepts• Assembler Directives• Timers and Counters• Interrupts• Interfacings• Project: Stop-Watch on LCD Using 8051
What is an embedded system?• It is specially a designed system to perform a few tasks in the most efficient way.• An embedded system can be defined as a control system or computer system designed to perform a specific task.• Examples:MP3 players, navigation systems on aircraft and intruder alarm systems, computers etc.
Features of Different processor Architectures CISC RISC• Addressing modes. • Load/store Architecture generally.• Variable length inst. • Fixed length instruction• No. of clocks >1 • Generally inst.=1 clock• Less general purpose internal registers • More general purpose internal registers• x86,8051… • PIC,ARM,AVR… INTRODUCTION
Harvard Vs Von Neumann…8051 PCs (Intel 80x86/Pentium)Microchip PIC families Motorola 68000Atmel AVR Motorola 68xx uC families
Eight - Bit Microcontrollers• Useful for small computing tasks• Adequate for many control and monitoring applications• Used in communications as serial ASCII data is also stored in byte size.• Most integrated circuit memories arranged in an 8-bit configuration
Features of MCS51• 4 KB on chip program memory.• 128 bytes on chip data memory(RAM).• 4 register banks.• 128 user defined software flags.• 8-bit data bus• 16-bit address bus• 32 general purpose registers each of 8 bits• 16 bit timers (usually 2, but may have more, or less).• 3 internal and 2 external interrupts.• Bit as well as byte addressable RAM area of 16 bytes.• Four 8-bit ports, (short models have two 8-bit ports).• 16-bit program counter and data pointer.• 1 Microsecond instruction cycle with 12 MHz Crystal.
Pin Description• PSEN (pin 29): (Program Store Enable) Enables external program (code) memory. Usually connected to EPROM’s output enable (OE). It pulses low during fetch stage of an instruction. It remains high while executing a program from internal ROM.• ALE (pin 30): (Address Latch Enable) used for de-multiplexing the address and data bus when port 0 is used as the data bus and low-byte of address bus.• EA (pin 31): (External Access) high to execute programs from internal ROM and low to execute from external memory only.• RST (pin 9): (RESET) master reset of 8051. RST pin must be high for at least two machine cycles while the oscillator is running. External reset is asynchronous to the internal clock. Internal RAM is not affected by reset. Reset sets PC to 0000H.• 8051 Oscillator & Power Pins: Pins 18 and 19 are the oscillator pins to connect the crystal of nominal frequency 12 MHz.
• Supply and Ground pins: Pin 40 is for +5V and pin 20 is for GND.• I/O Ports: Four 8-bit I/O ports. – Port 0 (pin 32-39) – Port 1 (pin 1-8) – Port 2 (pin 21-28) – Port 3 (pin 10-17) • Table of alternate uses of Port- 3 pins: • PINS ALTERNATE USE SFR • P3.0 RXD Serial data input SBUF • P3.1 TXD Serial data output SBUF • P3.2 INT0 External Interrupt 0 TCON.1 • P3.3 INT1 External Interrupt 1 TCON.3 • P3.4 T0 External Timer 0 I/P TMOD • P3.5 T1 External Timer 1 I/P TMOD • P3.6 WR External Memory write pulse - • P3.7 RD External Memory read pulse -
Memory Concepts• Types of memory: – The 8051 has three very general types of memory. To effectively program the 8051 it is necessary to have a basic understanding of these memory types. The memory types are illustrated in the following graphic. They are: On-Chip Memory, External Code Memory, and External RAM.
• On-Chip Memory refers to any memory (Code, RAM, or other) that physically exists within the microcontroller itself. – It is possible to have 4K of code memory – Internal RAM : 32 bytes (00h to1Fh) - 4 general purpose register banks numbered 0 to 3 and each made up of eight registers named R0 to R7.• External Code Memory is code (or program) memory that resides off-chip. This is often in the form of an external EPROM. – 64k of code memory off-chip in an EPROM.• External RAM is RAM memory that resides off-chip. This is often in the form of standard static RAM or flash RAM. – External RAM requires 4 instructions and 7 instruction cycles. In this case, external memory is 7 times slower!
Arithmetic InstructionsArithmetic InstructionsMnemonic Description Byte CycleADD A,Rn Adds the register to the accumulator 1 1ADD A,direct Adds the direct byte to the accumulator 2 2ADD A,@Ri Adds the indirect RAM to the accumulator 1 2ADD A,#data Adds the immediate data to the accumulator 2 2ADDC A,Rn Adds the register to the accumulator with a carry flag 1 1ADDC A,direct Adds the direct byte to the accumulator with a carry flag 2 2ADDC A,@Ri Adds the indirect RAM to the accumulator with a carry flag 1 2ADDC A,#data Adds the immediate data to the accumulator with a carry flag 2 2SUBB A,Rn Subtracts the register from the accumulator with a borrow 1 1SUBB A,direct Subtracts the direct byte from the accumulator with a borrow 2 2SUBB A,@Ri Subtracts the indirect RAM from the accumulator with a borrow 1 2SUBB A,#data Subtracts the immediate data from the accumulator with a borrow 2 2INC A Increments the accumulator by 1 1 1INC Rn Increments the register by 1 1 2INC Rx Increments the direct byte by 1 2 3INC @Ri Increments the indirect RAM by 1 1 3DEC A Decrements the accumulator by 1 1 1DEC Rn Decrements the register by 1 1 1DEC Rx Decrements the direct byte by 1 1 2DEC @Ri Decrements the indirect RAM by 1 2 3INC DPTR Increments the Data Pointer by 1 1 3MUL AB Multiplies A and B 1 5DIV AB Divides A by B 1 5DA A Decimal adjustment of the accumulator according to BCD code 1 1
Branch InstructionsMnemonic Description Byte CycleACALL addr11 Absolute subroutine call 2 6LCALL addr16 Long subroutine call 3 6RET Returns from subroutine 1 4RETI Returns from interrupt subroutine 1 4AJMP addr11 Absolute jump 2 3LJMP addr16 Long jump 3 4SJMP rel Short jump (from –128 to +127 locations relative to the following instruction) 2 3JC rel Jump if carry flag is set. Short jump. 2 3JNC rel Jump if carry flag is not set. Short jump. 2 3JB bit,rel Jump if direct bit is set. Short jump. 3 4JBC bit,rel Jump if direct bit is set and clears bit. Short jump. 3 4JMP @A+DPTR Jump indirect relative to the DPTR 1 2JZ rel Jump if the accumulator is zero. Short jump. 2 3JNZ rel Jump if the accumulator is not zero. Short jump. 2 3CJNE A,direct,rel Compares direct byte to the accumulator and jumps if not equal. Short jump. 3 4CJNE A,#data,rel Compares immediate data to the accumulator and jumps if not equal. Short jump. 3 4CJNE Rn,#data,rel Compares immediate data to the register and jumps if not equal. Short jump. 3 4CJNE @Ri,#data,rel Compares immediate data to indirect register and jumps if not equal. Short jump. 3 4DJNZ Rn,rel Decrements register and jumps if not 0. Short jump. 2 3DJNZ Rx,rel Decrements direct byte and jump if not 0. Short jump. 3 4NOP No operation 1 1
Logical InstructionsLogic InstructionsMnemonic Description Byte CycleANL A,Rn AND register to accumulator 1 1ANL A,direct AND direct byte to accumulator 2 2ANL A,@Ri AND indirect RAM to accumulator 1 2ANL A,#data AND immediate data to accumulator 2 2ANL direct,A AND accumulator to direct byte 2 3ANL direct,#data AND immediae data to direct register 3 4ORL A,Rn OR register to accumulator 1 1ORL A,direct OR direct byte to accumulator 2 2ORL A,@Ri OR indirect RAM to accumulator 1 2ORL direct,A OR accumulator to direct byte 2 3ORL direct,#data OR immediate data to direct byte 3 4XRL A,Rn Exclusive OR register to accumulator 1 1XRL A,direct Exclusive OR direct byte to accumulator 2 2XRL A,@Ri Exclusive OR indirect RAM to accumulator 1 2XRL A,#data Exclusive OR immediate data to accumulator 2 2XRL direct,A Exclusive OR accumulator to direct byte 2 3XORL direct,#data Exclusive OR immediate data to direct byte 3 4CLR A Clears the accumulator 1 1CPL A Complements the accumulator (1=0, 0=1) 1 1SWAP A Swaps nibbles within the accumulator 1 1RL A Rotates bits in the accumulator left 1 1RLC A Rotates bits in the accumulator left through carry 1 1RR A Rotates bits in the accumulator right 1 1RRC A Rotates bits in the accumulator right through carry 1 1
Bit oriented InstructionsBit-oriented InstructionsMnemonic Description Byte CycleCLR C Clears the carry flag 1 1CLR bit Clears the direct bit 2 3SETB C Sets the carry flag 1 1SETB bit Sets the direct bit 2 3CPL C Complements the carry flag 1 1CPL bit Complements the direct bit 2 3ANL C,bit AND direct bit to the carry flag 2 2ANL C,/bit AND complements of direct bit to the carry flag 2 2ORL C,bit OR direct bit to the carry flag 2 2ORL C,/bit OR complements of direct bit to the carry flag 2 2MOV C,bit Moves the direct bit to the carry flag 2 2MOV bit,C Moves the carry flag to the direct bit 2 3
Timers & Counters• 8051 has two 16-bit Up-Counters, named T0 and T1.• Each counter may be programmed, to count internal clock pulses acting as a timer .• If programmed to count external pulses then it is called the counter.• Counters are divided into 8-bit registers called the timer low (TL0, TL1) bytes and high ( TH0, TH1) bytes.• Counter actions are controlled by bit states in the timer mode control register (TMOD), timer control register (TCON) and certain program instructions.
TMOD ( timer mode ) Register• GATE:- Gating control when set. Timer/counter is enabled only while the INTx pin is high and the TRx control pin is set. When cleared, the timer is enabled whenever the TRx control bit is set.• C/T:-Counter/Timer.1 for Counter, 0 for timer.• M1 & M0:- Mode bits• M1 M0 Mode Operation• 0 0 0 13-bit timer mode.• 0 1 1 16-bit timer/counter. 1 0 2 8-bit auto reload.• 1 1 3 Split timer mode.
Timer Control (TCON) Register :• TF1 bit is automatically set on the Timer 1 overflow.• TR1 bit enables the Timer 1. – 1 - Timer 1 is enabled. – 0 - Timer 1 is disabled.• TF0 bit is automatically set on the Timer 0 overflow.• TR0 bit enables the timer 0. – 1 - Timer 0 is enabled. – 0 - Timer 0 is disabled.
Interrupts• Interrupt Vs Polling – Polling:- Microcontroller continuously monitors the status of a given device; when the condition is met, it performs the service. label: jnb TFx, label – Interrupt:- Whenever any device needs its service, the device notifies the microcontroller by sending it an interrupt signal.• The program which is associated with the interrupt is called the Interrupt Service Routine (ISR) or Interrupt handler.• The group of memory locations set aside to hold the addresses of ISRs is called Interrupt Vector Table.
Interrupt Enable Register• EA - global interrupt enable/disable: – 0 - disables all interrupt requests. – 1 - enables all individual interrupt requests.• ES - enables or disables serial interrupt: – 0 - UART system cannot generate an interrupt. – 1 - UART system enables an interrupt.• ET1 - bit enables or disables Timer 1 interrupt: – 0 - Timer 1 cannot generate an interrupt. – 1 - Timer 1 enables an interrupt.• EX1 - bit enables or disables external 1 interrupt: – 0 - change of the pin INT0 logic state cannot generate an interrupt. – 1 - enables an external interrupt on the pin INT0 state change.• ET0 - bit enables or disables timer 0 interrupt: – 0 - Timer 0 cannot generate an interrupt. – 1 - enables timer 0 interrupt.• EX0 - bit enables or disables external 0 interrupt: – 0 - change of the INT1 pin logic state cannot generate an interrupt. – 1 - enables an external interrupt on the pin INT1 state change.
Brief • A stopwatch is a device to measure the amount of time elapsed from a particular time when activated to when it is deactivated. • The timing functions are controlled by two buttons on the case. Pressing the Start/stop button starts the timer running, and pressing the button again stops it, leaving the elapsed time displayed. A press of the Reset button then resets the stopwatch to zero. • Least Count this Stop Watch is 10 millisecond. It can measure 1/100th of a second with an error of ~.01%.
Scope • It finds it applications where we require measuring time lapsed between two events. • Can be used in various sport events like Football, basketball etc. matches. • Can be used in laboratory experiments to measure time taken for an event or a chemical reaction to happen. • Can be used by students for self evaluation of their performance, to measure taken to solve a problem for competitive exams.
Criteria for choosing a Microcontroller 1. Speed. 2. Packaging. 3. Power consumption. 4. Amount of ROM and RAM. 5. Number of I/Os and timers. 6. Cost per unit. 7. Availability of tools & of microcontroller.
Project Development Process• Generating a power Supply of 5v for Microcontroller• Connecting Microcontroller to Zero PCB – Reset Circuit – Oscillator Circuit• Interfacing a Push button to Microcontroller• Interfacing LCD to Microcontroller• Writing the source Code• Debugging the code and burning to the Microcontroller IC using Flash tool[uVision]• Testing Trouble Shooting and Completion of project
Power Supply • A 5V DC is most commonly used. The circuit, shown in the figure, uses a cheap integrated three-terminal positive regulator LM7805, and provides high-quality voltage stability and quite enough current to enable the microcontroller and peripheral electronics to operate normally (enough current in this case means 1Amp).
Microcontroller circuits• Oscillator Circuit: • Reset Circuit: Even though the microcontroller has In order that the a built-in oscillator, it cannot operate microcontroller can operate without two external capacitors and properly, a logic 0 (0V) must be quartz crystal which stabilize its applied to the reset pin RS. operation and determines its frequency (operating speed of the microcontroller).
LCD Interfacing• An LCD display is specifically manufactured to be used with microcontrollers, which means that it cannot be activated by standard IC circuits. It is used for displaying different messages on a miniature liquid crystal display.
LCD Pin DescriptionFUNCTI ON PIN NUMBER NAME LOGIC DESCRIPTION STATEGround 1 Vss - 0VPower supply 2 Vdd - +5VContrast 3 Vee - 0 - VddControl of 4 RS 0 D0 – D7 are interpretedoperating 1 as commands D0 – D7 are interpreted as data 5 R/W 0 Write data (from 1 controller to LCD) Read data (from LCD to controller)
6 E 0 Access to LCD 1 disabled From 1 to 0 Normal operating Data/commands are transferred to LCD7 D0 0/1 Bit 0 LSB8 D1 0/1 Bit 19 D2 0/1 Bit 210 D3 0/1 Bit 311 D4 0/1 Bit 412 D5 0/1 Bit 513 D6 0/1 Bit 614 D7 0/1 Bit 7 MSB15 Anode16 Cathode
LCD Memory• The LCD display contains three memory blocks: – DDRAM Display Data RAM; – CGRAM Character Generator RAM; and – CGROM Character Generator ROM.
• DDRAM Memory DDRAM memory is used for storing characters to be displayed. The size of this memory is sufficient for storing 80 characters. Some memory locations are directly connected to the characters on display.
• CGROM Memory CGROM memory contains the default character map with all characters that can be displayed on the screen. Each character is assigned to one memory location
• CGRAM memory Apart from standard characters, the LCD display can also display symbols defined by the user itself. It can be any symbol in the size of 5x8 pixels. RAM memory called CGRAM in the size of 64 bytes enables it.
Important things to remember in LCD interfacing• Compared to the microcontroller, the LCD is an extremely slow component. Because of this, it was necessary to provide a signal which will, upon command execution, indicate that the display is ready to receive a new data. That signal, called the busy flag, can be read from line D7. When the BF bit is cleared (BF=0), the display is ready to receive a new data.
LCD initialization• Procedure on 8-bit initialization
Programming, Debugging, Flashing• Programming and Debugging has been done in KEIL software in assembly language• Program is burned to the Microcontroller IC Using uVision Flash tool Code File
Extended Scope of Project• Its applications can be extended by Using different sensor networks for the start and stop of the clock. – infrared switching to start and stop the clock to precisely measure the time taken by the athlete to finish a race event – Temperature Sensor can be used to record time taken for the rise in temprature