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The 8051 Microcontroller

              Prepared By,
       R-THANDAIAH PRABU M.E.,
              Lecturer - ECE
         ...
Serial
Communication
8051 and PC
• The 8051 module connects to PC by using
  RS232.
• RS232 is a protocol which supports half-
  duplex, synchr...
RS232 pins
Data communication classification
Simplex vs. Duplex
         Transmission
• Simplex transmission: the data can sent
  in one direction.
  – Example: the co...
Half vs. Full Duplex
• Half duplex: if the data is transmitted
  one way at a time.
     Transmitter                     R...
Serial vs Parallel Data Transfer


   Serial Transfer            Parallel Transfer
         D0                         D0-...
Serial Communication
• How to transfer data?
  – Sender:
     • The byte of data must be converted to serial bits using
  ...
Asynchronous vs. Synchronous
 • Serial communication uses two
   methods:
    – In synchronous communication, data is
    ...
UART & USART
• It is possible to write software to use both
  methods, but the programs can be tedious
  and long.
• Speci...
Framing (1/3)
        • How to detect that a character is sent via the
          line in the asynchronous mode?
          ...
Framing (2/3)
• The LSB is sent out first.
• The start bit is 0 (low) and always one bit.
• The stop bits is 1 (high).
• T...
Framing (3/3)
• We have a total of 10 bits for each character:
   – 8-bits for the ASCII code
   – 2-bits for the start an...
TxD and RxD pins in the 8051
• In 8051, the data is received from or
  transmitted to
  – RxD: received data (Pin 10, P3.0...
Baud Rates in the 8051
      • The 8051 transfers and receives data serially at
        many different baud rates by using...
Instructions Set
• 255 instructions, mnemonic code
• 1-3 byte instructions
• Opcode (operation code) +1,2 bytes
  address,...
• Coding format
  – Opcode (operation code) + operands
• Operands – addressing modes
  –   Registers
  –   Direct : addres...
8051 Addressing modes. (a) Register addressing (b) Direct addressing (c ) Indirect addressing (d) Immediate
addressing (e)...
8051 Registers
                       D7     D6   D5    D4 D3   D2     D1   D0
          A
          B
          R0
      ...
Five Addressing Modes
•   Immediate
•   Register
•   Direct
•   Register indirect
•   Indexed
Immediate Addressing Mode
MOV   A,#25H        ;load 25H into A
MOV   R4,#62        ;load the decimal value 62 into R4
MOV ...
Register Addressing Mode
MOV   A,R0   ;copy the contents of R0 into A
MOV   R2,A   ;copy the contents of A into R2
ADD   A...
Direct Addressing Mode
• RAM addresses 00 to 7FH
 MOV   R0,40H   ;save content of RAM location 40H in R0
 MOV   56H,A    ;...
MOV   A,2     ;is the same as
MOV   A,R2    ;which means copy R2 into A

MOV   A,0     ;is the same as
MOV   A,R0    ;whic...
SFR Registers & Their Addresses
 MOV   0E0H,#55H   ;is the same as
 MOV   A,#55H      ;which means load 55H into A (A=55H)...
SFR Addresses ( 1 of 2 )
SFR Addresses ( 2 of 2 )
Example
Stack and Direct Addressing Mode
• Only direct addressing is allowed for stack
Register Indirect Addressing Mode

 • Only R0 & R1 can be used

 MOV   A,@R0    ;move contents of RAM location whose
     ...
Advantage of Register Indirect Addressing
• Looping not possible in direct addressing
Index Addressing Mode & On-chip ROM
                Access

•Limitation of register indirect addressing:
•8-bit addresses ...
• Instructions Registers
  –   Arithmetic
  –   Logic
  –   Data transfer
  –   Boolean
  –   Program branch
Quick reference chart


   Arithmetic/Logic operations


Carry
borrow
MOV Instruction
• MOV destination, source ; copy source to
  dest.
• MOV A,#55H ;load value 55H into reg. A
  MOV R0,A    ...
Notes on Programming
• Value (proceeded with #) can be loaded
  directly to registers A, B, or R0 – R7
  – MOV R5, #0F9H
•...
ADD Instruction
• ADD A, source ;ADD the source operand
                 ;to the accumulator
• MOV A, #25H      ;load 25H ...
Structure of Assembly Language
     ORG 0H           ;start (origin) at location 0
     MOV R5,#25H      ;load 25H into R5...
Interrupt :
Interrupt Enable Register :




     • EA : Global enable/disable.
     •   ---   : Undefined.
     •   ET2 :Enable Timer ...
• Six interrupts in the 8051

   – 1 reset interrupt, when the reset pin is activated, the 8051
     jumps to address loca...
• Enabling and disabling an interrupt

  – upon reset all interrupts are disabled

  – interrupts must be enabled by softw...
• Steps in enabling an interrupt

  1. EA must be set to 1
  2. set the relevant bits in IE register to high

  – EA = 0, ...
• Interrupt priority upon reset




                  SJCET
INTERFACING TO EXTERNAL MEMORY




             SJCET
SEMICONDUCTOR MEMORY
 • Memory capacity
 • The number of bits that a
   semiconductor memory chip can store is
   called c...
Memory organization

• Memory chips are organized into a
  number of locations within the IC.

• Each location can hold 1 ...
Speed

• The speed of the memory chip is commonly referred
  to as its access time.

• The access time of memory chips var...
ROM (read-only memory)

• ROM is a type of memory that does not
  lose its contents when the power is
  turned off.

• For...
PROM (programmable ROM)

• PROM is programmed by blowing the
  fuses.

• If the information burned into PROM is
  wrong, t...
Flash memory EPROM
• flash memory can be programmed while it
  is in its socket on the system board, it is
  widely used t...
Mask ROM

• Mask ROM refers to a kind of ROM in
  which the contents are programmed by
  the IC manufacturer.

• Mask ROM ...
RAM (random access memory)

• RAM memory is called volatile memory
  since cutting off the power to the IC
  results in th...
SRAM (static RAM)

• Storage cells in static RAM memory are made of flip-
  flops and therefore do not require refreshing ...
DRAM (dynamic RAM)

• uses a capacitor to store each bit
• requires constant refreshing due to
leakage




               ...
The 8051 is designed for small systems, in order to reduce the
number of pins used, time multiplexing of signals is used. ...
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  1. 1. The 8051 Microcontroller Prepared By, R-THANDAIAH PRABU M.E., Lecturer - ECE thandaiah@gmail.com
  2. 2. Serial Communication
  3. 3. 8051 and PC • The 8051 module connects to PC by using RS232. • RS232 is a protocol which supports half- duplex, synchronous/asynchronous, serial communication. • We discuss these terms in following sections. RS232 PC 8051 COM 1 port MAX232 UART
  4. 4. RS232 pins
  5. 5. Data communication classification
  6. 6. Simplex vs. Duplex Transmission • Simplex transmission: the data can sent in one direction. – Example: the computer only sends data to the printer. Transmitter Receiver • Duplex transmission: the data can be transmitted and receive Transmitter Transmitter Receiver Receiver
  7. 7. Half vs. Full Duplex • Half duplex: if the data is transmitted one way at a time. Transmitter Receiver Receiver Transmitter • Full duplex: if the data can go both ways at the same time. – Two wire conductors for the data lines. Transmitter Receiver Receiver Transmitter
  8. 8. Serial vs Parallel Data Transfer Serial Transfer Parallel Transfer D0 D0-D7 Sender Receiver Sender Receiver Other control lines Other control lines
  9. 9. Serial Communication • How to transfer data? – Sender: • The byte of data must be converted to serial bits using a parallel-in-serial-out shift register. • The bit is transmitted over a single data line. – Receiver • The receiver must be a serial-in-parallel-out shift register to receive the serial data and pack them into a byte. 11101000001011 register register 8 1 8-bit parallel-in ‘A’ serial-in character serial-out parallel-out
  10. 10. Asynchronous vs. Synchronous • Serial communication uses two methods: – In synchronous communication, data is sent in blocks of bytes. byte byte byte byte 01011111 01010101 sender preamble receiver – In asynchronous communication, data is sent in bytes. byte byte byte sender stop bit start bit receiver
  11. 11. UART & USART • It is possible to write software to use both methods, but the programs can be tedious and long. • Special IC chips are made for serial communication: – USART (universal synchronous-asynchronous receiver- transmitter) – UART (universal asynchronous receiver-transmitter) • The 8051 chip has a built-in UART. – Half-duplex – Asynchronous mode only
  12. 12. Framing (1/3) • How to detect that a character is sent via the line in the asynchronous mode? – Answer: Data framing! • Each character is placed in between start and stop bits. This is called framing. Time (D0 first) stop start mark bit 0 1 0 0 0 0 0 1 mark bit goes out last D7 D0 goes out first
  13. 13. Framing (2/3) • The LSB is sent out first. • The start bit is 0 (low) and always one bit. • The stop bits is 1 (high). • The stop bit can be one (if 8 bits used in ASCII) or two bits (if 7 bits used in ASCII). – In asynchronous serial communication, peripheral chips and modems can be programmed for data that is 7 or 8 bits. • When there is no transfer, the signal is 1 (high), which is referred to as mask.
  14. 14. Framing (3/3) • We have a total of 10 bits for each character: – 8-bits for the ASCII code – 2-bits for the start and stop bits • In some systems in order to maintain data integrity, the parity bit is included in the data frame. – In an odd-parity bit system the total number of bits, including the parity bit, is odd. – UART chips allow programming of the parity bit for odd-, even-, and no-parity options.
  15. 15. TxD and RxD pins in the 8051 • In 8051, the data is received from or transmitted to – RxD: received data (Pin 10, P3.0) – TxD: transmitted data (Pin 11, P3.1) • TxD and RxD of the 8051 are TTL compatible. • The 8051 requires a line driver to make them RS232 compatible.
  16. 16. Baud Rates in the 8051 • The 8051 transfers and receives data serially at many different baud rates by using UART. • UART divides the machine cycle frequency by 32 and sends it to Timer 1 to set the baud rate. • Signal change for each roll over of timer 1 11.0592 MHz Machine cycle 28800 Hz XTAL frequency ÷ 32 ÷ 12 Timer 1 oscillator 921.6 kHz By UART To timer 1 To set the Baud rate
  17. 17. Instructions Set • 255 instructions, mnemonic code • 1-3 byte instructions • Opcode (operation code) +1,2 bytes address, data • 1-byte instructions – 139 2-byte instructions – 92 3-byte instructions – 24
  18. 18. • Coding format – Opcode (operation code) + operands • Operands – addressing modes – Registers – Direct : address – Indirect – Immediate : constant – Relative : jump, branch, call (change PC) – Long : call – Indexed : array (base+offset)
  19. 19. 8051 Addressing modes. (a) Register addressing (b) Direct addressing (c ) Indirect addressing (d) Immediate addressing (e) Relative addressing (f) Absolute addressing (g) Long addressing (h) Indexed addressing Coding format - Addressing modes
  20. 20. 8051 Registers D7 D6 D5 D4 D3 D2 D1 D0 A B R0 8 bit Registers R1 R2 DPTR DPH DPL R3 R4 PC PC (Program counter) R5 R6 8051 16 bit Registers R7 8 bit Registers of the 8051
  21. 21. Five Addressing Modes • Immediate • Register • Direct • Register indirect • Indexed
  22. 22. Immediate Addressing Mode MOV A,#25H ;load 25H into A MOV R4,#62 ;load the decimal value 62 into R4 MOV B,#40H ;load 40H into B MOV DPTR,#4521H ;DPTR=4521H MOV DPTR,#2550H ;is the same as: MOV DPL,#50H MOV DPH,#25H
  23. 23. Register Addressing Mode MOV A,R0 ;copy the contents of R0 into A MOV R2,A ;copy the contents of A into R2 ADD A,R5 ;add the contents of R5 to contents of A ADD A,R7 ;add the contents of R7 to contents of A MOV R6,A ;save accumulator in R6 MOV DPTR,#25F5H MOV R7,DPL MOV R6,DPH
  24. 24. Direct Addressing Mode • RAM addresses 00 to 7FH MOV R0,40H ;save content of RAM location 40H in R0 MOV 56H,A ;save content of A in RAM location 56H MOV R4,7FH ;move contents of RAM location 7FH to R4 MOV A,4 ;is same as MOV A,R4 ;which means copy R4 into A MOV A,7 ;is same as MOV A,R7 ;which means copy R7 into A
  25. 25. MOV A,2 ;is the same as MOV A,R2 ;which means copy R2 into A MOV A,0 ;is the same as MOV A,R0 ;which means copy R0 into A MOV R2,#5 ;R2=05 MOV A,2 ;copy R2 to A (A=R2=05) MOV B,2 ;copy R2 to B (B=R2=05) MOV 7,2 ;copy R2 to R7 ;since “MOV R7,R2” is invalid
  26. 26. SFR Registers & Their Addresses MOV 0E0H,#55H ;is the same as MOV A,#55H ;which means load 55H into A (A=55H) MOV 0F0H,#25H ;is the same as MOV B,#25H ;which means load 25H into B (B=25H) MOV 0E0H,R2 ;is the same as MOV A,R2 ;which means copy R2 into A MOV 0F0H,R0 ;is the same as MOV B,R0 ;which means copy R0 into B
  27. 27. SFR Addresses ( 1 of 2 )
  28. 28. SFR Addresses ( 2 of 2 )
  29. 29. Example
  30. 30. Stack and Direct Addressing Mode • Only direct addressing is allowed for stack
  31. 31. Register Indirect Addressing Mode • Only R0 & R1 can be used MOV A,@R0 ;move contents of RAM location whose ;address is held by R0 into A MOV @R1,B ;move contents of B into RAM location ;whose address is held by R1
  32. 32. Advantage of Register Indirect Addressing • Looping not possible in direct addressing
  33. 33. Index Addressing Mode & On-chip ROM Access •Limitation of register indirect addressing: •8-bit addresses (internal RAM) •DPTR: 16 bits •MOVC A, @A+DPTR ; “C” means program (code) space ROM
  34. 34. • Instructions Registers – Arithmetic – Logic – Data transfer – Boolean – Program branch
  35. 35. Quick reference chart Arithmetic/Logic operations Carry borrow
  36. 36. MOV Instruction • MOV destination, source ; copy source to dest. • MOV A,#55H ;load value 55H into reg. A MOV R0,A ;copy contents of A into R0 ;(now A=R0=55H) MOV R1,A ;copy contents of A into R1 ;(now A=R0=R1=55H) MOV R2,A ;copy contents of A into R2 ;(now A=R0=R1=R2=55H) MOV R3,#95H ;load value 95H into R3 ;(now R3=95H) MOV A,R3 ;copy contents of R3 into A ;now A=R3=95H
  37. 37. Notes on Programming • Value (proceeded with #) can be loaded directly to registers A, B, or R0 – R7 – MOV R5, #0F9H • If values 0 to F moved into an 8-bit register, the rest assumed all zeros – MOV A, #5 • A too large value causes an error – MOV A, #7F2H
  38. 38. ADD Instruction • ADD A, source ;ADD the source operand ;to the accumulator • MOV A, #25H ;load 25H into A MOV R2,#34H ;load 34H into R2 ADD A,R2 ;add R2 to accumulator ;(A = A + R2)
  39. 39. Structure of Assembly Language ORG 0H ;start (origin) at location 0 MOV R5,#25H ;load 25H into R5 MOV R7,#34H ;load 34H into R7 MOV A,#0 ;load 0 into A ADD A,R5 ;add contents of R5 to A ;now A = A + R5 ADD A,R7 ;add contents of R7 to A ;now A = A + R7 ADD A,#12H ;add to A value 12H ;now A = A + 12H HERE: SJMP HERE ;stay in this loop END ;end of asm source file Sample of an Assembly Language Program
  40. 40. Interrupt :
  41. 41. Interrupt Enable Register : • EA : Global enable/disable. • --- : Undefined. • ET2 :Enable Timer 2 interrupt. • ES :Enable Serial port interrupt. • ET1 :Enable Timer 1 interrupt. • EX1 :Enable External 1 interrupt. • ET0 : Enable Timer 0 interrupt. • EX0 : Enable External 0 interrupt.
  42. 42. • Six interrupts in the 8051 – 1 reset interrupt, when the reset pin is activated, the 8051 jumps to address location 0000 – 2 timer interrupts – 2 external hardware interrupts – pin 12 (P3.2) and 13 (P3.3) in port 3 are for the external hardware interrupts – 1 serial communication interrupt that belongs to both receive and transmit – a limited number of bytes is set aside for each interrupt SJCET
  43. 43. • Enabling and disabling an interrupt – upon reset all interrupts are disabled – interrupts must be enabled by software – IE register (interrupt enable) is responsible for enabling and disabling the interrupts – IE is a bit-addressable register SJCET
  44. 44. • Steps in enabling an interrupt 1. EA must be set to 1 2. set the relevant bits in IE register to high – EA = 0, no interrupt will be responded to, even if the relevant bit in the IE register is high SJCET
  45. 45. • Interrupt priority upon reset SJCET
  46. 46. INTERFACING TO EXTERNAL MEMORY SJCET
  47. 47. SEMICONDUCTOR MEMORY • Memory capacity • The number of bits that a semiconductor memory chip can store is called chip capacity. • It can be in units of Kbits (kilobits), Mbits (megabits), and so on. SJCET
  48. 48. Memory organization • Memory chips are organized into a number of locations within the IC. • Each location can hold 1 bit, 4 bits, 8 bits, or even 16 bits, depending on how it is designed internally. SJCET
  49. 49. Speed • The speed of the memory chip is commonly referred to as its access time. • The access time of memory chips varies from a few nanoseconds to hundreds of nanoseconds, depending on the IC technology used in the design and process. SJCET
  50. 50. ROM (read-only memory) • ROM is a type of memory that does not lose its contents when the power is turned off. • For this reason, ROM is also called nonvolatile memory. SJCET
  51. 51. PROM (programmable ROM) • PROM is programmed by blowing the fuses. • If the information burned into PROM is wrong, that PROM must be discarded since its internal fuses are blown permanently. SJCET
  52. 52. Flash memory EPROM • flash memory can be programmed while it is in its socket on the system board, it is widely used to upgrade the BIOS ROM of the PC. • flash memory is semiconductor memory with access time in the range of 100 ns compared with disk access time in the range of tens of milliseconds. SJCET
  53. 53. Mask ROM • Mask ROM refers to a kind of ROM in which the contents are programmed by the IC manufacturer. • Mask ROM is used when the needed volume is high (hundreds of thousands) and it is absolutely certain that the contents will not change. SJCET
  54. 54. RAM (random access memory) • RAM memory is called volatile memory since cutting off the power to the IC results in the loss of data. SJCET
  55. 55. SRAM (static RAM) • Storage cells in static RAM memory are made of flip- flops and therefore do not require refreshing in order to keep their data. This is in contrast to DRAM. SJCET
  56. 56. DRAM (dynamic RAM) • uses a capacitor to store each bit • requires constant refreshing due to leakage SJCET
  57. 57. The 8051 is designed for small systems, in order to reduce the number of pins used, time multiplexing of signals is used. For example, port 0 and p2 are used as input/output ports or memory interface pins. related hardware pins are as follows: (1)Address and data bus time-multiplexing for external memory devices (2) External Program memory read: Hardware pins involved: port 0 and port 2 (P0.1~P0.7, P2.1~P2.7 = 16 bits), and /ALE, /PSEN (3) External Data memory read/write: Hardware pins involved: port 0 and port 2 (P0.1~P0.7, P2.1~P2.7 = 16 bits), and /ALE, /PSEN, /RD, /WR SJCET
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