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Flash 101roman tarnavski - @romant

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• iPods• Laptops• Cameras• Enterprise Arrays• Embedded Devices

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why?• computer buses and networks are faster• electromechanical disk drives are slower• colder to run• faster to execute• slower to die*

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What’s inside?

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• NAND Memory• Controller• Interface

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NAND Memory

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NAND Memory

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NAND Memory Plane Plane Die

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Plane Plane Die

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PlaneBlock

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Plane Block ... BlockPage RegisterCache Register

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Plane BlockPage Page Page Page ...Page Page Page Page ... BlockPage Page Page Page ...Page Page Page Page Page Register Cache Register

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whoa ?!

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SLC / MLC / eMLC / TLC … Features SLC MLCBits per cell 1 2Endurance (erase/write cycles) 100,000 10,000Read service time (max) 25µs 50µsWrite service time (typical) 200–300µs 600–900µsBlock Erase (typical) 1.5 - 2 ms 2 ms

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hold on to your helmets!

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Tunnel OxideFloating Gate Fresh Cell N- N+

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Programmed Tunnel OxideFloating Gate Programming puts electrons on Floating Gate N- N+ Floating Gate can Permanently Store the Charge

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Erase Tunnel OxideFloating Gate Erase takes electrons off the Floating Gate N- N+

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Terminology Update

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Terminology Update• Cell = basic memory unit• Level = logical method to define the value of a bit

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cell threshold

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cell threshold

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cell threshold

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SLC

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SLC MLC Equivalent Scale

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more == better ?

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Endurance Performance * FTL Capability72nm 50nm 34nm 25nm Xnm

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Flash Translation Layer - FTL• The secret sauce - i.e: • RAID / RAISE (Redundant Array of Independent Silicon Elements) • GC algorithms

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controller

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controller

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controllerFlash Translation Layer

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controllerFlash Translation Layer Block Manager

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controllerFlash Translation Layer Block Manager Garbage Collector

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controllerFlash Translation Layer Block Manager Garbage Collector Wear Leveler

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controllerFlash Translation Layer Block Manager Garbage Collector Wear Leveler ECC Buffer / Cache

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controllerFlash Translation Layer Block Manager Garbage Collector Wear Leveler ECC Buffer / Cache

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controllerFlash Translation Layer Garbage Collector Wear Leveler ECC Buffer / Cache

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controllerFlash Translation Layer Garbage Collector Wear Leveler ECC Buffer / Cache

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Erased Valid Invalid

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write *Erased Valid Invalid

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write *Erased Valid Invalid

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write *Erased Valid Invalid

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write *Erased Valid Invalid

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write * (re) - ReadErased Valid Invalid

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write / erase / TRIM write * (re) - ReadErased Valid Invalid

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write / erase / TRIM write * (re) - ReadErased Valid Invalid

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Blocks vs. Pages Block• Made up of • Basic storage unit • 32 / 64 / 128 pages • Has no standard capacity• Assembled in RAM Block and written whole • 4 / 8 / 16 KB

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Blocks vs. Pages Block Page Page Page Page• Made up of • Basic storage unit ... • • Page Page Page Page 32 / 64 / 128 pages Has no standard capacity• Assembled in RAM Block and written whole Page Page Page Page • 4 / 8 / 16 KB Page Page ... Page Page

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Erased New Used

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Erased New Used Invalid Written-to / Erased

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New Data• Whole blocks must be erased & written• Writes Speed is affected

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By Example - Efficiency 101 • Writing 4 K will at• 25nm die, 8GB chip worst:• Page Size: 8 KB • Read ~2 MB• Block Size: 256 pages • Append 4K = 2048 KB • Write 2 MB

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Endurance• User Created• Internal Activity • GC, Wear Leveling, Page Remapping• Overprovisioning• Write Amplification

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ssd latency over time • source : tintri

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interface• Yesterday : SATA / SAS• Today : PCIe• Tomorrow : SCSI Express

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thank younow ask me something … please