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# Instruction set of 8085 Microprocessor By Er. Swapnil Kaware

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• @rajeshwari k & maheswari eswari.....
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• Sir you have represented hexadecimal data but performing decimal operations, Like 20H-!H=1F not 19

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### Instruction set of 8085 Microprocessor By Er. Swapnil Kaware

1. 1. INSTRUCTION SET OF 8085 Presented By, Er. Swapnil Kaware, svkaware@yahoo.co.in, B.E.(Electronics).
2. 2. BINARY TO DECIMAL NUMBER FORMAT8 4 2 1 DECIMAL 8 4 2 1 DECIMAL0 0 0 0 =0 1 0 0 0 =80 0 0 1 =1 1 0 0 1 =90 0 1 0 =2 1 0 1 0 = 10 = A0 0 1 1 =3 1 0 1 1 = 11 = B0 1 0 0 =4 1 1 0 0 = 12 = C0 1 0 1 =5 1 1 0 1 = 13 = D0 1 1 0 =6 1 1 1 0 = 14 = E0 1 1 1 =7 1 1 1 1 = 15 = F
3. 3. What is Instruction ?????• An instruction is a binary pattern designed inside a microprocessor to perform a specific function.• 8085 has 246 instructions.• Each instruction is represented by an 8-bit binary value.
4. 4. Classification Of Instruction Set• There are 5 Types,• (1) Data Transfer Instruction,• (2) Arithmetic Instructions,• (3) Logical Instructions,• (4) Branching Instructions,• (5) Control Instructions,
5. 5. (1) Data Transfer Instructions• MOV Rd, Rs• MOV M, Rs• MOV Rd, M• This instruction copies the contents of the source register into the destination register.• The contents of the source register are not altered.• Example: MOV B,A or MOV M,B or MOV C,M
6. 6. BEFORE EXECUTION AFTER EXECUTIONA 20 B MOV B,A A 20 B 20A F A FB 30 C B 30 CD E MOV M,B D EH 20 L 50 H 20 L 50 30A F A FB C B C 40D E MOV C,M D EH 20 L 50 40 H 20 L 50 40
7. 7. (2) Data Transfer Instructions• MVI R, Data(8-bit)• MVI M, Data(8-bit)• The 8-bit immediate data is stored in the destination register (R) or memory (M), R is general purpose 8 bit register such as A,B,C,D,E,H and L.• Example: MVI B, 60H or MVI M, 40H
8. 8. BEFORE EXECUTION AFTER EXECUTION A F A F B C B 60 C D E MVI B,60H D E H L H L BEFORE EXECUTION AFTER EXECUTION204FH 204FH 40HL=2050H HL=2050H MVI M,40H2051H 2051H
9. 9. (3) Data Transfer Instructions• LDA 16-bit address• The contents of a memory location, specified by a 16-bit address in the operand, are copied to the accumulator (A).• The contents of the source are not altered.• Example: LDA 2000H
10. 10. BEFORE EXECUTION AFTER EXECUTIONA A 30 30 LDA 2000H 30 2000H 2000H
11. 11. (4) Data Transfer Instructions• LDAX Register Pair• Load accumulator (A) with the contents of memory location whose address is specified by BC or DE or register pair.• The contents of either the register pair or the memory location are not altered.• Example: LDAX D
12. 12. BEFORE EXECUTION AFTER EXECUTIONA F A 80 FB C 80 B C 80 2030H 2030H LDAX DD 20 E 30 D 20 E 30
13. 13. (5) Data Transfer Instructions• STA 16-bit address• The contents of accumulator are copied into the memory location i.e. address specified by the operand in the instruction.• Example: STA 2000 H
14. 14. BEFORE EXECUTION AFTER EXECUTIONA 50 A 50 50 2000H STA 2000H 2000H
15. 15. (6) Data Transfer Instructions• STAX Register Pair• Store the contents of accumulator (A) into the memory location whose address is specified by BC Or DE register pair.• Example: STAX B
16. 16. BEFORE EXECUTION AFTER EXECUTIONA 50 F A 50 FB 10 C 20 B 10 C 20 50 1020H 1020HD E STAX B D E
17. 17. (7) Data Transfer Instructions• SHLD 16-bit address• Store H-L register pair in memory.• The contents of register L are stored into memory location specified by the 16-bit address.• The contents of register H are stored into the next memory location.• Example: SHLD 2500 H
18. 18. BEFORE EXECUTION AFTER EXECUTIONH 30 L 60 H 30 L 60 60 204FH 204FH 30 2500H SHLD 2500H 2500H 2502H 2502H
19. 19. (8) Data Transfer Instructions• XCHG• The contents of register H are exchanged with the contents of register D.• The contents of register L are exchanged with the contents of register E.• Example: XCHG
20. 20. BEFORE EXECUTION AFTER EXECUTIOND 20 E 40 D 70 E 80H 70 L 80 XCHG H 20 L 40
21. 21. (9) Data Transfer Instructions• SPHL• Move data from H-L pair to the Stack Pointer (SP)• This instruction loads the contents of H-L pair into SP.• Example: SPHL
22. 22. BEFORE EXECUTIONSPH 25 L 00 SPHL AFTER EXECUTIONSP 2500H 25 L 00
23. 23. (10) Data Transfer Instructions• XTHL• Exchange H–L with top of stack• The contents of L register are exchanged with the location pointed out by the contents of the SP.• The contents of H register are exchanged with the next location (SP + 1).• Example: XTHL
24. 24. L=SP H=(SP+1) BEFORE EXECUTION AFTER EXECUTIONSP 2700 50 SP 2700 40 2700H 2700HH L H L 30 40 60 60 50 30 2701H 2701H XTHL 2702H 2702H
25. 25. (11) Data Transfer Instructions• PCHL• Load program counter with H-L contents• The contents of registers H and L are copied into the program counter (PC).• The contents of H are placed as the high-order byte and the contents of L as the low-order byte.• Example: PCHL
26. 26. BEFORE EXECUTION AFTER EXECUTIONPC PC 6000H 60 L 00 PCHL H 60 L 00
27. 27. (12) Data Transfer Instructions• IN 8-bit port address• Copy data to accumulator from a port with 8- bit address.• The contents of I/O port are copied into accumulator.• Example: IN 80 H
28. 28. BEFORE EXECUTIONPORT 80H 10 A IN 80H AFTER EXECUTIONPORT 80H 10 A 10
29. 29. (13) Data Transfer Instructions• OUT 8-bit port address• Copy data from accumulator to a port with 8- bit address• The contents of accumulator are copied into the I/O port.• Example: OUT 50 H
30. 30. BEFORE EXECUTIONPORT 50H 10 A 40 OUT 50H AFTER EXECUTIONPORT 50H 40 A 40
31. 31. Arithematic Instructions• These instructions perform the operations like:• Addition• Subtraction• Increment• Decrement
32. 32. (1) Arithematic Instructions• ADD R• ADD M• The contents of register or memory are added to the contents of accumulator.• The result is stored in accumulator.• If the operand is memory location, its address is specified by H-L pair.• Example: ADD C or ADD M
33. 33. BEFORE EXECUTION AFTER EXECUTION A 20 A 50 B C 30 B C 30 D E ADD C D E H L H L A=A+R BEFORE EXECUTION AFTER EXECUTIONA 20 ADD M A 30B C B CD E A=A+M D EH 20 L 50 10 H 20 L 50 10 2050 2050
34. 34. (2) Arithematic Instructions• ADC R• ADC M• The contents of register or memory and Carry Flag (CY) are added to the contents of accumulator.• The result is stored in accumulator.• If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of the addition.• Example: ADC C or ADC M
35. 35. BEFORE EXECUTION AFTER EXECUTION CY 1 CY 0 A 50 A 71 B C 20 B C 20 ADC C D E D E A=A+R+CY H L H L BEFORE EXECUTION AFTER EXECUTION CY 1 CY 0 2050H 30 ADC M 2050H 30 A 20 A 51 A=A+M+CYH 20 L 50 H 20 L 50
36. 36. (3) Arithematic Instructions• ADI 8-bit data• The 8-bit data is added to the contents of accumulator.• The result is stored in accumulator.• Example: ADI 10 H
37. 37. BEFORE EXECUTION AFTER EXECUTION A 50 A 60 ADI 10H A=A+DATA(8)
38. 38. (4) Arithematic Instructions• ACI 8-bit data• The 8-bit data and the Carry Flag (CY) are added to the contents of accumulator.• The result is stored in accumulator.• Example: ACI 20 H
39. 39. BEFORE EXECUTION AFTER EXECUTIONCY 1 ACI 20H CY 0A 30 A=A+DATA A 51 (8)+CY
40. 40. (5) Arithematic Instructions• DAD Register pair• The 16-bit contents of the register pair are added to the contents of H-L pair.• The result is stored in H-L pair.• If the result is larger than 16 bits, then CY is set.• Example: DAD D
41. 41. BEFORE EXECUTION AFTER EXECUTIONCY 0 CY 0SP SPBD 10 C E 20 DAD D B D 10 C E 20H 20 L 50 HL=HL+R H 30 L 70
42. 42. (6) Arithematic Instructions• SUB R• SUB M• The contents of the register or memory location are subtracted from the contents of the accumulator.• The result is stored in accumulator.• If the operand is memory location, its address is specified by H-L pair.• Example: SUB B or SUB M
43. 43. BEFORE EXECUTION AFTER EXECUTION A 50 A 20 B 30 C B 30 C D E SUB B D E H L A=A-R H L BEFORE EXECUTION AFTER EXECUTION 10A 50 1020H A 40 1020H 10H L SUB M H L 10 20 A=A-M 10 20
44. 44. (7) Arithematic Instructions• SBB R• SBB M• The contents of the register or memory location and Borrow Flag (i.e.CY) are subtracted from the contents of the accumulator.• The result is stored in accumulator.• If the operand is memory location, its address is specified by H-L pair.• Example: SBB C or SBB M
45. 45. BEFORE EXECUTION AFTER EXECUTION CY 1 CY 0 A 40 A 19 B C 20 SBB C B C 20 D E A=A-R-CY D E H L H L BEFORE EXECUTION AFTER EXECUTION CY 1 CY 0 10 10 A 50 2050H A 39 2050H SBB MH L H L 20 50 A=A-M-CY 20 50
46. 46. (8) Arithematic Instructions• SUI 8-bit data• OPERATION: A=A-DATA(8)• The 8-bit immediate data is subtracted from the contents of the accumulator.• The result is stored in accumulator.• Example: SUI 45 H
47. 47. (9) Arithematic Instructions• SBI 8-bit data• The 8-bit data and the Borrow Flag (i.e. CY) is subtracted from the contents of the accumulator.• The result is stored in accumulator.• Example: SBI 20 H
48. 48. BEFORE EXECUTION AFTER EXECUTION CY 1 CY 0 A 50 SBI 20H A 29 A=A-DATA(8)-CY
49. 49. (10) Arithematic Instructions• INR R• INR M• The contents of register or memory location are incremented by 1.• The result is stored in the same place.• If the operand is a memory location, its address is specified by the contents of H-L pair.• Example: INR B or INR M
50. 50. BEFORE EXECUTION AFTER EXECUTION A A B 10 C INR B B 11 C D H E L R=R+1 D H E L BEFORE EXECUTION AFTER EXECUTIONH L 30 H L 31 2050H 2050H 20 50 INR M 20 50 M=M+1
51. 51. (11) Arithematic Instructions• INX Rp• The contents of register pair are incremented by 1.• The result is stored in the same place.• Example: INX H
52. 52. BEFORE EXECUTION AFTER EXECUTIONSP SPB C B CD E INX H D EH 10 L 20 H 11 L 21 RP=RP+1
53. 53. (12) Arithematic Instructions• DCR R• DCR M• The contents of register or memory location are decremented by 1.• The result is stored in the same place.• If the operand is a memory location, its address is specified by the contents of H-L pair.• Example: DCR E or DCR M
54. 54. BEFORE EXECUTION AFTER EXECUTION A A B C B C D E 20 DCR E D E 19 H L R=R-1 H L BEFORE EXECUTION AFTER EXECUTION H LH L 21 20 20 50 2050H 2050H 20 50 DCR M M=M-1
55. 55. (13) Arithematic Instructions• DCX Rp• The contents of register pair are decremented by 1.• The result is stored in the same place.• Example: DCX D
56. 56. BEFORE EXECUTION AFTER EXECUTIONSP SPB C B CD 10 E 20 DCX D D 10 E 19H L H L RP=RP-1
57. 57. (1) Logical Instructions• ANA R• ANA M• AND specified data in register or memory with accumulator.• Store the result in accumulator (A).• Example: ANA B, ANA M
58. 58. BEFORE EXECUTION 1010 1010=AAH AFTER EXECUTION 0000 1111=0FH CY AC CY 0 AC 1 0000 1010=0AH A AA A 0A B 10 0F C ANA B B 0F C D E A=A and R D E H L H L BEFORE EXECUTION AFTER EXECUTION 0101 0101=55HCY AC 1011 0011=B3H CY 0 AC 1 B3 0001 0001=11H B3A 55 2050H A 11 2050HH 20 L 50 ANA M H 20 L 50 A=A and M
59. 59. (2) Logical Instructions• ANI 8-bit data• AND 8-bit data with accumulator (A).• Store the result in accumulator (A)• Example: ANI 3FH
60. 60. BEFORE EXECUTION AFTER EXECUTION 1011 0011=B3H 0011 1111=3FH 0011 0011=33HCY AC CY 0 AC 1 ANI 3FHA B3 A=A and DATA(8) A 33
61. 61. (3) Logical Instructions• XRA Register (8-bit)• XOR specified register with accumulator.• Store the result in accumulator.• Example: XRA C
62. 62. 1010 1010=AAHBEFORE EXECUTION 0010 1101=2DH AFTER EXECUTION 1000 0111=87HCY AC CY 0 AC 0A AA A 87B 10 C 2D B C 2DD E XRA C D EH L A=A xor R H L
63. 63. (4) Logical Instructions• XRA M• XOR data in memory (memory location pointed by H-L pair) with Accumulator.• Store the result in Accumulator.• Example: XRA M
64. 64. 0101 0101=55H BEFORE EXECUTION 1011 0011=B3H AFTER EXECUTION 1110 0110=E6HCY AC CY 0 AC 0 B3 XRA M B3 2050H A E6 2050HA 55 A=A xor MH 20 L 50 H 20 L 50
65. 65. (5) Logical Instructions• XRI 8-bit data• XOR 8-bit immediate data with accumulator (A).• Store the result in accumulator.• Example: XRI 39H
66. 66. 1011 0011=B3H 0011 1001=39HBEFORE EXECUTION 1000 1010=8AH AFTER EXECUTIONCY AC CY 0 AC 0 XRI 39HA B3 A=A xor DATA(8) A 8A
67. 67. (6) Logical Instructions• ORA Register• OR specified register with accumulator (A).• Store the result in accumulator.• Example: ORA B
68. 68. 1010 1010=AAH 0001 0010=12H BEFORE EXECUTION AFTER EXECUTION 1011 1010=BAHCY AC CY 0 AC 0 ORA B A=A or RA AA A BAB 12 C B 12 CD E D EH L H L
69. 69. (7) Logical Instructions• ORA M• OR specified register with accumulator (A).• Store the result in accumulator.• Example: ORA M
70. 70. 0101 0101=55H 1011 0011=B3H BEFORE EXECUTION AFTER EXECUTION 1111 0111=F7H CY AC CY 0 AC 0 ORA M A=A or M B3 B3A 55 2050H A F7 2050HH 20 L 50 H 20 L 50
71. 71. (8) Logical Instructions• ORI 8-bit data• OR 8-bit data with accumulator (A).• Store the result in accumulator.• Example: ORI 08H
72. 72. 1011 0011=B3H 0000 1000=08HBEFORE EXECUTION 1011 1011=BBH AFTER EXECUTIONCY AC CY 0 AC 0 ORI 08HA B3 A=A or DATA(8) A BB
73. 73. (9) Logical Instructions• CMP Register• CMP M• Compare specified data in register or memory with accumulator (A).• Store the result in accumulator.• Example: CMP D or CMP M
74. 74. BEFORE EXECUTION A>R: CY=0,Z=0 AFTER EXECUTION A=R: CY=0,Z=1 CY Z A<R: CY=1,Z=0 CY 0 Z 0 A B8 A B8 B 10 C CMP D B C D B9 E A-R D B9 E H L H L BEFORE EXECUTION AFTER EXECUTION A>M: CY=0,Z=0 A=M: CY=0,Z=1 A<M: CY=1,Z=0CY Z CY 0 Z 1 B8 B8A B8 2050H A B8 2050H CMP MH 20 L 50 A-M H 20 L 50
75. 75. (10) Logical Instructions• CPI 8-bit data• Compare 8-bit immediate data with accumulator (A).• Store the result in accumulator.• Example: CPI 30H
76. 76. A>DATA: CY=0,Z=0 A=DATA: CY=0,Z=1BEFORE EXECUTION A<DATA: CY=1,Z=0 AFTER EXECUTIONCY Z CY 0 AC 0 CPI 30HA BA A-DATA A BA 1011 1010=BAH
77. 77. (11) Logical Instructions• STC• It sets the carry flag to 1.• Example: STC
78. 78. BEFORE EXECUTION AFTER EXECUTIONCY 0 CY 1 STC CY=1
79. 79. (12) Logical Instructions• CMC• It complements the carry flag.• Example: CMC
80. 80. BEFORE EXECUTION AFTER EXECUTIONCY 1 CY 0 CMC
81. 81. (13) Logical Instructions• CMA• It complements each bit of the accumulator.• Example: CMA
82. 82. (14) Logical Instructions• RLC• Rotate accumulator left• Each binary bit of the accumulator is rotated left by one position.• Bit D7 is placed in the position of D0 as well as in the Carry flag.• CY is modified according to bit D7.• Example: RLC.
83. 83. BEFORE EXECUTIONCY B7 B6 B5 B4 B3 B2 B1 B0 AFTER EXECUTIONB7 B6 B5 B4 B3 B2 B1 B0 B7
84. 84. (15) Logical Instructions• RRC• Rotate accumulator right• Each binary bit of the accumulator is rotated right by one• position.• Bit D0 is placed in the position of D7 as well as in the Carry flag.• CY is modified according to bit D0.• Example: RRC.
85. 85. BEFORE EXECUTIONB7 B6 B5 B4 B3 B2 B1 B0 CY AFTER EXECUTIONB0 B7 B6 B5 B4 B3 B2 B1 B0
86. 86. (16) Logical Instructions• RAL• Rotate accumulator left through carry• Each binary bit of the accumulator is rotated left by one position through the Carry flag.• Bit D7 is placed in the Carry flag, and the Carry flag is placed in the least significant position D0.• CY is modified according to bit D7.• Example: RAL.
87. 87. BEFORE EXECUTION CY B7 B6 B5 B4 B3 B2 B1 B0 AFTER EXECUTIONB7 B6 B5 B4 B3 B2 B1 B0 CY
88. 88. (17) Logical Instructions• RAR• Rotate accumulator right through carry• Each binary bit of the accumulator is rotated left by one position through the Carry flag.• Bit D7 is placed in the Carry flag, and the Carry flag is placed in the least significant position D0.• CY is modified according to bit D7.• Example: RAR
89. 89. BEFORE EXECUTIONB7 B6 B5 B4 B3 B2 B1 B0 CY AFTER EXECUTIONCY B7 B6 B5 B4 B3 B2 B1 B0
90. 90. Concept of Subroutine• In 8085 microprocessor a subroutine is a separate program written aside from main program ,this program is basically the program which requires to be executed several times in the main program.• The microprocessor can call subroutine any time using CALL instruction. after the subroutine is executed the subroutine hands over the program to main program using RET instruction.
91. 91. Branching Instructions• The branch group instructions allows the microprocessor to change the sequence of program either conditionally or under certain test conditions. The group includes,• (1) Jump instructions,• (2) Call and Return instructions,• (3) Restart instructions,
92. 92. (1) Branching Instructions• JUMP ADDRESS• BEFORE EXECUTION AFTER EXECUTION PC JMP 2000H PC 2000• Jump unconditionally to the address.• The instruction loads the PC with the address given within the instruction and resumes the program execution from specified location.• Example: JMP 200H
93. 93. Conditional JumpsInstruction Code Decription Condition For JumpJC Jump on carry CY=1JNC Jump on not carry CY=0JP Jump on positive S=0JM Jump on minus S=1JPE Jump on parity even P=1JPO Jump on parity odd P=0JZ Jump on zero Z=1JNZ Jump on not zero Z=0
94. 94. (2) Branching Instructions• CALL address• Call unconditionally a subroutine whose starting address given within the instruction and used to transfer program control to a subprogram or subroutine.• Example: CALL 2000H
95. 95. Conditional CallsInstruction Code Description Condition for CALLCC Call on carry CY=1CNC Call on not carry CY=0CP Call on positive S=0CM Call on minus S=1CPE Call on parity even P=1CPO Call on parity odd P=0CZ Call on zero Z=1CNZ Call on not zero Z=0
96. 96. (3) Branching Instructions• RET• Return from the subroutine unconditionally.• This instruction takes return address from the stack and loads the program counter with this address.• Example: RET
97. 97. BEFORE EXECUTION AFTER EXECUTIONSP 27FD 00 SP 27FF 00 27FDH 27FDHPC PC 6200 27FEH 62 27FEH 62 RET 27FFH 27FFH
98. 98. (4) Branching Instructions• RST n• Restart n (0 to 7)• This instruction transfers the program control to a specific memory address. The processor multiplies the RST number by 8 to calculate the vector address.• Example: RST 6
99. 99. BEFORE EXECUTION AFTER EXECUTION SP-1SP 3000 SP 2999 01 2FFEH 2FFEHPC 2000 PC 0030 2FFFH 20 RST 6 2FFFH 3000H 3000H ADDRESS OF THE NEXT INSTRUCTION IS 2001H
100. 100. Vector Address For Return InstructionsInstruction Code Vector AddressRST 0 0*8=0000HRST 1 0*8=0008HRST 2 0*8=0010HRST 3 0*8=0018HRST 4 0*8=0020HRST 5 0*8=0028HRST 6 0*8=0030HRst 7 0*8=0038H
101. 101. (1) Control Instructions• NOP• No operation• No operation is performed.• The instruction is fetched and decoded but no operation is executed.• Example: NOP
102. 102. (2) Control Instructions• HLT• Halt• The CPU finishes executing the current instruction and halts any further execution.• An interrupt or reset is necessary to exit from the halt state.• Example: HLT
103. 103. (3) Control Instructions• RIM• Read Interrupt Mask• This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit.• The instruction loads eight bits in the accumulator with the following interpretations.• Example: RIM
104. 104. RIM INSTRUCTION
105. 105. • SIM• Set Interrupt Mask• This is a multipurpose instruction and used to implement the 8085 interrupts 7.5, 6.5, 5.5, and serial data output.• The instruction interprets the accumulator contents as follows.• Example: SIM
106. 106. SIM Instruction
107. 107. END OFINSTRUCTION SET