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MUSES8920の英語のデータシート

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MUSES8920の英語のデータシート

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MUSES8920の英語のデータシート

  1. 1. MUSES8920 High Quality Audio J-FET Input Dual Operational Amplifier■ GENERAL DESCRIPTION ■ PACKAGE OUTLINE The MUSES8920 is a high quality Audio J-FET input dual operationalamplifier. This is a mass production model of MUSES Series. Byinheriting MUSES Technology we pursued in the "MUSES series", theMUSES8920 is compatible in high-quality sound and productivity. TheMUSES8920 has improved the chip layout and the material, and is MUSES8920D MUSES8920E (DIP8) (SOP8)developing by thoroughly repeating the listening sound. The characteristics Low noise (8nV/√Hz), high-SR (25V/µs) and lowdistortion (0.00004%, Av=1) suitable for audio preamplifiers, activefilters, and line amplifiers. In addition, taking advantage of the low inputbias current that J-FET has, it is suitable for transimpedance amplifier(I/V converter).■ FEATURES ■ PIN CONFIGLATION●Operating Voltage ±3.5V to ±16V●Low Noise 8nV/√Hz typ.●THD 0.00004% typ. (Av=1) Top View PIN FUNCTION●Slew Rate 25V/µs typ. 1. A OUTPUT 1 8●Channel Separation 150dB typ. 2. A -INPUT 3. A +INPUT●High Output Current 100mA typ.(short-circuit current) 2 A 7 4. V-●Phase Margin 70 deg typ. 5. B +INPUT 3 B 6 6. B -INPUT●Input Offset Voltage 0.8mV typ. 5mV max. 7. B OUTPUT●Input Bias Current 5pA typ. 250pA max 4 5 8.V+●Voltage Gain 135dB typ.●J-FET technology●Package Outline DIP8, SOP8 JEDEC 150mil■ APPLICATIONS●Current to Voltage (I/V) Converters●Hi-end Audio●Active Filters●Integrators I/V Digital DA Analog Input Converter Output I/V LPF Buff DAC Output I/V converter + LPF circuit MUSES and this logo are trademarks of New Japan Radio Co., Ltd.Ver.2012-04-02 -1-
  2. 2. MUSES8920■ ABSOLUTE MAXIMUM RATING (Ta=25ºC unless otherwise specified) PARAMETER SYMBOL RATING UNITSupply Voltage VDD ±18 VDifferential Input Voltage Range VID ±30(Note1) VCommon Mode Input Voltage Range VICM ±15(Note1) V DIP8:870Power Dissipation PD mW SOP8:900(Note2)Operating Temperature Range Topr -40~+85 ºCStorage Temperature Range Tstg -50~+150 ºC(Note1) For supply Voltages less than ±15 V, the maximum input voltage is equal to the Supply Voltage.(Note2) Mounted on the EIA/JEDEC standard board (114.3×76.2×1.6mm, two layer, FR-4).(Note3) NJM8920 is ESD (electrostatic discharge) sensitive device. Therefore, proper ESD precautions are recommended to avoid permanent damage or loss of functionality.■ RECOMMENDED OPERATING VOLTAGE (Ta=25ºC) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT + -Supply Voltage V /V ±3.5 - ±16 V■ ELECTRICAL CHARACTERISTICS + -● DC CHARACTERISTICS (V /V =±15V, Ta=25ºC, Vcm=0V unless otherwise specified) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNITSupply Current Icc RL=∞, No Signal - 8 12 mAInput Offset Voltage VIO RS=50Ω (Note4) - 0.8 5 mVInput Bias Current IB (Note4) - 5 250 pAInput Offset Current IIO (Note4) - 2 220 pAVoltage Gain1 AV1 RL=10kΩ, Vo=±13V 106 135 - dBVoltage Gain2 AV2 RL=2kΩ, Vo=±12.8V 105 133 - dBVoltage Gain3 AV3 RL=600Ω, Vo=12.5V 105 130 - dBCommon Mode Rejection Ratio CMR VICM=±12.5V (Note5) 80 110 - dB + -Supply Voltage Rejection Ratio SVR V /V =±3.5 to ±16V 80 110 - dBMaximum Output Voltage1 VOM1 RL=10kΩ ±13 ±14 - VMaximum Output Voltage2 VOM2 RL=2kΩ ±12.8 ±13.8 - VMaximum Output Voltage3 VOM2 RL=600Ω ±12.5 ±13.5 - VCommon Mode Input Voltage Range VICM CMR≥80dB ±12.5 ±14 - V(Note4) Written by absolute ratio.(Note5) CMR is calculated by specified change in offset voltage. (VICM=0V to +12.5V, VICM=0V to -12.5V) + -● AC CHARACTERISTICS (V /V =±15V, Ta=25ºC, Vcm=0V unless otherwise specified) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNITGain Bandwidth Product GB f=10kHz - 11 - MHzUnity Gain Frequency fT AV=+100, RS=100Ω, RL=2kΩ, CL=10pF - 10 - MHzPhase Margin ΦM AV=+100, RS=100Ω, RL=2kΩ, CL=10pF - 70 - DegEquivalent Input Noise Voltage1 VNI1 f=1kHz - 8 - nV/√HzEquivalent Input Noise Voltage2 VNI2 RIAA, RS=2.2kΩ, 30kHz, LPF - 1.1 3.5 µVrmsTotal Harmonic Distortion THD f=1kHz , AV=+10, Vo=5Vrms, RL=2kΩ - 0.0004 - %Channel Separation CS f=1kHz , AV=-100, RL=2kΩ - 150 - dBSlew Rate SR AV=1, VIN=2Vp-p, RL=2kΩ, CL=10pF - 25 - V/us -2- Ver.2012-04-02
  3. 3. MUSES8920■ Application Notes●Package Power, Power Dissipation and Output Power IC is heated by own operation and possibly gets damage when the junction power exceeds the acceptable value calledPower Dissipation PD. The dependence of the MUSES8920 PD on ambient temperature is shown in Fig 1. The plots aredepended on following two points. The first is PD on ambient temperature 25ºC, which is the maximum power dissipation.The second is 0W, which means that the IC cannot radiate any more. Conforming the maximum junction temperatureTjmax to the storage temperature Tstg derives this point. Fig.1 is drawn by connecting those points and conforming the PDlower than 25ºC to it on 25ºC. The PD is shown following formula as a function of the ambient temperature between thosepoints. Tjmax - Ta Dissipation Power PD = [W] (Ta=25ºC to Ta=150ºC) θjaWhere, ja is heat thermal resistance which depends on parameters such as package material, frame material and so on.Therefore, PD is different in each package. While, the actual measurement of dissipation power on MUSES8920 is obtained using following equation. (Actual Dissipation Power) = (Supply Voltage VDD) X (Supply Current IDD) – (Output Power Po)The MUSES8920 should be operated in lower than PD of the actual dissipation power. To sustain the steady state operation, take account of the Dissipation Power and thermal design. PD [mW] SOP8 900 870 DIP8 Ta [deg] -40 25 85 150 (Topr max.) (Tstg max.) Fig.1 Power Dissipations vs. Ambient Temperature on the MUSE8920Ver.2012-04-02 -3-
  4. 4. MUSES8920TYPICAL CARACTERISTICS THD+N vs. Output Voltage (Frequency) THD+N vs. Output Voltage (Frequency) V+/V-=±15V, AV=+10, RL=2k, Ta=25ºC V+/V-=±3.5V, AV=+10, RL=2k, Ta=25ºC 10 10 1 1 f=20HzTHD+N [%] THD+N [%] 0.1 0.1 f=1kHz f=20kHz 0.01 0.01 f=1kHz f=20kHz f=20kHz 0.001 0.001 0.0001 0.0001 0.01 0.1 1 10 100 0.01 0.1 1 10 100 Output Voltage [Vrms] Output Voltage [Vrms] Voltage Noise vs. Frequency Channel Separation vs. Frequency + - + - ∞ V /V =±15V, AV=+100, RS=100Ω, RL=∞, Ta=25ºC V /V =±15V, AV=-100, RL=2kΩ, Ta=25ºC 100 -120 -125Equivalent Input Noise Voltage 80 Channel Separation [dB] -130 60 -135 [nV/√ Hz] -140 40 -145 -150 20 -155 0 -160 1 10 100 1k 10k 100k 10 100 1k 10k 100k Frequency [Hz] Frequency [Hz] Gain vs. Frequency (Temperature) Phase Margin vs. Temperature (Supply Voltage) + - + - V /V =±15V, AV=+100, RL=2kΩ, CL=10pF V /V =±15V, AV=+100, RS=100Ω, RL=2kΩ, CL=10pF, VIN=-30dBm 60 90 Gain Ta=+85ºC 40 Ta=+25ºC Phase Margin [deg] V+/V-=±15V Voltage Gain [dB] Phase Ta=-40ºC 20 0 80 Phase [deg] 0 -45 -20 Ta=+85ºC -90 70 Ta=+25ºC Ta=-40ºC V+/V-=±3.5V -40 -135 -60 -180 60 10k 100k 1M 10M 100M -50 -25 0 25 50 75 100 125 150 Frequency [Hz] Ambient Temperature [ºC] -4- Ver.2012-04-02
  5. 5. MUSES8920■ TYPICAL CARACTERISTICS Pulse Response Slew Rate vs. Temperature + - + - V /V =±15V, Gv=0dB, CL=10pF, RL=2kΩ, Ta=25ºC V /V =±15V, VIN=2VP-P, f=100kHz, Gv=0dB, CL=10pF, RL=2kΩ 80 Input 70 60 Fall Slew Rate [V/µs] Voltage [1V/div] 50 40 30 20 Rise 10 Output 0 Time [1µs/div] -50 -25 0 25 50 75 100 125 150 Ambient Temperature [ºC] Supply Current vs. Supply Voltage (Temperature) Supply Current vs. Temperature (Supply Voltage) AV=0dB AV=0dB 12 12 + - V /V =±15V Ta=+25ºC 10 10 Supply Current [mA] Supply Current [mA] 8 8 Ta=+85ºC Ta=-40ºC V+/V-=±3.5V 6 6 4 4 2 2 0 0 ±0 ±4 ±8 ±12 ±16 -50 -25 0 25 50 75 100 125 150 + - Supply Voltage V /V [V] Ambient Temperature [ºC] Input Offset Voltage vs. Supply Voltage (Temperature) Input Offset Voltage vs. Temperature (Supply Voltage) VICM=0V, VIN=0V VICM=0V, VIN=0V 2.0 2.0 1.5 1.5 Input Offset Voltage [mV] Input Offset Voltage [mV] 1.0 1.0 V+/V-=±15V Ta=-40ºC 0.5 0.5 0.0 0.0 Ta=+25ºC = Ta=+85ºC + - V /V =±3.5V -0.5 -0.5 -1.0 -1.0 0 ±4 ±8 ±12 ±16 -50 -25 0 25 50 75 100 125 150 + - Supply Voltage V /V [V] Ambient Temperature [ºC]Ver.2012-04-02 -5-
  6. 6. MUSES8920■ TYPICAL CARACTERISTICS Input Offset Voltage Input Offset Voltage vs. Common Mode Input Voltage vs. Common Mode Input Voltage (Temperature) (Temperature) V+/V-=±15V V+/V-=±3.5V 2.0 2.0 1.5 1.5 Input Offset Voltage [mV] Input Offset Voltage [mV] 1.0 Ta=-40ºC 1.0 Ta=-40ºC 0.5 0.5 0.0 0.0 Ta=+25ºC = Ta=+85ºC Ta=+25ºC = Ta=+85ºC -0.5 -0.5 -1.0 -1.0 -15 -10 -5 0 5 10 15 -4 -3 -2 -1 0 1 2 3 4 Common Mode Input Voltage [V] Common Mode Input Voltage [V] Input Bias Current vs. Common Mode Input Voltage Input Bias Current vs. Temperature (Supply Voltage) (Temperature) + - + - VICM=0V, V /V =±15V V /V =±15V, Ta=25ºC 1000n 10 100n 9Input Bias Current [A] Input Bias Current [pA] 8 10n 7 1n 6 100p 5 10p 4 1p 3 -50 -25 0 25 50 75 100 125 150 -15 -10 -5 0 5 10 15 Ambient Temperature [ºC] Common Mode Input Voltage [V] CMR vs. Temperature SVR vs. Temperature + - + - V /V =±15V → VICM=0V, V /V =±3.5V→±16V 140 140 Supply Voltage Rejection Ratio [dB] Common Mode Rejection Ratio [dB] 130 130 → VICM=0V→+12.5V 120 120 110 110 100 100 → VICM=-12.5V→0V 90 90 80 80 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 Ambient Temperature [ºC] Ambient Temperature [ºC] -6- Ver.2012-04-02
  7. 7. MUSES8920■ TYPICAL CARACTERISTICS Output Voltage vs. Output Current (Temperature) Output Voltage vs. Output Current (Temperature) + - + - V /V =±15V V /V =±3.5V 15 4 Isource Isource 3 Ta=+125ºC 10 Ta=-40ºC Ta=+85ºC 2 Output Voltage [V] Output Voltage [V] Ta=+25ºC 5 Ta=+25ºC 1 Ta=-40ºC 0 0 Ta=+85ºC -1 -5 Ta=+25ºC Ta=-40ºC -2 -10 Isink -3 Isink -15 -4 1 10 100 1k 1 10 100 1k Output Current [mA] Output Current [mA] Maximum Output Voltage vs. Load Resistance Maximum Output Voltage vs. Load Resistance (Temperature) (Temperature) + - + - V /V =±15V, Gv=open, RL to 0V V /V =±3.5V, Gv=open, RL to 0V 15 4 3 10 Maximum Output Voltage [V] Maximum Output Voltage [V] Ta=-40ºC Ta=+25ºC 2 5 Ta=+85ºC 1 0 0 Ta=+85ºC Ta=+25ºC -1 Ta=-40ºC -5 -2 -10 -3 -15 -4 10 100 1k 10k 100k 10 100 1k 10k 100k Load Resistance [Ω] Load Resistance [Ω]Ver.2012-04-02 -7-
  8. 8. MUSES8920■ APPLICATION CIRCUIT Gain StageAnalog I/V AttInput Digital DA AD Digital Analog Input Converter Converter Output Output Buff I/V LPF Buff (Fig.1: ADC Input) (Fig.2:DAC Output) L-ch. L-ch. Analog Analog Intput C2 Output HPF C1 R2 R3 DAC R-ch. R1 R-ch. C3 Analog Analog Intput Output R5 R4 Vcc 1/2Vcc (Fig.4:DAC LPF Circuit ) 1/2Vcc (Fig.3: Half Vcc Buffer on Single Supply Application) <CAUTION> The specifications on this data book are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this data book are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -8- Ver.2012-04-02

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