The document discusses low frequency passive and high frequency active probing techniques, detailing probe specifications, bandwidth, dynamic range, and connectivity challenges. It compares different types of probes and their applications, emphasizing the importance of loading impedance and noise considerations in measurement systems. Best practices for probing connections, especially in high-speed scenarios like DDR testing, are also included.

1. Low Frequency Passive and High
Frequency Active Probing Techniques
and Tradeoffs – What to Use and Why
Mark Lionbarger
Field Applications Engineer

2. Agenda
 Probe Specifications
 Bandwidth
 Risetime
 Noise
 Loading
 Parasitics
 Examples
 Dynamic Range
 Single Ended vs. Differential
 Probe Connectivity
 Solder-In
 Browser etc.
 Probe Connectivity Examples – DDR Case Study
 Virtual Probing and VP@RCVR
2/23/2017 2

3. Probing Overview - What is a probe
Probe - Any controlled impedance structure that conducts
Electromagnetic (EM) fields that can sample a portion of a
signal with minimal impact and divert it to a measurement
device.
2/23/2017 3
 Controlled impedance: Circuit has a known loading value
(resistance, capacitance, inductance)
 Conducting: Need to be able to carry an EM field (current/voltage
signal)
 Sample: Probes needs to sense a small portion of the signal and
divert the energy to a measurement device (possibly adding gain)
?

4. Connectivity Challenge
2/23/2017 4
 Oscilloscopes have coaxial inputs (SMA, BNC, etc.)
 Circuit Boards usually do not have coaxial connectors

5. Strategies
 Add Surface Mount Coax connectors
 Costly
 Price
 Board Area
 SMP or MMCX can be higher density
 Design Time
 Fixturing
 Fan out high speed connections to SMA connectors
 Great for characterization
 Need to know interface or custom build for ASIC
 Need to de-embed fixture
2/23/2017 5
USB test Fixture
SATA test Fixture

6. Debug
 What about general circuit debug?
 Non-standard Interface
 Probing on components
 Interposers
 Coax cable solder center conductor to probe point
 Simple
 Destructive
 Termination mismatch
 High Loading Effect
2/23/2017 6
R_Load_Effective = 25 Ohm
33 % Gain Error
(Might be ok for a narrowband signal)

7. Frequency Domain View
2/23/2017 7
 Sine Waves have narrow band frequency content
 Narrowband matching is much easier
 Data Patterns have very broad frequency content
 Broadband matching is challenging

8. Oscilloscope Probes
 Oscilloscope probes solve the connectivity problem
 High Bandwidth
 Controlled Impedance (over broadband)
 Low loading/minimal impact on signal
 Variety of form factors
 Solder-in
 Hand held browser
 Non-Destructive
2/23/2017 8

9. Ideal Probe vs. Real Probe
 Ideal probe:
 Perfectly flat magnitude
response
 Perfectly linear phase response
 No loading (infinite impedance)
2/23/2017 9
 Real probe:
 Non-ideal magnitude response
 Non-ideal phase response
 Some loading (finite
impedance)
Vsignal Vmeas

10. Wide Variety of Probes to Choose From
2/23/2017 10

11. Wide Variety of Accessories to use with those Probes
2/23/2017 11

12. Wide Range of Scopes for any Application
2/23/2017 12

13. Different Probes for Different Applications
2/23/2017 13
Passive - Low Bandwidth, High Impedance
500 MHz Bandwidth
10 MΩ Impedance
Active Single – Medium Bandwidth, High
Impedance
Up to 2.5 GHz Bandwidth
200 kΩ – 1 MΩ Impedance
Active Differential - High Bandwidth
4 GHz - 25 GHz Bandwidth
1 kΩ Impedance
High Voltage Differential
Up to 120MHz Bandwidth
DC – 7kV Differential Voltage Range
8 MΩ – 48 MΩ Impedance
Current Probe Up to 100MHz Bandwidth
700A Peak Current
Active Voltage Rail
4GHz Bandwidth
50kΩ Impedance
±30V Offset
± 800mV Dynamic Range

14. Probe Specifications
2/23/2017 14

15. Key Specifications
 Key Specifications
 Bandwidth (Frequency Response)
 Risetime (Step Response)
 Dynamic Range
 Gain/Attenuation
 Noise
 Loading Impedance
 AC vs. DC.
2/23/2017 15

16. Analog Bandwidth
f0
.707
FREQUENCY
VOUT
VIN
1 Bode Plot
Analog bandwidth is the frequency at which
the ratio of the amplitude displayed on the
scope to the input amplitude is -3dB or .707
All oscilloscopes and probes are specified with
an analog bandwidth

17. Analog Bandwidth
Example 1: A 3 GHz oscilloscope measures a 1 GHz sine wave
f0
.707
FREQUENCY
VOUT
VIN
1
1 GHz input
f0
.707
FREQUENCY
VOUT
VIN
1
Example 2: A 3 GHz oscilloscope measures a 3 GHz sine wave
3 GHz input
1 GHz, 1 V sinewave is
input into oscilloscope
1 GHz, 1 V sinewave is
measured by oscilloscope
3 GHz, 0.707 V sinewave is
measured by oscilloscope
3 GHz, 1 V sinewave is
input into oscilloscope

18. Fourier Expansion of a Square Wave
2/23/2017 18
𝑥 𝑡 = 𝑠𝑖𝑛𝜔0 𝑡 +
1
3
𝑠𝑖𝑛3𝜔0 𝑡 +
1
5
𝑠𝑖𝑛5𝜔0 𝑡 + ∙ ∙ ∙

19. Analog Bandwidth vs. Pulse Shape – Fundamental
2/23/2017 19

20. Fundamental Plus 3rd harmonic
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3rd harmonic is out of phase
with the fundamental at center
of the eye – Can decrease eye
opening

21. Fundamental Plus 3rd and 5th Harmonics
2/23/2017 21
5th harmonic is in phase with
the fundamental at center of the
eye – May open the eye height

22. Analog Bandwidth and Bitrate
 General Rule : Scope Analog BW ~ 2.5 x Bitrate
2/23/2017 22
Harmonic Content 25Gbps Square Wave
1st
3rd
5th
nth
12.5GHz 37.5GHz 62.5GHz

23. Bandwidth Effect on the Signal – 2.5GHz Clock

24. Bandwidth Effect on Rise Time: 2.5GHz Clock Example

25. Analog Bandwidth for Edge Characterization
2/23/2017 25
Signals that appear to be low speed can still have high
frequency content and require high sample rate.
 Digital signals can have a low bit
rate but a very fast rise time
 125kb/s has UI of 8us and a
75kHz Fundamental Frequency
 Analog bandwidth required to
characterize signal:
Bandwidth = 0.45 / Rise Time
125 kb/s CAN signal with 21ns rise time
21ns ~ 300x faster than UI!!!!!
Frequency content up to ~ 21.5MHz

26. Scope Probe System Bandwidth
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-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
0 2 4 6 8 10 12 14 16 18 20
Magnitude(dB)
Frequency (GHz)
1 Stage Filter
2 Stage Filter
14 GHz System
20 GHz
Scope
20 GHz Probe
 Cascading Elements Without compensation Reduces Total System Bandwidth

27. System Frequency Response
 Frequency compensation applied in the design and during calibration at
manufacturing time to restore total system bandwidth
2/23/2017 27
-10
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
0 2 4 6 8 10 12 14 16 18 20
Magnitude(dB)
Frequency (GHz)
1 Stage Filter
2 Stage Filter
Compensator Response

28. Loading
2/23/2017 28

29. Loading
 We have to take some energy from the
signal to measure it
 This means the probe tip must have a finite
impedance across the frequency range of
interest
 Obviously we want to keep this impedance
as high as possible
 Loading caused by the effective resistance,
capacitance, and inductance of the probe
leads and input impedance
 Impact and Error determined by how much
the probe’s input impedance loads down the
circuit under test
2/23/2017 29
0
200
400
600
800
1000
1200
1400
0.01 0.1 1 10 100
ImpedanceMagnitude(Ohms)
Frequency (GHz)
LeCroy Probe Impedanc
Dxx05 Probe with Dxx05

30. Passive Probe Ground Lead Effects
2/23/2017 30

31. Optimal Probe Frequency Response
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Transfer Function,
𝑉 𝐶
𝑉 𝑆
= 𝐻 of the series
RLC circuit is given by
𝐻 =
𝑍 𝐶
𝑍 𝑐 + 𝑍 𝐿 + 𝑅
Using the Definitions
𝑍 𝐶 =
1
𝑗𝜔𝐶
𝑍 𝐿 = 𝑗𝜔𝐿
We get the transfer function
𝐻 =
1
𝑗𝜔𝑅𝐶 − 𝜔2 𝐿𝐶 + 1
Choosing Optimal Values for R and L
R = 45Ω
L = 12nH
C = 9.5pF
3dB BW = 520MHz

32. Ideal Passive Probing Example
2/23/2017 32
 Low ground blade inductance from
10nH – 20nH results in the probe
achieving > 500MHz frequency
response
 Copper foil provides a nearby
ground connection to reduce the
length and inductance of the entire
ground loop
 Insulating cap on probe tip
provides electrical isolation
between test points to eliminate
the risk of shorting

33. Not so Ideal Probe Frequency Response
2/23/2017 33
 In most cases, the alligator lead is used
as the return path
 Using alligator lead can result in a 10
inch ground loop
 20nH/in as a rule of thumb results in a
loop inductance of 200nH!
Choosing realistic values for R and L
R = 45Ω
L = 200nH
C = 9.5pF
3dB BW = 176MHz
Resonant peak at 125MHz!
40% error even at 65MHz!

34. Ground Loop Error Real World Example
2/23/2017 34
 65MHz signal measured on
probe with test jig and probe
with a long ground lead
 Long ground lead probe
exhibits 40% error as predicted
 Must keep the signal frequency
down to 35MHz if we want to
keep error under 10%

35. Passive Probe Accessory Kit
2/23/2017 35
PK007-030 HF-Compensated Ground Lead
PK007-014
Copper Pad
PK007-024
Tip Ground Lead
with 0.8mm Socket
PK007-016
Ground Spring
PK007-013
Ground Blade
PK007-005
Spring Tip
PK007-017
Single Lead
Adapter
PK007-018
Dual Lead
Adapter
PK007-020
Micro Clip
Long 0.5 mm
PK007-021
Micro Clip
Short 0.5 mm
IC Caps
PK007-026
Ground Lead
with Mini Clip
PK007-007
Insulating Cap
PK007-027
Ground Lead
with 0.8 mm socket

36. Passive Probe Applications – Micro Grabber
2/23/2017 36

37. Passive Probe Applications – SMT boards
 Sharp spring loaded tip maintains constant contact with probe point
2/23/2017
Company Confidential
37
Bayonet ground stretches to ground point

38. Differential probe loading model
 Differential probe loading model
2/23/2017 38

39. Differential Impedance
 Differential Input Impedance Plot
 Impedance varies as a function of frequency
 Zmax = 1.2 kOhm at DC
 Zmidband = 500 Ohms at 12.5 GHz
 Zmin = 120 Ohms at 25 GHz
2/23/2017 39

40. Loading Impedance
 DC vs. AC Impedance
 Impedance varies as a function of frequency
 Near DC, resistance dominates
 At high frequencies, reactance dominates
 Frequency dependent measurement error*
 Error correction methods described later
 Look carefully at impedance specs.
 Not all manufacturers spec AC and DC impedance separately
 Some only specify DC impedance (resistance)
 LeCroy publishes probe loading in the manuals and datasheets
 A high DC resistance does not imply a high AC impedance
2/23/2017 40

41. Why do we care about loading impedance?
2/23/2017 41
 Frequency dependent error due to
loading is compensated in software.
 If we compensate, why do we care
about loading?
 Still need a good loading over
frequency so not to load down
driving circuit
 Want high impedance across the
entire frequency band to avoid
loading effects over entire probe
bandwidth

42. Dynamic Range
2/23/2017 42

43. Dynamic Range
 Three elements of Dynamic Range
 Input Differential Mode Dynamic Range
 Input Common Mode Range
 Input Offset Range
 Ensure your probe has enough of each type of range to be able to be
able to get your signal on screen
2/23/2017 43

44. Differential Mode Range
 Differential Mode Range (DMR)
 Sometimes casually called “The Dynamic Range”
 Need to look at common mode and offset range as
well
 Maximum voltage between + and - inputs.
 Directly Verify on scope.
Differential Mode Range
Maximum voltage
between inputs

45. Common Mode Range
 Common Mode Range (CMR)
 Maximum voltage between either pin and
(scope) ground
 Normally not seen on screen
 Verify by grounding one input at a time.
Common Mode Range
Maximum voltage from
either input to ground

46. Offset Range
 Offset Range
 Not all inputs are sitting at the same non-zero common-
mode voltage
 Offset range is maximum differential offset a probe can
apply to the input signal to bring in within the differential
mode dynamic range of the scope.
VCM
Vip
Vin
Voffset = Vip - Vin
*Terminals are
referenced to ground

47. Dynamic Range
 Example Voltage Conditions for LeCroy D2505 25 GHz Probe
 1.6 Vp-p (+/- 800 mV) differential dynamic range
 +/- 4 V Common Mode Range
 +/-2.5 V Offset Range
2/23/2017 47

48. Internal Gain/Attenuation
2/23/2017 48
 Inside of the differential amplifier, matching circuits are
used to match impedance of the probe amplifier and the
probe tip.
 Also equalizer circuits are required to flatten the
impulse response of the probe.
 Passive Matching circuits and Equalizers have a nominal
attenuation
 Amplifier adds back gain to compensate for attenuation in
matching circuits.
 Probe datasheets list effective gain/attenuation

49. Noise
2/23/2017
 Ideally, want the probe to add a minimal amount
of noise
 Tradeoffs between gain and noise
 Higher Gain (lower volts per division) adds
more noise at output of diff amp.
 Some vendors specify probe only noise
 Scope+Probe System Signal-to-Noise ratio
is what counts!
*Baseline SNR calculated with no signal applied to the probe
49

50. Noise Comparisons
2/23/2017
 Noise comparison
between competitive
probe (dark blue line is
LeCroy D1605)
 Tradeoffs between gain
and noise
 Also, higher bandwidth
probe has higher noise.
 Some probes do not
have enough gain to
enable high sensitivity
measurements
 Probe in light blue cannot go below
50 mV/div
*Baseline SNR calculated with no signal applied to the probe
50
𝐵𝑎𝑠𝑒𝑙𝑖𝑛𝑒 𝑆𝑁𝑅 𝑑𝐵 = 20 ∗ log
𝑀𝑎𝑥𝑖𝑚𝑢𝑚 𝑆𝑖𝑔𝑛𝑎𝑙 𝑅𝑀𝑆 𝐴𝑚𝑝𝑙𝑖𝑡𝑢𝑑𝑒
𝑅𝑀𝑆 𝑁𝑜𝑖𝑠𝑒

51. Types of Tips
 Variety of Interconnection Options
2/23/2017 51
Solder In (SI)
Highest Bandwidth (Up to 25 GHz)
Best Signal Fidelity
Solder Connection Required
Positioner Tip (PT)
Aka “Browser”
Very High Bandwidth (Up to 22 GHz)
Excellent Signal Fidelity
Convenience of Moving
(No Solder Required)
Quick Connect (QC)
Lower Bandwidth (Up to 6 GHz)
Good Signal Fidelity
Solder resistor test points
Slip on Tip
Square Pin (SP)
Lowest Bandwidth (3.5 GHz)
Decent Signal Fidelity
Easy to Use with headers

52. Best Practices High Speed Active Probing:
DDR Case Study
2/23/2017 52

53. Recommended DDR probing method 1: Hands-free probe holder mounted in reverse position
Strain relief for the probing connection can be provided by utilizing this counter-weight configuration
The typical use model for a hands-free
probe holder is designed to place weight
at the tip of the probe
This reverse mount acts as a counterweight, removing
force from the probe tip, and providing strain relief for
the probing connection during DDR testing
Not recommended probing
configuration for DDR
Recommended probing
configuration for DDR

54. Recommended DDR Probing Method 2: Gooseneck strain relief
Mount adhesive base on nearby chip, strain relief is provided to the solder tips
Adhesive base
mount
Tips soldered
to chip pins Probing discrete
components
A probe with flat geometry and
rubberized flex circuit lead can be
easily secured in place

55. Probe Placement and Coupling
2/23/2017 55
DQ is noisy
• DQ is probed single ended and is more
susceptible to noise coupling than DQS
and CK which are probed differentially.
• The Physical placement of the DQ probe
is very close to the CK probe. You can see
from the shape of the noise that it is
crosstalk from CK signal.
• Ideally the DQ probe should have been
positioned closer to a 90 degree angle
from the other probes.
CK#
DQ

56. Recommended DDR Probing Method 3: Chip clip secures probe to board or chassis
A chip clip prevents movement of the probe platform cable assembly when mounted on a board edge or chassis
Chip clip mounted on corner of
DDR board
Chip clip mounted on edge of
computer chassis

57. Best practices example: using Kapton tape and signal labels on the board
Signal labels on the
board are recommended
Kapton tape is
recommended on the
probe interconnect lead
Taping under the probe lead tip can prevent
accidentally shorting or coupling to nets
underneath.

58. DDR probe heads hot glued to the back of a single-sided DIMM
Probe tips hot glued to the back side of
the BGA ball out of this single-sided
DIMM. This allows for secure connections
during card insertion into the DDR slot.
Note: always hot glue the top,
not the bottom of the probes

59. Probe leads soldered and taped to DDR4 DIMM before inserting into slot
Be careful not to tape on the sides of a DIMM as there are
notches that accept the clips from the connector. If these are
taped over, the DIMM may not seat properly in the slot.

60. Dealing with less-than-ideal probing situations
2/23/2017 60

61. VP@Rcvr – Compensating for reflections
 The Virtual Probe@Receiver Math operator (“VP@Rcvr”) enabled by
the EyeDoctor II package is designed to quickly compensate for signal
reflections due to a termination impairment.
 Does not need S-parameters of DUT or probes
 Builds a transmission line model to virtually move the probing point
closer to the receiver
 Sim option can be used to verify the model
2/23/2017 61

62. Typical LPDDR2 signals
 LPDDR2 667
 667MT/s
 Clock rate
333 MHz)
2/23/2017 62
Clock
Strobe (DQS)
Data (DQ)

63. Zoom in a little (…OK …a lot)
Sometimes the
signals look
really nice, like
this:
2/23/2017 63
Clock
Strobe (DQS)
Data (DQ)

64. Zoom in a little (…OK …a lot)
But other times
they look lousy,
like this:
It’s hard to make
accurate timing
measurements
when the edges
are not clean
2/23/2017 64
Clock
Strobe (DQS)
Data (DQ)

65. Look at Eye Diagrams in DDR Debug Tool Kit – Read Eye
Read eye:
2/23/2017 65
DQS
DQ

66. Look at Eye Diagrams in DDR Debug Tool Kit – Write Eye
Write eye:
2/23/2017 66
DQS
DQ

67. What’s Happening Here?
2/23/2017 67
Read Write
DQS
DQ
DQS
DQ
What gives?

68. So what’s going on here?
Controller DRAM
Z0 = 50Ω
RT >> 50Ω
VA VB
VA
VB
T1 T2 T3

69. Measure the propagation delay
We’re using the
signal itself as a
TDR pulse
2/23/2017 69
Strobe (DQS)
Data (DQ)

70. Now we have a simple model
2/23/2017 70
Z0 = 50Ω
RT >> 50Ω
VA VB
TD = 411ps
Controller DRAM

71. Testing Strategy – VP@Rcvr Example
12/4/2013 71
DQS
Before
DQS
After
DQ
Before
DQ
After
Reflections at Vref have been removed

72. We can create a virtual probe point
2/23/2017 72
PCB
Memory
Controller
DRAM

73. What do our virtually probed signals look like?
Write burst
signals at
original probe
point:
…vs new
virtual probe
point:
2/23/2017 73
DQS
DQ
Original Virtual

74. What do our virtually probed signals look like?
Write burst eye
diagrams at
original probe
point:
…vs new
virtual probe
point:
2/23/2017 74
DQS
DQ Original Virtual

75. End result: the correct signal, at the correct probing point:
2/23/2017 75
Read WriteDQS
DQ

76. VP@Rcvr Example: Interposer Shortcoming
2/23/2017 76
• Signals from end user’s
large FPGA
• Interposer probe point
1.5 inches from receiver
• VP@RCVR can
compensate for the
distance between actual
probe point and desired
probe point

77. VP@Rcvr Example 2: Mid-bus Probing
Probed mid-bus.
Reflections from
RX
Probed mid-bus.
VP@Rcvr applied
Probed at RX
2/23/2017 77

78. Virtual Probe
IC System Board PCIE Connector Plug-In Card IC
Signal degrades over long transmission path and connectors

79. Virtual Probe – Emulation with S-Parameters
2/23/2017 79

80. Virtual Probe
2/23/2017 80

81. Virtual Probe Example
2/23/2017 81

82. One Stage Virtual Probing

83. Two Stage Virtual Probing

84. Virtual Probe with Equalizer

85. Questions?
2/23/2017 85