The document provides an overview of the S12XE family of 16-bit automotive microcontrollers from Freescale Semiconductor. It describes the key features and blocks including the CPU, memory options, communications modules, analog-digital converter, and peripheral modules. Application examples for body controllers and gateways are also mentioned.

1. Introduction of S12XE 16-Bit Automotive Microcontrollers Source: Freescale Semiconductor

2. Introduction Purpose This training module provides an overview of S12XE family MCUs and internal functional circuits. Outline Overview S12XE MCUs S12XE family members Introduction of internal functional modules Application block diagram Content 22 pages

3. Overview of S12XE Excellent System Performance Increased CPU bus frequency up to 50 MHz; 32-bit performance with all the advantages and efficiencies of a 16 bit MCU Scalability and Compatibility Extends S12X memory size up to 1 MB Provides an upgrade path for the S12XD family High System Integrity At the MCU level from features such as the ECC Supervisor Mode and the MPU which eases AUTOSAR integration Flexibility Supports customer requirements, with high memory, enhanced ATD and a large number of peripherals and packaging options Development Support extensive suite of hardware and software development tools available

4. Block Diagram

5. S12XE Family Members Memory options Communications Timers

6. S12XE CPU – CPU12X Full 16-bit data paths supports efficient arithmetic operation and high-speed math execution Supports instructions with odd byte counts, including many single-byte instructions. CPU12X has immediate access to at least three bytes of machine code at the start of every instruction. Extensive set of indexed addressing capabilities. Programming Model

7. XGATE Block Diagram Programmable, high performance I/O coprocessor module with up to 100 MIPS RISC performance Transfers data to or from all peripherals and RAM without CPU intervention or CPU wait states Performs logical, shifts, arithmetic, and bit operations on data Can interrupt the S12X CPU signalling transfer completion Triggers from any hardware module as well as from the CPU possible Two interrupt levels to service high priority tasks Enables Full CAN capability when used in conjunction with MSCAN module Full LIN master or slave capability when used in conjunction with the integrated LIN SCI modules

8. External Bus Interface Signals

9. Clocks and Reset Generator Phase-locked-loop (IPLL) clock frequency multiplier Internally filtered. No external components required Configurable option to spread spectrum for reduced EMC radiation Fast wake up from STOP in self clock mode for power saving and immediate program execution

10. Periodic Interrupt Timer (PIT) Up to 8 timers with independent time-out periods Time-out periods selectable between 1 and 224 bus clock cycles Time-out interrupt and peripheral triggers

11. ADC

12. Inter-Integrated Circuit Compatible with I2C bus standard Multi-master operation Software programmable for one of 256 different serial clock frequencies Software selectable acknowledge bit Interrupt driven byte-by-byte data transfer Arbitration lost interrupt with automatic mode switching from master to slave Calling address identification interrupt Start and stop signal generation / detection

13. MSCAN Up to five MSCAN modules CAN 2.0 A, B software compatible Five receive buffers with FIFO storage Three transmit buffers with internal prioritization Flexible identifier acceptance filter programmable Wake-up with integrated low pass filter Loop back for self test Listen-only mode to monitor CAN bus Bus-off recovery by software intervention or automatically 16-bit time stamp of transmitted/received messages FULL-CAN capability when used in conjunction with XGATE

14. PWM Block Diagram Eight independent PWM channels with programmable period and duty cycle Dedicated counter for each PWM channel Period and duty cycle are double buffered. Programmable center or left aligned outputs on individual channels Eight 8-bit channel or four 16-bit channel PWM resolution Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies

15. Serial Communication Interface Full-duplex or single-wire operation Standard mark/space non-return-to-zero (NRZ) format 13-bit baud rate selection Programmable 8-bit or 9-bit data format Separately enabled transmitter and receiver 1/16 bit-time noise detection Two receiver wakeup methods

16. Serial Peripheral Interface The SPI includes these distinctive features: • Master mode and slave mode • Selectable 8 or 16-bit transfer width • Bidirectional mode • Slave select output • Mode fault error flag with CPU interrupt capability • Double-buffered data register • Serial clock with programmable polarity and phase • Control of SPI operation during wait mode

17. Timer Module • Eight input capture/output compare channels • Clock prescaling • 16-bit counter • 16-bit pulse accumulator

18. Voltage Regulator • Three parallel, linear voltage regulators with bandgap reference • Low-voltage detect (LVD) with low-voltage interrupt (LVI) • Power-on reset (POR) • Low-voltage reset (LVR) • High Temperature Detect (HTD) with High Temperature Interrupt (HTI) • Autonomous periodical interrupt (API)

19. Interrupt Controller

20. Developer Environment

21. Body Controller Application Example

22. Gateway Application Example

23. Additional Resource For ordering the S12XE MCUs, please click the part list or Call our sales hotline For additional inquires contact our technical service hotline For more product information go to http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=S12XE&nodeId=01624686365dlqbJwn Newark Farnell