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Embedded computing platform design

This document discusses various topics related to embedded computing platform design including: 1. It outlines the syllabus which covers topics like CPU buses, memory systems, embedded development platforms, consumer electronics architecture, performance analysis, and program optimization. 2. It provides examples of embedded platforms like Raspberry Pi and BeagleBoard and discusses factors to consider when choosing a platform. 3. It describes techniques for debugging programs on embedded hardware including using USB tools, breakpoints, LEDs, in-circuit emulation, and logic analyzers. 4. It discusses analyzing and optimizing program performance at both the platform and code level through techniques like measuring execution times, understanding cache and pipeline effects, and optimizing loops

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Embedded Computing Platform Design T.Ramprakash AP/ECE Ramco Institute of Technology Rajapalayam 1
Flow of syllabus • The CPU Bus • Memory devices and systems • Designing with computing platforms (debugging tools) • Consumer electronics architecture • Platform-level performance analysis • Components for embedded programs • Models of programs 2
Flow of syllabus • Assembly, linking and loading • Compilation techniques • Program level performance analysis • Software performance optimization • Program level energy and power analysis and optimization • Analysis and optimization of program size • Program validation and testing. 3
CPU Bus It is the collection of wires The bus is the mechanism by which the CPU communicates with the memory and devices 4
CPU Bus • Bus protocol • DMA • System Bus Configuration • AMBA Bus 5
Bus protocol 6
Bus protocol – Four Cycle Handshake 7
A typical Microprocessor Bus 8
Timing Diagram for read and write 9
Wait state 10
Burst Read Transaction 11
State Diagram for bus read Transaction 12
DMA 13
DMA A typical DMA controller includes three registers Starting Address Register Length Register Status Register 14
DMA 15
System Bus Configuration 16
System Bus Configuration 17
AMBA Bus • AMBA high-performance bus (AHB) is optimized for high- speed transfers and is directly connected to the CPU. • It supports several high- performance features: pipelining, burst transfers, split transactions and multiple bus masters. • A bridge can be used to connect the AHB to an AMBA peripherals bus (APB). • This bus is designed to be simple and easy to implement • it also consumes relatively little power. 18
Memory devices and systems 19
Memory Devices and Systems The most basic way to characterize a memory is by its capacity20
RAM • Random-access memories can be both read and written. • They are called random access because, unlike magnetic disks, addresses can be read in any order. • Most bulk memory in modern systems is dynamic RAM 21
RAM • DRAM’s are available as – Synchronous DRAM (SDRAM) – Extended Data Out DRAM (EDO DRAM) – Fast page mode DRAM (FPM DRAM) – Double Data Rate DRAM (DDR DRAM) 22
ROM • Factory-programmed ROM / Field- programmable ROM 23
Designing with computing Platforms • Example Platforms • Choosing platforms • Intellectual Property • Development Environment • Debugging Techniques • Debugging Challenges 24
Example Platforms • Open Source Platforms • Evaluation Boards 25
Raspberry pi 26
Beagleboard 27
Choosing a platform • The factors that influence in selecting a particular platform are – Hardware – CPU – BUS – Memory – IO Devices 28
Intellectual Property • Intellectual property are nothing but software, netlists, etc.., • Examples of IP are – Run-time software libraries – Software development environments – Schematics, netlists and other hardware design information 29
Development Environment 30
Debugging Techniques • Compiling and executing the code on a PC is a good idea of debugging • But in some case, it would be necessary to run the code on the embedded hardware platform. • Embedded platform in not as friendly as PC • USB tool is most evaluation board in one of the most important debugging tool 31
Debugging Techniques • USB tool • Breakpoint • LED • In circuit emulation • Logic Analyzer 32
In circuit Emulation 33
Logic Analyzer 34
Logic Analyzer 35
Debugging Challenges • Logical errors are very hard to track • If run time is too long, it creates unexpected behavior • Meeting Deadlines 36
Consumer Electronics Architecture 37
Consumer Electronics Architecture • Consumer Electronics use cases and requirements • File System 38
Consumer Electronics use cases and requirements • Consumer electronics devices provide several types of services in different combinations – Multimedia – Data Storage and Management – Communication – Non functional Requirements (Battery, Cost, Size) – Use Cases – Hardware Architectures – Operating Systems 39
Use Cases for Playing Multimedia 40
Use Cases for Synchronizing with host system 41
Hardware Architecture of generic consumer electronics device 42
File System • DOS file system • Flash Memory • Flash File 43
Flash Memory 44
Platform level Performance Analysis 45
Platform level Performance Analysis Memory Cache CPU Bus 46
Performance Analyzer • Bandwidth as performance • Bus bandwidth • Bus Bandwidth characteristics • Bus bandwidth formulas » t = TP (T  Bus cycle, P  Bus clock period) » Tbasic(N) = (D+O) N/W • Component bandwidth • Memory aspect ratio 47
Memory Aspect Ratio 48
Components for embedded programs 49
Components for embedded programs • State Machine • Circular Buffer • Queue 50
State Machine 51
State Machine 52
Circular Buffer 53
Circular Buffer 54
Queue 55
Model of Programs 56
Model of Programs • Data flow graphs • Control/Data flow graph 57
Data flow graphs 58
Extended Data flow graphs 59
Standard Data flow graphs 60
Control/Data flow graphs 61
Assembly, Linking and Loading 62
Program generation from compilation through loading 63
Program generation from compilation through loading 64
Assembler • Converts assembly language programs into object files • Object files contain a combination of machine instructions, data, and information needed to place instructions properly in memory • Assemblers need to – translate assembly instructions and pseudo- instructions into machine instructions – Convert decimal numbers, etc. specified by programmer into binary 65
Assembler • Typically, assemblers make two passes over the assembly file – First pass: scans the code to determine the address of each label – Second pass: assembles the instructions using the label values computed in the first pass 66
Assembler 67
Assembler 68
Linker 69
Linker 70
Linker • Tool that merges the object files produced by separate compilation or assembly and creates an executable file • Two phases – It determines the address of the start of each object file. – Loader merges all symbol tables from the object tables from the object file into a single large table 71
Dynamically linked libraries • It saves storage space • Programs can be easily updated 72
Compilation techniques 73
Compilation techniques • Compilation process • Basic Compilation methods • Compiler Optimizations 74
Compilation process Compilation = translation + optimization 75
Basic Compilation methods • Statement Translation • Procedures • Data Structures 76
Statement Translation • Compiling an arithmetic expression x= a * b + 5*(c - d) 77
Statement Translation • Compiling an arithmetic expression x= a * b + 5*(c - d) ADR r4,a ; MOV r1,[r4] ; ADR r4,b ; MOV r2,[r4] ; ADD r3,r1,r2 ; ADR r4,c ; MOV r4,[r4] ; ADR r4,d ; MOV r5,[r4] ; SUB r6,r4,r5 ; MUL r7,r6,#5 ; ADD r8,r7,r3 ; 78
Compiling c conditional code if(a+b>0) x=5; else x=7; ADR r5, a LDR r1, [r5] ADR r5, b LDR r2,[r5] ADD r3,r1,r2 BLE label3 True Case: LDR r3,#5 ADR r5,x STR r3,[r5] B exit Label3 LDR r3,#7 ADR r5,x STR r3,[r5] exit: 79
Procedures • Creation of procedures is the major problem in code • At the procedure definition, we generate the code to handle the procedure call and return • The CPU’s subroutine call mechanism is usually not sufficient to directly support procedures • Procedure stack and Procedure linkage are different kinds of functions performed on procedure 80
Procedure linkage • Procedure linkage mechanism provides a way for the program to pass parameters into the program and for the procedure to return a value • It also provides help in restoring the values of register that the procedure has modified 81
Procedure Stacks • Procedure stacks are typically built to grow down from high addresses • It has two pointers – Stack Pointer : defines the end of the current frame – Frame Pointer: defines the end of last frame • When a new procedure is called, the stack pointer and frame pointer are modified to push another frame onto the stack 82
Registers used for Procedures • ro - r3  used to pass parameters into the procedures • ro  used to hold the return value • r4 – r7  hold register variables • r11  Frame pointer • r13  Stack Pointer • r10  holds the limiting address on stack size which is used to check for stack overflows 83
Data Structures • The compiler must also translate references to data structures into references to raw memories 84
Compiler Optimizations • Loop Transformations • Dead Code Elimination • Register allocation • Scheduling • Instruction Selection • Understanding Compiler 85
Loop Transformations • Loop Fusion: two or more loops in to single loop – Must have same iteration – No dependencies between the loop • Loop Distribution: One in to many loops 86
Dead Code Elimination • Dead code can never be executed • Remove unreachable code 87
Register allocation • We have to choose assignments of variables to registers to minimize the total number of required registers 88
Scheduling • We can choose the order in which operation will be performed • We can keep track by resource utilization over time Reservation Table 89
Program Level Performance Analysis 90
Program Level Performance Analysis • Need to understand performance in detail: • Program performance  CPU performance: – Pipeline, cache are windows into program. – We must analyze the entire program. 91
Complexities of program performance • Varies with input data: – Different-length paths. • Cache effects. • Instruction-level performance variations: – Floating Point Operation/ Integer Operation – The execution time of an instruction in a pipeline depends not only on that instruction but on the instructions around it in the pipeline 92
How to measure program performance • Simulate execution of the CPU. • Measure on real CPU using timer. • Measure on real CPU using logic analyzer. 93
Program performance metrics • Average-case execution time. – Typically used in application programming. • Worst-case execution time. – A component in deadline satisfaction. • Best-case execution time. – Task-level interactions can cause best-case program behavior to result in worst-case system behavior. 94
Elements of program performance • Basic program execution time formula: execution time = program path + instruction timing • Instruction timing takes data dependencies, pipeline behavior and caching into account 95
Elements of program performance if (a || b) /* T1 */ { if ( c ) /* T2 */ { x = r*s+t; /* A1 */ } else { y=r+s; /* A2 */ } z = r+s+u; /* A3 */ } else { if ( c ) /* T3 */ { y = r-t; /* A4 */ } } 96
Paths in a loop for (i=0, f=0; i<N; i++) { f = f + c[i] * x[i]; } i=0 f=0 i<N f = f + c[i] * x[i] i = i + 1 N Y 97
Instruction timing • Not all instructions take the same amount of time. – Multi-cycle instructions. – Fetches. • Execution times of instructions are not independent. – Pipeline interlocks. – Cache effects. • Execution times may vary with operand value. – Floating-point operations. – Some multi-cycle integer operations. 98
Measurement Driven Performance Analysis • Not so easy as it sounds: – Must actually have access to the CPU. – Must know data inputs that give worst/best case performance. – Must make state visible. I. Program Traces II. Profiling III. Physical Performance measurement IV. Simulation Based Performance Measurement 99
Program Traces • Program Trace is the record of execution path of a program • Trace-driven: – Instrument the program. – Save information about the path. • Trace files are large. • Widely used for cache analysis. 100