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Bangladesh ic-design-program-rev4-1 bd
Cadence Design Systems and sBIT plan to collaborate with Bangladeshi universities and government to develop the local electronics and microelectronics industry. Their goals are to: 1) create world-class engineering education programs, 2) foster commercial microelectronics design, 3) enable local businesses, 4) attract foreign direct investment, and 5) build an electronics ecosystem and media network. They propose a multi-phase implementation plan focusing initially on universities, then commercial training, and finally supporting local businesses and entrepreneurs. The total projected value of this initiative is $21.5 billion over 5 years.
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Bangladesh ic-design-program-rev4-1 bd
- 1. 6/20/13 Cadence-inVision confidential1 BabithaS.J., Marketing Manager, Cadence Design Systems Jahangir Dewan, President and CEO, sBIT (USA ) ED NOMAN HUSAINY BANGLADESH Enabling High-Tech Economy Through Microelectronic VLSI Design The Stratergies for New Bangladesh INVENTIVE Contact: JahangirDewan,email:jdewan@sbit-us.com Phone:+408-391-0521(USA)01726806294BD +880192-578-1621
- 2. 6/20/13 Cadence-inVision confidential2 ExecutiveSummary • Cadence Design Systems & sBIT (inVision) plans to collaborate with Bangladeshi Universities and Government in order to become the trusted advisor with the objective to develop and support the local high-tech and microelectronics industry to attract foreign direct investments and fuel the local economy – By enabling a new Electronics Design Ecosystem. – By supporting the country in creating a world class resource pool to fuel the local economy and attract Foreign direct investments. – By enabling the transition from a Services business environment to an electronics and systems design industry.
- 3. Executive Summary continue • Inorder to increase the efficiency of our activities we believe it is crucial to implement our ideas as a joint program of the Academia, Government and Cadence combining available funds, local government investments and Cadence contributions in terms of Software, Hardware and Services. • Cadence and sBIT has great experience in partnering with Universities and Governments in emerging countries such as BRIC states to enable business growth in the local high-tech and microelectronics industry. 6/20/13 Cadence-inVision confidential3
- 4. 6/20/13 Cadence-inVision confidential4 ExecutiveSummary continue • Cadence and sBIT has proven solutions to support a country in creating a world class talent pool and engineering talent – accelerating start-up communities – attracting foreign direct investments and creating awareness through media and our existing network. • Our holistic and sustainable development strategy is exactly focusing on these important pillars of each country: 1. Academic Education –Industry Ready Engineers 2. Commercial Microelectronics Design 3. Local Business Enablement 4. Foreign Direct Investment 5. Electronics Ecosystem & Media Network • We see our role as the trusted advisor and indispensable partner to the government and its organizations to best support and implement these mid to long term strategies.
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- 7. Optical Navigation DivisionPHYSICALDESIGN METHODOLOGY Encounter P&R LIB LEF,LIB,TEC SYNTEHSIZE RTL2GateLEC CTS POSTCTSOpt ROUT PlacementandOpt PostRouteOpt LEC,DRC, LVS,ERC,IR,STA FloorPlan FullChipIntegration GDSII,DRC,LVS,ERC,LATCH-UP Netlist release to check (*GDSII, ATPG and Functional gate sim) GDS II check TAPE-OUT(RELESAETOCHECK) RTL Sign-off
- 8. Encounter Place andRoute (PnR) Flow (Physical Design) CadenceFoundationFlow 1 setup:SetupRunDirectory 2 init:CreateInitialDatabase 3 place:CellPlacement 4 prects:PreCTSOptimization 5 cts:ClockTreeSynthesis 6 postcts:PostCTSOptimization 7 postcts_hold:PostCTSOoldFixing 8 route:Global/DetailRoute 9 postroute:PostRouteOptimization 10 postroute_hold:PostRouteHoldFixing 11 postroute_si_hold:SIHoldFixing 12 postroute_si:SIOptimization 13 signoff:SignoffTiming/Verify 14 IR_drop_analysis-UsingFE/EPS,staticanddynamicpower
- 9. Building the VLSIDesign Echo System in Academics and Create Industry
- 10. 6/20/13 Cadence-inVision confidential10 ServicesDesignEnvironmentTraining Ministries Consultants & Associations Industry The Electronics Design Ecosystem High-level Strategy – 5 Pillars Government Local Business Enablement Foreign Direct Investment Academic Education Electronics Ecosystem & Media Network Commercial Microelectronics Design • Cadence Industry trainig Progtram • Design Foundations • Commercial IC Design • Design House enablem. • Startup enablement • Entrepreneurship • Cadence Customers • Executive network • VCs • Design chain • Supply chain • PR +++ MNCs with R&D Activities, FDI+ +++ World Class Graduates +++ World Class Talent Pool +++ local SMEs, start-ups, spin-offs, new jobs, local R&D&I Connect & Spread the word Enable and stimulate local microelectronics business Grow quantity and quality of graduate engineers that are attractive to the industry Elevate skills of existing engineers to become professional and productive microel. designers Attract investments from multi-nationals and international investors Connect local micro- el. community to international eco- system and media network Project steering committee
- 11. 6/20/13 Cadence-inVision confidential11 Goals& Objectives 1.Create World Class Micro electronic Engineering Education 2.Foster Commercial Microelectronics Design 3.Local Business Enablement 4.Foreign Direct Investment 5.Electronics Ecosystem & Media Network
- 12. 6/20/13 Cadence-inVision confidential12 SemiconMarket Analysis • The global semiconductor industry is a fragmented market – Global Semiconductor Industry Is Expected To Witness A CAGR Of 4.3% over the Next Five Years and Reach an Estimated $394 Billion In 2017 – The Asia Pacific (APAC) region dominates this market and represents approximately three-fourths of the global market – increasing demand for semiconductors from the BRIC (Brazil, Russia, India, and China) economies due to increasing end-use electronic product demand
- 13. 6/20/13 Cadence-inVision confidential13 Opportunitiesfor Bangladesh Adequate Talent Pool Cost Competitiveness Increase demand of electronic Products in the country Reverse Brain Drain
- 14. 6/20/13 Cadence-inVision confidential14 FDI– Foreign Direct Investment • Target Audience: – Multinational companies • Horizon: – Mid to long term • Objective: – Attract foreign direct investment • Value: – Increase business and investments
- 15. 6/20/13 Cadence-inVision confidential15 •Phase I: • Target audience – Universities • Objective – Grow quantity and quality of microelectronic engineers • Value – Provide attractive graduates to microelectronics industry • How – Identify top Engineering institutes – Provide them with the Industry tools – Augment/create curriculum of these universities, to fulfill industry requirements – Train the trainers Implementation Plan
- 16. Implementation Plan • PhaseII • Commercial Microelectronics Design Training • Objectives – Elevate engineers to become professional IC designers • Value – Microelectronic industry get’s access to local professional IC designers • How 1. Select 200 students from top 20 Engineering colleges 2. Incubation centre -Commercial IC Design Training (18 months, 8 hours a day) Theory plus execution and completion of industry representative design project Degree: Certified “Commercial IC Designer” (Diploma from local government) 6/20/13 Cadence-inVision confidential16
- 17. Implementation Plan • PhaseIII • Local Business Enablement • Target audience: – Local entrepreneurs and engineering talent • Objectives: – Enable the growth of local microelectronic business – Facilitate design starts – Enable the transition from a manufacturing only business environment to an electronics and systems manufacturing and design industry – Reward microelectronic designers and expatriates to relocate • Value: – Increase international competitiveness – Advance in the chain of economic value 6/20/13 Cadence-inVision confidential17
- 18. Value Proposition • Toolsfor the Universities: $240M • Student Resources for the Universities (20*5*1000) = 100k * 100k = $10 Billion • Net Worth of 1000 Resources: 1000 x $1 M = 1 Billion • IP Created: 100 IPs in 5 year: 100*$200K*10 = $200 M • Industry Value: $10 Billion • Total Value: $21.5 Billion 6/20/13 Cadence-inVision confidential18
- 19. Funding • Government ofBangladesh (GOB) need to arrange necessary fund to implement this project for five years • Required fund for 5 Years: $30 Million Setup and Ramp up by Cadence-inVision: $10 Million for 1st and 2nd year This include software and support from Cadence for 20 universities (list price: $240 Million), Instructors salary, material cost, travel, etc. Continue project for 3rd , 4th and 5th year: $5.0 Million In this phase more then 50% of the instructors will be local Facility and Infrastructure (data center, desktop, laptop, office rent, etc.): $5.0 Million Salary/Scholarship for 200 participants (for 5 years): $5.0 Million Incubation fund for Commercial IP Development: $5.0 Million 6/20/13 Cadence-inVision confidential19
- 20. Building Expertise inthe Horizon
- 21. Macros: FixedMacro Placement (automated using DEF file) - Power grid: Top down and isolation of power domains (Analog and Digital) - Early Power Analysis Floor Planning
- 22. Dynamically Distributed spare gatemodules across the module/core - Spare Gates Placement (white spots) Spare Gate Strategy
- 23. Clock Tree Distribution CTS: Using Automated Gated CTS Strategies and CTS Specs
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- 25. Power Analysis: vdd Power Analysis using Cadence Encounter Tools
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