30 CHL PCM PDH SDH BY SKG

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30 CHL PCM
PDH
SDH

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30 CHL PCM PDH SDH BY SKG

  1. 1. PULSE CODE MODULATION (PCM) 1
  2. 2. Frequency Division Multiplexing (FDM) 2
  3. 3. 3
  4. 4. PULSE CODE MODULATION (PCM) ( )DEFINITION: Pulse code modulation ( l d d l (PCM) is essentially analog‐ ) ll lto‐digital conversion of a special type where the informationcontained in the instantaneous samples of an analog signal isrepresented by digital words in a serial bit stream stream.The advantages of PCM are:• Relatively inexpensive digital circuitry may be used extensively.• PCM signals derived from all types of analog sources may be merged with data signals and transmitted over a common high‐speed digital y communication system.• In long‐distance digital telephone systems requiring repeaters, a clean PCM waveform can be regenerated at the output of each repeater, where the input consists of a noisy PCM waveform.• The noise performance of a digital system can be superior to that of an analog system.• The probability of error for the system output can be reduced even further by the use of appropriate coding techniques. SKGOCHHAYAT,SDE,RTTCBHUBANESWAR
  5. 5. 4.1 Digital Modulation• Advantages : – Immunity to noise – Easy storage and processing: MP, DSP, RAM, ROM, Computer – Regeneration – Easy to measure – Enables encryption – Data from several sources can be integrated and transmitted using the same digital communication system – Error correction detection can be utilized• Disadvantages : – Requires a bigger bandwidth – Analog signal need to be changed to digital first – Not compatible to analog system Voice : Analog : 4 kHz – Need synchronization Digital : 2 x 4 kHz x 8 bit = 64 kb/s BWmin = 32 kHz i 5
  6. 6. A brief aside about ADCs • ADCs are used to convert an analogue input voltage into a number that can be interpreted as a physical parameter by a computer. computer1111 Resolution=1110 1 part in 2n1100110110111010100110000111011001000010010100110001 1000 1110 1111 1011 0100 0001 0011 Numbers passed from ADC to computer to represent analogue voltage 6
  7. 7. Analog to Digital Conversion The Analog‐to‐digital Converter (ADC) performs three functions:Analog – SamplingInput • Makes the signal discrete in time.SignalSi l • If the analog input has a bandwidth Sample of W Hz, then the minimum sample frequency such that the signal can be b reconstructed without di t ti t t d ith t distortion.ADC – Quantization Quantize • Makes the signal discrete in 111 110 amplitude. l d 101 100 011 • Round off to one of q discrete levels. 010 Encode 001 000 – Encode • Maps the quantized values to digital words that are 8 bits long. If the (Nyquist) Sampling Theorem is Digital Output satisfied, then only quantization introduces f d h l d Signal distortion to the system. 111 111 001 010 011 111 011
  8. 8. Basic Steps For PCM System• Filtering• Sampling• Quantization Q i i• Encoding• Line Coding• FILTERING Filters are used to limit the speech signal to the frequency band 300‐3400 Hz. Hz 8
  9. 9. SAMPLING PROCESSs(t) δA t TsFourier series for impulse train :S(t) = δ⁄TS + 2δ⁄TS (Cos 2π (t ⁄TS )+ Cos 2x2π (t ⁄ TS +….) 9
  10. 10. PAM OUTPUT SIGNALS 10
  11. 11. Nyquist’s Theorem says :"If a band limited signal is sampled atPulse Code Modulation (PCM) regular intervals of time and at a rate equal to or more than twice the highestCodec technique signal frequency in the band, then the sample contains all the information of the original signal." PCM actually uses Voice Bandwidth = 8000 samples/sec since cutoff not sharp. 300 Hz to 3400 Hz Analog Audio Source Sampling Stage = Sample fS ≥ 2fmHeight of sampled signal above /below the base line is converted 8 kHz (8,000 Samples/Sec)to a binary value 11
  12. 12. The choice of sampling frequency, fs must follow the sampling theorem toovercome the problem of aliasing and loss of information.The spectrum of thesampled signal has sidebands fs ± fm , 2fs ± fm , 3fs ± fm and so on. Shannon sampling ( ) Sampling eque cy (a) S p g frequency=> fs1 < 2fm (max) f theorem=> fs ≥ 2fm th > ms(f) Aliasing Nyquist frequency fs = 2fm= fN f A bandlimited signal that fm fs1 2fs1 3fs1 has a maximum f q frequency, fmax can be y, regenerated from the (b) Sampling frequency=> fs2 > 2fm (max) sampled signal if it is ms(f) sampled at a rate of at least 2fmax . f fm fs2 2fs2 f 3fs2 f 12
  13. 13. m(t)Information signal t s(t)Pulse signal t Ts Sampled signal (PAM) p g ( ) ms(t) ms(t) t t Ts Ts Natural Sampling Flat‐top Sampling 13
  14. 14. PULSE AMPLITUDE MODULATED SIGNAL NATURAL TOP SAMPLING CLOCK The FET is the switch used as a sampling gate. When the FET is on, the analog voltage is shorted to ground; when off, the FET is essentially open, so that the analog signal sample appears at the output. Op-amp 1 is a noninverting amplifier that isolates the analog input channel from the switching function. 14
  15. 15. FLAT-TOP SAMPLING HIGH FANOUT OP AMP-2 clock SAMPLED & HOLD CIRCUIT 15
  16. 16. sample-and-hold circuit.As seen in Figure, the instantaneous amplitudeof the analog (voice) signal is held as a constantcharge on a capacitor for the duration of thesampling period Ts.Op-amp 2 is a high input-impedance voltagefollower capable of driving low-impedance loads(high “fanout”).The resistor R is used to limit the output currentof op-amp 1 when the FET is “on” and providesa voltage division with rd of the FET. (rd, thedrain-to-source resistance, is low but not zero)d i t i t i l b t t )
  17. 17. 4.3.1 Difference in Sampling Methods ms(t) Natural Sampling t Ideal Sampling Flat-top Sampling• In every sampling methods, the pulse amplitude is directly proportional to the amplitude of the information signal• Practically, an ideal sampling is difficult to generate• However, by using an ideal and natural sampling, noise can be eliminated, which is not the case for flat‐top sampling 17
  18. 18. QuantizationThe output of a sampler is still continuous in amplitude. Each sample can take on any value e.g. 3.752, 0.001, etc.The number of possible values is infinite.To transmit as a digital signal we must restrict the number ofpossible values.Quantization is the process of “rounding off” a sample according tosome rule. E.g. suppose we must round to the nearest tenth, then: 3.752 ‐‐> 3.8 0.001 ‐‐> 0 Eeng 360 18
  19. 19. QUANTIZING POSITIVEQUANTIZING‐POSITIVE SIGNAL 19
  20. 20. QUANTIZING ‐ SIGNAL WITH + Ve & ‐ Ve VALUES 20
  21. 21. 4.6.3 UNIFORM QUANTIZATIONUniform quantization is a quantization process with a uniform (fixed) quantizationinterval. Example : n = 3 , L = 8 , signal +5 V ; => Vk = 1.25 V . Bit rate: fb =nf s Quantization level & Quantized Sampled signal binary representation value +5.0V Leve l 7 : 111 4.375V 4.3V Level 6 : 110 3.125V 1.9V Level 5 : 101 1.875V 1.9V Level 4 : 100 0.625V t Level 3 : 011 -0.625V Level 2 : 010 -1.875V Level 1 : 001 -3.125V -3.2V Level L l 0 : 000 -4.375V -4 375V -4.5V 4 5V -5.0V 21
  22. 22. 4.6.3.2 Quantization errorQuantization error (Qe) is also called Quantization noise (Qn) . And its maximummagnitude is one half of the voltage of the minimum step size . May add to or substract from the actual signal 22
  23. 23. 4.6.3.2 Quantization error 23
  24. 24. Example : Uniform Quantization errorBinary Input voltage Input voltage range: –14 mV tonumber range (mV) +14 mV 1 11 10 to 14 Qn = LSB voltage /2 = qi /2 g 1 10 6 to 10 1 01 2 to 6 ± 14 mV = 28 mV with 8 steps and 8 codes. 1 00 0 to 2 Therefore Qn = 28/8 = 3.5 mV. 0 00 ‐2 to 0 Therefore : Qn= 3.5 mV / 2 = 1.75 mV 0 01 ‐6 to ‐2 0 10 ‐10 to ‐6 SNRq = [1.76 + 6.02n] dB 0 11 ‐14 to ‐10 Noise from quantization error can be reduced by increasing the quantization level i.e increase n. 24
  25. 25. Pulse Code Modulation - Analog to Digital Conversion Quantizing Noise – sampling is not perfect - the analog value may not correspond exactly A-Law (Europe) to a binary value Output 100100111011001 Stage 1µ-Law (USA–Japan) Quantizing Stage 25
  26. 26. Non uniform quantization companding 26
  27. 27. ENCODING CURVE WITH COMPRESSION 8 BIT CODE 27
  28. 28. 2 Popular companding system (standardized by ITU) • EUROPE => A ‐ Law • USA/NORTH AMERICA => µ ‐ Law 1+ log(Ax) 1  1+ logA for 〈 x〈1  A y= Ax 1  for f 0〈 x〈  1+ logA  A A ‐ compressor paramater. Usually the ll h value of A is 87.6. 28
  29. 29. USA/NORTH AMERICA => µ ‐ Law µ Law is a standard compress‐ expand that is used in America and Japan. The value of µ used is 255 (8 bit). log( 1 + µ x ) y = log (1 + µ ) For both laws, the values of x and y refers t th equation below: f to the ti b l Ei Eo x= y = E i ( mak ) E o ( mak ) 29
  30. 30. Example : PCM‐System PCM‐Frame structure and Timing : European standard PCM system : E Line 488 ns Bit duration 8 bits per time slot 3.9 µs 3.9 µs 30 signal + 2 control = 32 channels = 1 frame 125 µs 125 µs Signalling & synchronization 2 ms Duration of multiframe 16 frames = 1 multiframe (a) bits per time slot (b) time slots per frame (c) frames per multiframe 30
  31. 31. E1 CAS Transmission Format ITU‐T Rec. G.704 Multiframe (16 frames) Frame 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Frame 0 (32 Time Slots) Frame 1 (32 Time Slots)Time Slot 0 1 2 3 4 5 6 7 8 910 12 14 16 18 20 22 24 26 28 30 0 1 2 3 4 5 6 7 8 910 12 14 16 18 20 22 24 26 28 30 11 13 15 17 19 21 23 25 27 29 31 11 13 15 17 19 21 23 25 27 29 31 Time Slot 0 Time Slot 1 Speech Time Slot 16 Speech Time Slot 0 Speech Time Slot 16 Speech (8 bits) Speech (Ch 1) Ch 1 15 (Ch. Ch. 1-15 (8 bits) Ch. 16-30 Ch 16 30 (8 bits) Ch. 1-15 Ch 1 15 Signalling Bits Ch. 16-30 Ch 16 30 1 1 1 1 1 1 1 1 LSB 11111111X0011011 0 0 0 0X0XX X1 0XXXXX 00000000 Fr. 0 0 Ch. 0 0 0 0 0 0 Ch. Multi- Frame Changes to 1 on Changes to 1 on Frame A BCD A BCD Alignment loss of distant loss of distant frame Alignment Word Word multiframe (remote alarm) 1 1 16 Not-Frame 2 2 17 alignment word 3 3 18 • Time Slot 16 : Frames 2 through 15 are the same as frame 1 : : : 15 15 30 • Time Slot 0: Even number frames 2 through 14 are the same as frame 0 • Time Slot 0: Odd number frames 3 through 15 are the same as frame 1 1 = bit set to 1 0 = bit set to 0 1/0 = speech / signalling (varying data) X = unassigned bit (normally set to 1)
  32. 32. PDH E1 signal PCM30 basic frame 0 1 2 15 16 17 31 voice voice voice SIG voice voice 1 2 15 16 30 t ca. 3,9 µs 1 2 3 4 5 6 7 8 Bit numbering 32 x 8 = 256 bit Bit No. 125 µs 12345678 Bit No. 1 2 3 4 5 6 7 8 value X0 0 1 1 0 1 1 Value X1 Y Y Y 1 1 1Frame alignment Message Bit 1, X Used in Bit 1 X Used in international connections international Bit 3 Y=1 FRAME SYNCHRONISATION connections, ti Bit 4 Y=1 HIGH ERROR DENSITY Bit 3,4,5 111 Urgent alarm FAW :‐0011011 Bit 6‐8 111 Reserved for national options 32
  33. 33. PCM – 32 channels (30 signals + 2 control) Frame structure and timing Number of channel = 32 Number of bits in one time slot = 8 32 channels = 1 frame Number of bits in a frame = 32 x 8 = 256 bitsThis frame must be transmitted within the sampling period and thus 8x 103 frames are transmitted per second second.Therefore : Transmission rate = 8 x 103 x 256 = 2 048 Mb/ T i i t 2.048 Mb/s Bit duration = 1 / 2.048 x 106 = 488 ns Duration of a time slot = 8 x 488 ns = 3.9 µs µ Duration of a frame = 32 x 3.9 µs = 125 µs => (= 1 / 8 kHz = 125 µs) Duration of a multi frame = 16 x 125 µ s = 2 ms 34
  34. 34. PDH E1 signal European digital signal 1 PCM30 (Puls Code Modulation, 30 voice channels) G.703, G.704, G.732 (ITU recommendations) PDH basic system (Plesiochronous Digital Hierarchy) Features Time multiplex Bit rate 2,048 Mbit/s ±50 ppm 32 channels with 64 kbit/s each 30 voice channels 1 synchronisation/message, 1 signalling channels, synchronisation/message 75 Ω coax or 120 Ω symmetrical twisted pair Rectangular pulses, HDB3 line coding 35
  35. 35. Bit rate for PCM transmission Telephone Europe bit rate(Mb/s) Telephone North America bit channel channel rate(Mb/s) 30 2.048 24 1.544 120 8.448 48 3.152 480 34.368 96 6.321 1920 139.264 672 44.736 7680 565.148 4032 274.176 SDH 2.5Gb/s North American standard (NAS) : µ-LawEuropean standard : A‐Law For every 24 sample, 1 bit is added for synchronization30 + 2 control channel = 32 ∴ For 24 sample => 24 x 8 bit/sample + 1 bitBit rate 32 x 8 bit/sample x 8000 sample/s rate= = 193 bits bi= 2.048 Mb/s ∴ Bit rate= 193 x 8000 = 1.544 Mb/s Needs Multiplexing – Process of transmitting two or more signals simultaneously 36
  36. 36. PDH Hierarchy E1 E2 E3 E4 (E5) 2.048 Mbit/s 8.448 Mbit/s 34.368 Mbit/s 139.264 Mbit/s 565.148 Mbit/s DIV PCM E2 DSMX 2/8 64k/2M E3 8/34 LE2 E4 34/140 MStD E5 140/565 37
  37. 37. SIGNAL :‐ :• PLESIOCHRONOUS SIGNAL• SIGNALS WHOSE CLOCK CAN VARRY INDEPENDENT OF ONE ANOTHER BUT THE RANGE OF SIGNAL VARIATION IS RESTRICTED WITHIN CERTAIN LIMITS LIMITS.• Synchronous Signal• Asynchronous Signal
  38. 38. MULTIPLEXING OF SYNCHRONOUS DIGITAL SIGNALSBlock interleaving : gBunch of information taken at a time from each tributary and fed to main multiplex output stream. The memory required will b very l h d ll be large.Bit interleaving :A bit of i f f information t k at ti ti taken t time ffrom each t ib t h tributary and fed to main multiplex output stream in cyclic order, a very small memory is required. , y y q
  39. 39. Justification• In general, incoming tributaries have general independent clocks. In that case, it is inevitable that clock rate of a tributary and the (divided) clock rate of the multiplexer (in second order TDM it is 8448/4 = 2112 KHz) TDM, are not the same. Without any precautions, the result will be Slip Slip.
  40. 40. MULTIPLEXING OF ASYNCHRONOUS SIGNAL• Positive justification : Common synchronization bit j y rate offered at each tributary is higher than the bit rate of individual tributary.• Positive‐negative justification : Common f synchronization bit rate offers is equal to the nominal value.• Negative justification : Common synchronization bit rate offered is less than the nominal value.
  41. 41. PDH E2 signal Frame structure Frame alignment pattern Alarms 1111010000UN Justification control bits Justification bits 1 bit per channel and frame 1 bit per ch. and frame (transmitted 3 times) no stuffing: information 0=no stuffing; 1=stuffing stuffing: fixed value 1234 1234 12345678 1..12 13..212 5..212 5..212 9..212 Block 1 Block 2 Block 3 Block 4 200 info bits 208 info bits 208 info bits 204-208 info bits 848 bit 100,38 µs 42
  42. 42. • Four bit stream of 2048 Kb/s are multiplexed. The resulting bit stream of 8448 Kb/s can be thought of being composed as / g g p follows :‐ Per tributary=8448÷4=2112Kb/s• No of frame per second =8448kb/s÷848=9962≈10000• Nominal bit rate : 2048 Kb/s• Frame alignment i f F li t information P t ib t ti Per tributary: 30 Kb/ Kb/s• Justification control digits : 30 Kb/s• Sub total : 2108 Kb/s• Justification digits : 2112‐2108= 4 Kb/s used to allow over speed• Justification rate per frame and E1 signal 0.42 bit
  43. 43. PDH E3 signal Frame structure Frame alignment pattern Alarms 1 1 1 1 0 1 0 0 0 0 UN Justification control bits Justification bits 1 bit per channel and frame 1 bit per ch. and frame (transmitted 3 times) no stuffing: information 0=no stuffing; 1=stuffing stuffing: fixed value 1234 1234 12345678 1..12 13..384 5..384 5..384 9..384 Block 1 Block 2 Block 3 Block 4 372 info bits 380 info bits 380 info bits 376-380 info bits 1536 bit 44,6927 µs 44
  44. 44. PDH E4 signal Frame structure Alarms Frame alignment pattern Data communication channel 1 1 1 1 1 0 1 0 0 0 0 0 D N Y1 Y2 Justification control bits Justification bits 1 bit per channel and frame 1 bit per ch. and frame (transmitted 5 times) no stuffing: information 0=no stuffing; 1=stuffing stuffing: fixed value 1234 12345678 1..16 17..488 5..488 9..488 Block 1 Block 2, 3, 4, 5 Block 6 472 info bits je 484 info bits 480 - 484 info bits 2928 bit 21,024 µs 45
  45. 45. Specification at Output Port E1 E2 E3 E4 E5Bit rate in Mbit 2.048 8.448 34.368 139.264 565.148Clock tolerance ±50PPM ±30PPM ±20PPM ±15PPM ±5PPMFrame length in bits 256 848 1536 1928Stuffing rate per frame 0.42 0.4357 0.4192Impedance in Ω 120/ 75 75 75 75 75Nominal pulse width 244 ns 59ns 14.55nsLine code HDB–3 HDB–3 HDB–3 CMI
  46. 46. What is SDH?• The basis o Sy c o ous Digital Hierarchy (S ) e bas s of Synchronous g ta e a c y (SDH) is synchronous multiplexing ‐ data from multiple tributary sources is byte interleaved.• In SDH the multiplexed channels are in fixed locations relative to the framing byte.• De‐multiplexing is achieved by gating out the required bytes from the digital stream.• Thi allows a single channel t b ‘d This ll i l h l to be ‘dropped’ f d’ from the data stream without de‐multiplexing intermediate rates as is required in PDH PDH.1/13/2012
  47. 47. Multiplexing Processes– Multiplexing is composed of various processes: • Mapping –Tributaries adapted into Virtual Containers (VC) by adding stuffing and POH • Aligning –Pointer is added to locate the VC inside an AU or TU • Multiplexing –Interleaving the bytes of multiple paths Interleaving • Stuffing –Adding up the fixed stuff bits to compensate g p p for frequency variances
  48. 48. TRANSPORT OF PDH PAYLOADSDH is essentially a transport mechanism for carrying a large number of PDH payloads.• A mechanism is required to map PDH rates into the STM frame. This function is performed by the container (C).• A PDH channel must be synchronized before it can be mapped into a container.• The synchronizer adapts the rate of an incoming PDH signal to SDH rate.SDH and non synchronous signal• At the PDH/SDH boundary Bit stuffing is performed when the PDH signal is mapped into its container container.1/13/2012
  49. 49. STM N STM‐N frame 270 x N Columns 9xN Columns STM-N VC capacity 9 Rows 125 µsec Section Overhead1/13/2012
  50. 50. SDH Rates• SDH is a transport hierarchy based on multiples of 155.52 Mbit/s.The basic unit of SDH is STM 1: STM‐1:STM‐1 = 155.52 Mbit/sSTM‐4 622 08STM 4 = 622.08 Mbit/sSTM‐16 = 2588.32 Mbit/sSTM‐64 = 9953.28 Mbit/s /• Each rate is an exact multiple of the lower rate therefore the hierarchy is synchronous.1/13/2012
  51. 51. Mapping HierarchySTS-3N x1 STS-3c BULK xN C-4 139 Mbit/sSTM-N AUG AU-4 VC-4 ATM x3 x1 x3 TUG-3 TU-3 VC-3 x1 44 Mbit/sSTM-0 AUG AU-3 VC-3 C-3 34 Mbit/s x7 7 DS3 BULK STS-1 STS-1 x7 SPE x1 TU-2 VC-2 C-2 6.3 Mbit/s TUG-2 x3 VT group TU-12 VC-12 C-12 2 Mbit/s xN Multiplexing x4 TU-11 TU 11 VC-11 VC 11 C-11 1.5 Mbit/s C 11 1 5 Mbit/ Aligning VT-1.5 Mapping1/13/2012
  52. 52. Synchronous & Asynchronous Transport of 2MBPS Signal. 1/13/2012
  53. 53. Pointer 4 Bytes v1 V1 & v2 points p TU12 V5 v2 v5 VC-12 500 µsec v31/13/2012
  54. 54. STM‐1 frame 270 bytes RSOH 1 ….. 9 261Byte 3 rows pointer Information 9 Rows R PayloadMSOH 5 rows Transport 125 µs overhead Synchronous Payload Envelope1/13/2012
  55. 55. STM 1 STM‐1 Section Overhead A1 A1 A1 A2 A2 A2 J0 ∆ - media dependent R Section R-Section B1 ∆ ∆ E1 ∆ F1 Overhead D1 ∆ ∆ D2 ∆ D3 AU pointer H1 H1* H1* H2 H2 H2* H2 H2* H3 H3 H3 H1 H1* = 10010011 B2 B2 B2 K1 K2 H2* = 11111111 D4 D5 D6 M-Section Overhead D7 D8 D9 D10 D11 D12 national use S1 M1 E21/13/2012
  56. 56. STM 0 STM‐0 Overheads HO Path Section Overhead Overhead Framing Framing RS Trace Path Trace A1 A2 J0 J1 R-Section BIP-8 Orderwire User Channel BIP-8 Overhead B1 E1 F1 B3 Data Com Data Com Data Com Signal Label D1 D2 D3 C2 Path Status AU pointer Pointer Pointer Pointer G1 H1 H2 H3 BIP-8 APS APS User Channel B2 K1 K2 F2 Multiframe Data Com Data Com Data Com Indicator M-Section D4 D5 D6 H4 Overhead Data Com Data Com Data Com User Channel D7 D8 D9 F3 Data Com Data Com Data Com APS D10 D11 D12 K3 Sync (REI) Orderwire Tandem S1 (M1) E2 N11/13/2012
  57. 57. Payload Pointer Payload Pointer marks start of STM-1 VC 3 or t t f STM 1 VC-3 VC-4 90 (VC-3) or 270 (VC-4) Columns STM-1 Frame #1 H1 H2 H3... 9 Rows STM 1 STM-1 VC-3 or VC-4 STM-1 Frame #2 125 µsec 9 Rows STM-1 VC-3 or VC-4 POH column 250 µsec1/13/2012 Section Overhead
  58. 58. Pointer Bytes (H1, H2) for AU‐3 Based Frames B dF– STM‐1 pointer bytes usage: p y g • 3 x AU‐3 bit streams should be located 10 1 2 271 273 3 4 5 6 7 8 9 268 269 270 STM-1 H1 H1 H1 H2 H2 H2 2430 Section Overhead (SOH) 3 x AU 3 s AU-3s 1 2 3 87 89 90 H1 H2 SPE 810 Path Overhead (POH)
  59. 59. Overhead Layer Concepts path multiplex section multiplex section regenerator regen. regen. regenerator section section section section ADM TM REG or REG TM DCS path regen. section multipl. section regen. section pathtermination termination termination termination termination PTE = path terminating element TM = terminal multiplexerservice (E1, E4..)mapping pp g REG = regenerator service (E1, E4..) ( , )demapping ADM = add/drop multiplexer mapping DCS = digital cross-connect system demapping DXC= digital cross connect
  60. 60. Regenerator– A regenerator simply extends the possible distance and quality of a line by decomposing it into multiple sections • Replaces regenerator section overhead • Multiplex section and path overhead is not altered
  61. 61. Add‐drop Multiplexer ‐ I. – Add/drop multiplexer (ADM) • Main element for configuring paths on top of line topologies (point‐to‐point (point to point or ring) • Multiplexed channels may be dropped and added • Special drop and repeat mode for broadcast and survivability p p p y • An ADM has at least 3 logical ports: 2 core and 1 or more add‐ drop Electrical port t Optical port Optical port• Ports have different roles• No switching between the core ports g p• Switching only between the add‐drop and the core ports
  62. 62. Topology Basics
  63. 63. SDH RING TOPOLOGY
  64. 64. Uni Uni‐ and Bi‐directional Routing Bi directional A A A‐C AC AC A‐C F B F B C‐AC‐A E C E C D D Uni‐directional Ring Bi‐directional Ring (1 fiber) (2 fibers) – Only working traffic is shown – Subnetwork (path) or multiplex section switching for protection
  65. 65. Operations – Fiber Cut ‐ I.– Protection dedicated ‐ head end bridge– Failure interrupts A‐C A working traffic– Receiver at C detects F B failure Protection Traffic Working g Traffic E C Working k D traffic selected
  66. 66. Operations – Fiber Cut ‐ II.– Fiber cut recovery steps: y p • Tail end (receiver) switches to protection A traffic • Only the F B receiving node knows about Protection the protection Traffic switch Working g Traffic– No traffic lost E C Protection D traffic selected
  67. 67. Standardization– Basic APS operations are defined in ITU‐T G.783 ITU T– USHR/P is originally not fully defined by ITU‐T– Later defined in ITU T G 841 as general VC trail ITU‐T G.841 protection switching independent of the underlying topology • USHR/P is called 1+1 unidirectional VC trail switching (ring topology is only a special case) with dedicated protection– USHR/MS and other variants are more a theoretical possibility than real products
  68. 68. Section 3 4 3.4BSHR T l Topology
  69. 69. Operations – Traffic Flow– Duplex traffic between p two nodes goes through a subset of ring links– Minimum capacity equals line rate (same as USHR/P A maximum)– Line rate must be an even F B integer of STM‐1 for 2‐ fiber configurations g • Automatically fulfilled E C with newer standards only working D traffic shown
  70. 70. Maximum Bandwidth Capacity– Each link represents half p of the line rate of STM‐1s (i.e. 8 STM‐1s for an STM‐ A‐B F‐A A 16)– All traffic from a node A‐F B‐A goes to adjacent F B nodes d Only– Max. capacity = E‐F working F‐E traffic C‐B B‐C 0.5 (line rate) x ( ) shown number of nodes E C E‐D D‐C D C‐D D‐E
  71. 71. Extra Traffic– Extra traffic utilizes shared protection bandwidth Working– Extra traffic is not A Traffic protected when a failure occurs F B– Extra traffic could be lost when a failure of working Extra Traffic in Protection traffic occurs bandwidth– Extra traffic is ONLY available on a E C BSHR/MS D
  72. 72. Operations – Fiber Cut ‐ I.– Failure interrupts A‐C and p C‐A traffic Fiber cut– A and B detect failure A STM‐1#4 STM‐1#4 F B Working Traffic E C D
  73. 73. Operations – Fiber Cut ‐ II. STM‐1#10 into STM‐1#4– No dedicated protection p Fiber cut bandwidth ‐ only Loops A used when protection required STM‐1#4 STM‐1#4 into into– Only nodes next F STM‐1#10 B STM‐1#10 STM‐1#10 into to the failure know STM‐1#4 about th b t the Working Traffic protection switch– No traffic lost E C D Protection Traffic
  74. 74. Path Protection SwitchingR‐Section PayloadOverhead VC Path Overhead STM Info Path controlling Overhead protectionM‐Section switchingOverhead VC Payload – Conditions resulting in a protection switch: • Loss of pointer, STM or VC AIS • Excessive BIP errors for STM path, BIP errors for VC path path
  75. 75. 1/13/2012 OFC SDE RTTC, BSNL,BHUBANESWAR 76

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