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- 1. Chapter 3 Digital Control System <ul><li>Data Distribution Systems </li></ul><ul><li>Digital Controller </li></ul><ul><li>Sampling </li></ul>
- 2. Demultiplexer <ul><li>Demultiplexer separates the composite output digital data from the digital controller into the original channels </li></ul><ul><li>It (the demultiplexer) is synchronized with the input sampling signal </li></ul><ul><li>Each channel is connected to a DAC to produce the output analog signal for the channel </li></ul>
- 3. Digital-to-analog converter (DAC) <ul><li>A device that converts a digital signal (numerically coded data or binary numbers) into an analog signal </li></ul><ul><li>Needed as an interface between a digital component and an analog component </li></ul><ul><li>The output is the voltage signal </li></ul>
- 4. 8 bit DAC <ul><li>Figure below shows the 8-bit DAC block diagram </li></ul>8-bit DAC block diagram
- 5. Cont. <ul><li>Input is an 8-bit digital word </li></ul><ul><li>Output is a current that is proportional to the binary input value and must be converted to a voltage with an op-amp </li></ul><ul><li>A stable reference voltage (V ref ) must be supplied to the DAC </li></ul><ul><li>This voltage defines the maximum analog voltage that is, for a digital input of 11111111, V out is essentially V ref </li></ul><ul><li>If the input is 00000000, the V out will be 0 Vdc </li></ul><ul><li>For all values in between, the output voltage is a linear percentage of V ref </li></ul>
- 6. Equation to remember: <ul><li>V out is DAC output analog voltage </li></ul><ul><li>input is decimal value of the digital input </li></ul><ul><li>V ref is reference voltage to the DAC </li></ul>
- 7. Example 1 <ul><li>WHAT IS THE RELATION BETWEEN NUMBER OF BIT OF DAC AND ITS RESOLUTION? </li></ul><ul><li>GIVE AN EXAMPLE. </li></ul>
- 8. Example 2 <ul><li>Find the output value of 8-bit DAC if digital input 10011001 is applied to it. The maximum output of the DAC is 10 VDC. </li></ul><ul><li>Solution: </li></ul><ul><li>10011001 = 153 </li></ul>
- 9. Example 3 <ul><li>Calculate the 12-bit DAC resolution and find the binary value of the input if the output shows 7 VDC over 12 V ref . </li></ul><ul><li>Solution: </li></ul>
- 10. DAC method <ul><li>Two methods frequently used for digital-to-analog conversion: </li></ul><ul><li>using weighted resistors (simple in circuit configuration, poor in accuracy) </li></ul><ul><li>using the R-2R ladder network (complicated in configuration, good accuracy) </li></ul><ul><li>Following slide show the diagram of both method and the operation </li></ul>
- 11. Weighted resistors Schematic diagram of a DAC using weighted resistors
- 12. Operation: <ul><li>Switch b0 to b3 is the digital input of DAC that connect V ref to the resistor if receives binary 1 and connect V ref to the ground if receives binary 0 </li></ul><ul><li>Since in practice the signal is applied in parallel, all bits act simultaneously and generates analog output voltage by given digital voltage </li></ul><ul><li>The equation connecting the digital input and analog output is given by </li></ul>
- 13. Question? <ul><li>How the number of bit affecting the DAC accuracy. </li></ul><ul><li>Answer: </li></ul><ul><li>When number of bit is increased, the range of resistor values become large and this result poor accuracy of the DAC. </li></ul>
- 14. R-2R ladder circuit n-Bit DAC using an R-2R Ladder Circuit
- 15. Operation: <ul><li>The operation is the same as previous method instead only R and 2R resistor value are used </li></ul><ul><li>This result a high level of accuracy and relation between the digital input and analog output is given by, </li></ul>
- 16. Hold <ul><li>Sampling operation produces an amplitude-modulated pulse signal </li></ul><ul><li>The function of the operation is to reconstruct analog signal that has been transmitted as train of pulses samples </li></ul><ul><li>The purpose of the hold operation is to fill in the spaces between sampling periods and thus roughly reconstruct the original analog input signal </li></ul>
- 17. Cont. <ul><li>Following diagram illustrates the staircase waveform constructed from original input signal </li></ul>Hold Sample Sample Output from a zero-order hold
- 18. Cont. <ul><li>The hold circuit is designed to extrapolate the output signal between successive points in some prescribed manner </li></ul><ul><li>The hold circuit that produces such a staircase waveform is called a zero-order hold and is mostly used due to its simplicity </li></ul>
- 19. 6. Digital controller <ul><li>Digital controller main function is to control the closed-loop response of a system </li></ul><ul><li>Digital controller is essentially a computer (or a microcontroller) </li></ul><ul><li>Since computer cannot accept analog signal, ADC is needed to interface between computer and and feedback transducer </li></ul><ul><li>Similarly, computer cannot generate analog signal which required DAC to interface the computer to the final control elements as following figure </li></ul>
- 20. Cont. <ul><li>A closed-loop control system with a digital controller is shown in the following slide </li></ul>Structure of a digital controller
- 21. Cont. <ul><li>The conventional analog controller has been replaced with computer software executing the control algorithm </li></ul><ul><li>The purpose of the summation block is to generate the error signal as a difference of SP and MV values </li></ul>Digital controller in a closed loop
- 22. Cont. <ul><li>In practice, the summation block is replaced by a line of computer code, which takes the numerical (digitized) set-point data and subtracts measured values from that data </li></ul><ul><li>Following figure shows detail of digital control loop configuration </li></ul>Digital control loop configuration
- 23. Cont. <ul><li>Digital controller accepts values form SP and MV from ADC </li></ul><ul><li>It processes the information according to the software and generates appropriate output to DAC </li></ul><ul><li>Software is coded to execute control algorithm for the closed-loop system under control </li></ul>
- 24. Ideal sampling <ul><li>The process of sampling of a band limited analog signal and its spectra is shown as below </li></ul>Analog signal (band limited) t x(t) X(f) B -B A Sampling function t i(t) t s (1) (1) ... ... Ideally sampled signal t x I (t) t s S 2S -S ... (S) ... f (S) I(f) Spectra ... S 2S -S ... ft X I (f) -B B AS F F F
- 25. Cont. <ul><li>Period of the impulse train (sampling function)/sampling period: </li></ul><ul><li>S: sampling rate </li></ul><ul><li>The spectrum of ideally sampled signal is periodic with period S </li></ul>
- 26. Shannon sampling theorem <ul><li>Analog signal band limited to a frequency B can be sampled without loss of information if the sampling rate S exceeds 2B. </li></ul><ul><li>This is due to the spectrum of ideally sampled signal X 1 (f) consist of the spectrum of the original signal X(f) and its shifted replicas. </li></ul><ul><li>The original signal can be obtained from the sample signal if the spectrum in the principal period (-0.5S to 0.5S) is extracted </li></ul>
- 27. Cont. <ul><li>The critical sampling rate S N = 2B is called the Nyquist rate or Nyquist frequency </li></ul><ul><li>The critical sampling interval t N = 1/S N = 1/2B is called the Nyquist interval </li></ul><ul><li>Three possibilities may occur to the spectrum of the sampled signal when we do sampling: </li></ul>
- 28. Cont. ... S -S ... f X I (f) -B B oversampling S > 2B ... S -S ... f X I (f) -B B critical sampling S = 2B ... S -S ... f X I (f) -B B undersampling S < 2B Possibilities for Spectrum of a Sampled Signal
- 29. Cont. <ul><li>In undersampling condition, the spectrum overlaps which causes interference which also referred as aliasing </li></ul><ul><li>The spectrum in the principal period no longer exact replica of the spectrum of the original signal so that the original signal can not be recovered exactly from the sampled signal </li></ul>
- 30. Example of digital control system Example of digital control system
- 31. System description: <ul><li>Utilizing a microprocessor-based controller with parallel ports </li></ul><ul><li>System has one output port and three input ports (each port has each own address) </li></ul><ul><li>Output port is segmented: Six bits are converted in a DAC to provide the analog motor-speed signal, the seventh bit specifies motor direction (1 = clockwise, 0 = counterclockwise), the eighth bit turns on an audio alarm if some emergency situation is detected </li></ul>
- 32. Cont. <ul><li>The first input port detects the set-point data, the second input port receives the ADC data from the sensor, the third input port is various 1-bit logical variables </li></ul><ul><li>Limit switches are used as a “backup” to detect it if the load has gone out of the designated range </li></ul>
- 33. System operation: <ul><li>Controller inputs the data from port 03 to determine if the start (or stop) button has been pressed </li></ul><ul><li>If the start button has been pressed, then the set point is read in from port 01 and the digitized sensor data is read in from port 02 </li></ul><ul><li>controller outputs to port 00 a binary word representing the motor speed voltage </li></ul><ul><li>This digital data is converted to an analog voltage with the DAC </li></ul><ul><li>sequence is repeated over and over until the stop button is pushed </li></ul>

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