Be the first to like this
This video show how to significantly reduce the offset voltage of an amplifier with a chopper or "double sampled" technique. The circuit adds switches and error storage capacitors to an amplifier circuit. During the offset sampling phase, the offset voltage of the amplifier is measured and stored on an offset error capacitor. During the amplification phase of operation, this error voltage is inverted and applied to the input signal being amplified effectively cancelling the offset voltage of the amplifier. The video walks through the schematic capture, time domain analysis and frequency analysis of this technique. You can download your own copy of the ViaDesigner software at www.ViaDesigner.com to build this type of circuit and a wide variety of mixed-signal designs. ViaDesigner is a complete mixed-signal design solution combining: schematic capture, VHDL, Verilog, VHDL-AMS and SPICE into a unified design and simulation engine. Visit www.ViaDesigner.com to learn more.