PRESENTATION                ON                          VLSI           Yamuna Institute of Engineering and Technology     ...
VLSI         VERY LARGE SCALED INTIGRATING« VLSI  Is the science of integrating millions of transistor on aSingle chip »Op...
VHDLVHDL Stands for               V « V : Very                   H : High                   S : Speed                    I...
Features of VHDL• Support for concurrent statements• Waveform generation language• Sequential statements
VHDL DESIGN FLOW                                         Functional SimulationSpecification             HDL Entry  Timing ...
VHDL CODE STRUCTURE
•    LIBRARY declarations:-Contains a list of    all libraries to be used in the design, e.g.:    ieee, std, work, etc.•  ...
LIBRARYA LIBRARY is a collection of commonly used pieces of code.    SYNTAX:-    LIBRARY library_name;    USE library_name...
ENTITYThe Primary Purpose of an Entity Is to Declarethe Input and Output Signals WhichCommunicate With It.SYNTAX:- ENTITY ...
ARCHITECTURE• Architecture body specifies how the circuit  operated and how it is implemented.SYNTAX:-ARCHITECTURE archite...
OPERATORS•   Assignment Operators•   Logical Operators•   Arithmetic Operators•   Relational operators•   Shift Operators
Class1. Logical operators       And   Or    nand   nor   xor   xnor2. Relational operators     =    /=     <     <=    >  ...
VHDL can be structured in three different ways                    Structural              As a set of interconnected compo...
DATA FLOW Data flow describes how the data flows through the circuit, from input to output. Use concurrent statement.CON...
BEHAVIORAL MODELING To model complex components  More powerful and allows for easy implementation of the design  suppor...
STRUCTURAL MODELING Structural description uses text to show how components of circuit put together  Structural modeling...
LCD Display on using serial communication
WORKINGCOMPUTER                                            CPLD                              TTL logic                    ...
Vlsi(2)
Vlsi(2)
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Vlsi(2)

  1. 1. PRESENTATION ON VLSI Yamuna Institute of Engineering and Technology Submitted by Ritu Kumari 4109263
  2. 2. VLSI VERY LARGE SCALED INTIGRATING« VLSI Is the science of integrating millions of transistor on aSingle chip »Operating devices: CPLD FPGA
  3. 3. VHDLVHDL Stands for V « V : Very H : High S : Speed I : Integrated C : Circuit H Hardware D Designing L Language
  4. 4. Features of VHDL• Support for concurrent statements• Waveform generation language• Sequential statements
  5. 5. VHDL DESIGN FLOW Functional SimulationSpecification HDL Entry Timing Simulation Simulation Synthesis Implementation
  6. 6. VHDL CODE STRUCTURE
  7. 7. • LIBRARY declarations:-Contains a list of all libraries to be used in the design, e.g.: ieee, std, work, etc.• ENTITY:-Specifies the I/O pins of the circuit .• ARCHITECTURE:-Contains the VHDL code proper, which describes how the circuit should behave (function).
  8. 8. LIBRARYA LIBRARY is a collection of commonly used pieces of code. SYNTAX:- LIBRARY library_name; USE library_name.package_name.package_parts; • ieee.std_logic_1164 (from the ieee library) • standard (from the std library) • work (from the work library)
  9. 9. ENTITYThe Primary Purpose of an Entity Is to Declarethe Input and Output Signals WhichCommunicate With It.SYNTAX:- ENTITY entity_name IS PORT ( port_name : signal_mode signal_type; port_name : signal_mode signal_type; ... ); END entity_name;
  10. 10. ARCHITECTURE• Architecture body specifies how the circuit operated and how it is implemented.SYNTAX:-ARCHITECTURE architecture name OF entity_name IS[declarations]BEGIN(code)END architecture_name;
  11. 11. OPERATORS• Assignment Operators• Logical Operators• Arithmetic Operators• Relational operators• Shift Operators
  12. 12. Class1. Logical operators And Or nand nor xor xnor2. Relational operators = /= < <= > >=3. Shift operators sll srl sla sra rol ror4. Assignment operator <= := >=5.Addition operator + _ &6. Multiplying operator * / mod rem7.Miscellaneous operator ** abs not
  13. 13. VHDL can be structured in three different ways Structural As a set of interconnected components Data flow As a set of concurrent statements Behavioral As a set of sequential statements
  14. 14. DATA FLOW Data flow describes how the data flows through the circuit, from input to output. Use concurrent statement.CONCURRENT STATEMENT  Executed at once. combinational logic circuits are build with concurrent code. Three types of concurrent statements used in dataflow descriptions • Boolean Equations • with-select-when • when-else
  15. 15. BEHAVIORAL MODELING To model complex components  More powerful and allows for easy implementation of the design  supported inside a process statement SYNTAX:- [label:] PROCESS (sensitivity list) [VARIABLE name type [range] [:= initial_value;]] BEGIN (sequential code) END PROCESS [label];
  16. 16. STRUCTURAL MODELING Structural description uses text to show how components of circuit put together  Structural modeling use SEQUENTIAL STATEMENTS SEQUENTIAL STATEMENTS • If • Case • Wait • Loop
  17. 17. LCD Display on using serial communication
  18. 18. WORKINGCOMPUTER CPLD TTL logic 0=0v 1=3.3vRS 232 level logic0= +3v to +15 v Max 2321= -3v to -15 Voltage level convertor LCD Serial communication Parallel communication

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